.align 32
fp_other_bounce:
call do_fpother
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
ba,pt %xcc, etrap
109: or %g7, %lo(109b), %g7
call catch_disabled_ivec
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
done
utrap_ill:
call bad_trap
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
mov 11, %o0
mov 0, %o1
call sparc_floppy_irq
- add %sp, STACK_BIAS + REGWIN_SZ, %o2
+ add %sp, PTREGS_OFF, %o2
b,pt %xcc, rtrap_irq
nop
mov %l4, %o1
mov %l5, %o2
call data_access_exception
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
mov %l4, %o1
mov %l5, %o2
call instruction_access_exception_tl1
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
mov %l4, %o1
mov %l5, %o2
call instruction_access_exception
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
mov %l5, %o1
call cee_log
- add %sp, STACK_BIAS + REGWIN_SZ, %o2
+ add %sp, PTREGS_OFF, %o2
ba,a,pt %xcc, rtrap_irq
/* Capture I/D/E-cache state into per-cpu error scoreboard.
rd %pc, %g7
mov 0x0, %o0
call cheetah_plus_parity_error
- add %sp, STACK_BIAS + REGWIN_SZ, %o1
+ add %sp, PTREGS_OFF, %o1
ba,pt %xcc, rtrap
clr %l6
rd %pc, %g7
mov 0x1, %o0
call cheetah_plus_parity_error
- add %sp, STACK_BIAS + REGWIN_SZ, %o1
+ add %sp, PTREGS_OFF, %o1
ba,pt %xcc, rtrap
clr %l6
1: or %g7, %lo(1b), %g7
mov 0x2, %o0
call cheetah_plus_parity_error
- add %sp, STACK_BIAS + REGWIN_SZ, %o1
+ add %sp, PTREGS_OFF, %o1
ba,pt %xcc, rtrap
clr %l6
1: or %g7, %lo(1b), %g7
mov 0x3, %o0
call cheetah_plus_parity_error
- add %sp, STACK_BIAS + REGWIN_SZ, %o1
+ add %sp, PTREGS_OFF, %o1
ba,pt %xcc, rtrap
clr %l6
mov %l4, %o1
mov %l5, %o2
call cheetah_fecc_handler
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,a,pt %xcc, rtrap_irq
/* Our caller has disabled I-cache and performed membar Sync. */
mov %l4, %o1
mov %l5, %o2
call cheetah_cee_handler
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,a,pt %xcc, rtrap_irq
/* Our caller has disabled I-cache+D-cache and performed membar Sync. */
mov %l4, %o1
mov %l5, %o2
call cheetah_deferred_handler
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,a,pt %xcc, rtrap_irq
.globl __do_privact
ba,pt %xcc, etrap
109: or %g7, %lo(109b), %g7
call do_privact
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
mov %l4, %o1
mov %l5, %o2
call mem_address_unaligned
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
mov %l4, %o1
mov %l5, %o2
call handle_lddfmna
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
mov %l4, %o1
mov %l5, %o2
call handle_stdfmna
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
.globl breakpoint_trap
breakpoint_trap:
call sparc_breakpoint
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
nop
call sys_getppid
nop
call sys_getpid
- stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]
+ stx %o0, [%sp + PTREGS_OFF + PT_V9_I1]
b,pt %xcc, ret_sys_call
- stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
+ stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
/* SunOS getuid() returns uid in %o0 and euid in %o1 */
.globl sunos_getuid
call sys32_geteuid16
nop
call sys32_getuid16
- stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]
+ stx %o0, [%sp + PTREGS_OFF + PT_V9_I1]
b,pt %xcc, ret_sys_call
- stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
+ stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
/* SunOS getgid() returns gid in %o0 and egid in %o1 */
.globl sunos_getgid
call sys32_getegid16
nop
call sys32_getgid16
- stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]
+ stx %o0, [%sp + PTREGS_OFF + PT_V9_I1]
b,pt %xcc, ret_sys_call
- stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
+ stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
#endif
/* SunOS's execv() call only specifies the argv argument, the
ba,pt %xcc, execve_merge
or %g1, %lo(sparc_execve), %g1
sunos_execv:
- stx %g0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I2]
+ stx %g0, [%sp + PTREGS_OFF + PT_V9_I2]
sys32_execve:
sethi %hi(sparc32_execve), %g1
or %g1, %lo(sparc32_execve), %g1
execve_merge:
flushw
jmpl %g1, %g0
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
.globl sys_pipe, sys_sigpause, sys_nis_syscall
.globl sys_sigsuspend, sys_rt_sigsuspend, sys32_rt_sigsuspend
.globl sys32_sigstack
.align 32
sys_pipe: ba,pt %xcc, sparc_pipe
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
sys_nis_syscall:ba,pt %xcc, c_sys_nis_syscall
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
sys_memory_ordering:
ba,pt %xcc, sparc_memory_ordering
- add %sp, STACK_BIAS + REGWIN_SZ, %o1
+ add %sp, PTREGS_OFF, %o1
sys_sigaltstack:ba,pt %xcc, do_sigaltstack
add %i6, STACK_BIAS, %o2
sys32_sigstack: ba,pt %xcc, do_sys32_sigstack
mov %i6, %o2
.align 32
-sys_sigsuspend: add %sp, STACK_BIAS + REGWIN_SZ, %o0
+sys_sigsuspend: add %sp, PTREGS_OFF, %o0
call do_sigsuspend
add %o7, 1f-.-4, %o7
nop
sys_rt_sigsuspend: /* NOTE: %o0,%o1 have a correct value already */
- add %sp, STACK_BIAS + REGWIN_SZ, %o2
+ add %sp, PTREGS_OFF, %o2
call do_rt_sigsuspend
add %o7, 1f-.-4, %o7
nop
sys32_rt_sigsuspend: /* NOTE: %o0,%o1 have a correct value already */
srl %o0, 0, %o0
- add %sp, STACK_BIAS + REGWIN_SZ, %o2
+ add %sp, PTREGS_OFF, %o2
call do_rt_sigsuspend32
add %o7, 1f-.-4, %o7
/* NOTE: %o0 has a correct value already */
-sys_sigpause: add %sp, STACK_BIAS + REGWIN_SZ, %o1
+sys_sigpause: add %sp, PTREGS_OFF, %o1
call do_sigpause
add %o7, 1f-.-4, %o7
nop
sys32_sigreturn:
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
call do_sigreturn32
add %o7, 1f-.-4, %o7
nop
sys_rt_sigreturn:
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
call do_rt_sigreturn
add %o7, 1f-.-4, %o7
nop
sys32_rt_sigreturn:
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
call do_rt_sigreturn32
add %o7, 1f-.-4, %o7
nop
-sys_ptrace: add %sp, STACK_BIAS + REGWIN_SZ, %o0
+sys_ptrace: add %sp, PTREGS_OFF, %o0
call do_ptrace
add %o7, 1f-.-4, %o7
nop
movrz %o1, %fp, %o1
mov 0, %o3
ba,pt %xcc, sparc_do_fork
- add %sp, STACK_BIAS + REGWIN_SZ, %o2
+ add %sp, PTREGS_OFF, %o2
ret_from_syscall:
/* Clear SPARC_FLAG_NEWCHILD, switch_to leaves thread.flags in
* %o7 for us. Check performance counter stuff too.
rd %pic, %g0
1: b,pt %xcc, ret_sys_call
- ldx [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0], %o0
+ ldx [%sp + PTREGS_OFF + PT_V9_I0], %o0
sparc_exit: wrpr %g0, (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV), %pstate
rdpr %otherwin, %g1
rdpr %cansave, %g3
sll %g1, 2, %l4 ! IEU0 Group
#ifdef SYSCALL_TRACING
call syscall_trace_entry
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
srl %i0, 0, %o0
#endif
mov %i4, %o4 ! IEU1
sll %g1, 2, %l4 ! IEU0 Group
#ifdef SYSCALL_TRACING
call syscall_trace_entry
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
mov %i0, %o0
#endif
mov %i1, %o1 ! IEU1
mov %i5, %o5 ! IEU0
nop
-3: stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
+3: stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
ret_sys_call:
#ifdef SYSCALL_TRACING
mov %o0, %o1
call syscall_trace_exit
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
mov %o1, %o0
#endif
- ldx [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TSTATE], %g3
- ldx [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC], %l1 ! pc = npc
+ ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %g3
+ ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc
sra %o0, 0, %o0
mov %ulo(TSTATE_XCARRY | TSTATE_ICARRY), %g2
cmp %o0, -ENOIOCTLCMD
andcc %l0, _TIF_SYSCALL_TRACE, %l6
andn %g3, %g2, %g3 /* System call success, clear Carry condition code. */
- stx %g3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TSTATE]
+ stx %g3, [%sp + PTREGS_OFF + PT_V9_TSTATE]
bne,pn %icc, linux_syscall_trace2
add %l1, 0x4, %l2 ! npc = npc+4
- stx %l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC]
+ stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
ba,pt %xcc, rtrap_clr_l6
- stx %l2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC]
+ stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
1:
/* System call failure, set Carry condition code.
*/
sub %g0, %o0, %o0
or %g3, %g2, %g3
- stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
+ stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
mov 1, %l6
- stx %g3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TSTATE]
+ stx %g3, [%sp + PTREGS_OFF + PT_V9_TSTATE]
bne,pn %icc, linux_syscall_trace2
add %l1, 0x4, %l2 !npc = npc+4
- stx %l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC]
+ stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
b,pt %xcc, rtrap
- stx %l2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC]
+ stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
linux_syscall_trace2:
call syscall_trace
nop
- stx %l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC]
+ stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
ba,pt %xcc, rtrap
- stx %l2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC]
+ stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
.align 32
.globl __flushw_user
#include <asm/head.h>
#include <asm/processor.h>
-#define TASK_REGOFF (THREAD_SIZE-TRACEREG_SZ-REGWIN_SZ)
+#define TASK_REGOFF (THREAD_SIZE-TRACEREG_SZ-STACKFRAME_SZ)
#define ETRAP_PSTATE1 (PSTATE_RMO | PSTATE_PRIV)
#define ETRAP_PSTATE2 (PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)
sllx %g2, 20, %g3 ! IEU0 Group
andcc %g1, TSTATE_PRIV, %g0 ! IEU1
or %g1, %g3, %g1 ! IEU0 Group
- bne,pn %xcc, 1f ! CTI
- sub %sp, REGWIN_SZ+TRACEREG_SZ-STACK_BIAS, %g2 ! IEU1
+ bne,pn %xcc, 1f ! CTI
+ sub %sp, STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS, %g2 ! IEU1
wrpr %g0, 7, %cleanwin ! Single Group+4bubbles
sethi %hi(TASK_REGOFF), %g2 ! IEU0 Group
wr %g0, 0, %fprs ! Single Group+4bubbles
1: rdpr %tpc, %g3 ! Single Group
- stx %g1, [%g2 + REGWIN_SZ + PT_V9_TSTATE] ! Store Group
+ stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE] ! Store Group
rdpr %tnpc, %g1 ! Single Group
- stx %g3, [%g2 + REGWIN_SZ + PT_V9_TPC] ! Store Group
+ stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC] ! Store Group
rd %y, %g3 ! Single Group+4bubbles
- stx %g1, [%g2 + REGWIN_SZ + PT_V9_TNPC] ! Store Group
- st %g3, [%g2 + REGWIN_SZ + PT_V9_Y] ! Store Group
+ stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC] ! Store Group
+ st %g3, [%g2 + STACKFRAME_SZ + PT_V9_Y] ! Store Group
save %g2, -STACK_BIAS, %sp ! Ordering here is critical ! Single Group
mov %g6, %l6 ! IEU0 Group
mov %g7, %l2 ! IEU1
wrpr %g0, ETRAP_PSTATE1, %pstate ! Single Group+4bubbles
- stx %g1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G1] ! Store Group
- stx %g2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G2] ! Store Group
- stx %g3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G3] ! Store Group
- stx %g4, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G4] ! Store Group
- stx %g5, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G5] ! Store Group
- stx %g6, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G6] ! Store Group
-
- stx %g7, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G7] ! Store Group
- stx %i0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0] ! Store Group
- stx %i1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1] ! Store Group
- stx %i2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I2] ! Store Group
- stx %i3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I3] ! Store Group
- stx %i4, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I4] ! Store Group
- stx %i5, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I5] ! Store Group
-
- stx %i6, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I6] ! Store Group
- stx %i7, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I7] ! Store Group
+ stx %g1, [%sp + PTREGS_OFF + PT_V9_G1] ! Store Group
+ stx %g2, [%sp + PTREGS_OFF + PT_V9_G2] ! Store Group
+ stx %g3, [%sp + PTREGS_OFF + PT_V9_G3] ! Store Group
+ stx %g4, [%sp + PTREGS_OFF + PT_V9_G4] ! Store Group
+ stx %g5, [%sp + PTREGS_OFF + PT_V9_G5] ! Store Group
+ stx %g6, [%sp + PTREGS_OFF + PT_V9_G6] ! Store Group
+
+ stx %g7, [%sp + PTREGS_OFF + PT_V9_G7] ! Store Group
+ stx %i0, [%sp + PTREGS_OFF + PT_V9_I0] ! Store Group
+ stx %i1, [%sp + PTREGS_OFF + PT_V9_I1] ! Store Group
+ stx %i2, [%sp + PTREGS_OFF + PT_V9_I2] ! Store Group
+ stx %i3, [%sp + PTREGS_OFF + PT_V9_I3] ! Store Group
+ stx %i4, [%sp + PTREGS_OFF + PT_V9_I4] ! Store Group
+ stx %i5, [%sp + PTREGS_OFF + PT_V9_I5] ! Store Group
+
+ stx %i6, [%sp + PTREGS_OFF + PT_V9_I6] ! Store Group
+ stx %i7, [%sp + PTREGS_OFF + PT_V9_I7] ! Store Group
wrpr %g0, ETRAP_PSTATE2, %pstate ! Single Group+4bubbles
mov %l6, %g6 ! IEU0
jmpl %l2 + 0x4, %g0 ! CTI Group
stx %g1, [%g2 + STACK_BIAS + 0x80]
rdpr %tstate, %g1 ! Single Group+4bubbles
- sub %g2, REGWIN_SZ + TRACEREG_SZ - STACK_BIAS, %g2 ! IEU1
+ sub %g2, STACKFRAME_SZ + TRACEREG_SZ - STACK_BIAS, %g2 ! IEU1
ba,pt %xcc, 1b ! CTI Group
andcc %g1, TSTATE_PRIV, %g0 ! IEU0
andcc %g1, TSTATE_PRIV, %g0 ! IEU1
or %g1, %g3, %g1 ! IEU0 Group
bne,pn %xcc, 1f ! CTI
- sub %sp, (REGWIN_SZ+TRACEREG_SZ-STACK_BIAS), %g2 ! IEU1
+ sub %sp, (STACKFRAME_SZ+TRACEREG_SZ-STACK_BIAS), %g2 ! IEU1
wrpr %g0, 7, %cleanwin ! Single Group+4bubbles
sllx %g1, 51, %g3 ! IEU0 Group
add %g6, %g2, %g2 ! IEU0 Group
wr %g0, 0, %fprs ! Single Group+4bubbles
1: rdpr %tpc, %g3 ! Single Group
- stx %g1, [%g2 + REGWIN_SZ + PT_V9_TSTATE] ! Store Group
+ stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TSTATE] ! Store Group
rdpr %tnpc, %g1 ! Single Group
- stx %g3, [%g2 + REGWIN_SZ + PT_V9_TPC] ! Store Group
- stx %g1, [%g2 + REGWIN_SZ + PT_V9_TNPC] ! Store Group
+ stx %g3, [%g2 + STACKFRAME_SZ + PT_V9_TPC] ! Store Group
+ stx %g1, [%g2 + STACKFRAME_SZ + PT_V9_TNPC] ! Store Group
save %g2, -STACK_BIAS, %sp ! Ordering here is critical ! Single Group
mov %g6, %l6 ! IEU0 Group
bne,pn %xcc, 2f ! CTI
mov %g5, %l5 ! IEU0 Group
add %g7, 0x4, %l2 ! IEU1
wrpr %g0, ETRAP_PSTATE1, %pstate ! Single Group+4bubbles
- stx %g1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G1] ! Store Group
- stx %g2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G2] ! Store Group
+ stx %g1, [%sp + PTREGS_OFF + PT_V9_G1] ! Store Group
+ stx %g2, [%sp + PTREGS_OFF + PT_V9_G2] ! Store Group
sllx %l7, 24, %l7 ! IEU0
- stx %g3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G3] ! Store Group
+ stx %g3, [%sp + PTREGS_OFF + PT_V9_G3] ! Store Group
rdpr %cwp, %l0 ! Single Group
- stx %g4, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G4] ! Store Group
- stx %g5, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G5] ! Store Group
- stx %g6, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G6] ! Store Group
- stx %g7, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_G7] ! Store Group
+ stx %g4, [%sp + PTREGS_OFF + PT_V9_G4] ! Store Group
+ stx %g5, [%sp + PTREGS_OFF + PT_V9_G5] ! Store Group
+ stx %g6, [%sp + PTREGS_OFF + PT_V9_G6] ! Store Group
+ stx %g7, [%sp + PTREGS_OFF + PT_V9_G7] ! Store Group
or %l7, %l0, %l7 ! IEU0
sethi %hi(TSTATE_RMO | TSTATE_PEF), %l0 ! IEU1
or %l7, %l0, %l7 ! IEU0 Group
wrpr %l2, %tnpc ! Single Group+4bubbles
wrpr %l7, (TSTATE_PRIV | TSTATE_IE), %tstate ! Single Group+4bubbles
- stx %i0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0] ! Store Group
- stx %i1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1] ! Store Group
- stx %i2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I2] ! Store Group
- stx %i3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I3] ! Store Group
- stx %i4, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I4] ! Store Group
-
- stx %i5, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I5] ! Store Group
- stx %i6, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I6] ! Store Group
+ stx %i0, [%sp + PTREGS_OFF + PT_V9_I0] ! Store Group
+ stx %i1, [%sp + PTREGS_OFF + PT_V9_I1] ! Store Group
+ stx %i2, [%sp + PTREGS_OFF + PT_V9_I2] ! Store Group
+ stx %i3, [%sp + PTREGS_OFF + PT_V9_I3] ! Store Group
+ stx %i4, [%sp + PTREGS_OFF + PT_V9_I4] ! Store Group
+
+ stx %i5, [%sp + PTREGS_OFF + PT_V9_I5] ! Store Group
+ stx %i6, [%sp + PTREGS_OFF + PT_V9_I6] ! Store Group
mov %l6, %g6 ! IEU1
- stx %i7, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I7] ! Store Group
+ stx %i7, [%sp + PTREGS_OFF + PT_V9_I7] ! Store Group
ldx [%g6 + TI_TASK], %g4 ! Load Group
done
nop
wr %g0, ASI_P, %asi
mov 1, %g5
sllx %g5, THREAD_SHIFT, %g5
- sub %g5, (REGWIN_SZ + STACK_BIAS), %g5
+ sub %g5, (STACKFRAME_SZ + STACK_BIAS), %g5
add %g6, %g5, %sp
mov 0, %fp
/* ITLB ** ICACHE line 3: Finish faults + window fixups */
call do_sparc64_fault ! Call fault handler
- add %sp, STACK_BIAS + REGWIN_SZ, %o0! Compute pt_regs arg
+ add %sp, PTREGS_OFF, %o0! Compute pt_regs arg
ba,pt %xcc, rtrap_clr_l6 ! Restore cpu state
nop
winfix_trampoline:
#include <asm/pstate.h>
#include <asm/elf.h>
#include <asm/fpumacro.h>
+#include <asm/head.h>
/* #define VERBOSE_SHOWREGS */
regs->u_regs[14] >= (long)current - PAGE_SIZE &&
regs->u_regs[14] < (long)current + 6 * PAGE_SIZE) {
printk ("*********parent**********\n");
- __show_regs((struct pt_regs *)(regs->u_regs[14] + STACK_BIAS + REGWIN_SZ));
- idump_from_user(((struct pt_regs *)(regs->u_regs[14] + STACK_BIAS + REGWIN_SZ))->tpc);
+ __show_regs((struct pt_regs *)(regs->u_regs[14] + PTREGS_OFF));
+ idump_from_user(((struct pt_regs *)(regs->u_regs[14] + PTREGS_OFF))->tpc);
printk ("*********endpar**********\n");
}
#endif
flush_user_windows();
if ((window = get_thread_wsaved()) != 0) {
- int winsize = REGWIN_SZ;
+ int winsize = sizeof(struct reg_window);
int bias = 0;
if (test_thread_flag(TIF_32BIT))
- winsize = REGWIN32_SZ;
+ winsize = sizeof(struct reg_window32);
else
bias = STACK_BIAS;
{
struct thread_info *t = current_thread_info();
unsigned long window;
- int winsize = REGWIN_SZ;
+ int winsize = sizeof(struct reg_window);
int bias = 0;
if (test_thread_flag(TIF_32BIT))
- winsize = REGWIN32_SZ;
+ winsize = sizeof(struct reg_window32);
else
bias = STACK_BIAS;
p->set_child_tid = p->clear_child_tid = NULL;
/* Calculate offset to stack_frame & pt_regs */
- child_trap_frame = ((char *)t) + (THREAD_SIZE - (TRACEREG_SZ+REGWIN_SZ));
- memcpy(child_trap_frame, (((struct reg_window *)regs)-1), (TRACEREG_SZ+REGWIN_SZ));
+ child_trap_frame = ((char *)t) + (THREAD_SIZE - (TRACEREG_SZ+STACKFRAME_SZ));
+ memcpy(child_trap_frame, (((struct sparc_stackf *)regs)-1), (TRACEREG_SZ+STACKFRAME_SZ));
t->flags = (t->flags & ~((0xffUL << TI_FLAG_CWP_SHIFT) | (0xffUL << TI_FLAG_CURRENT_DS_SHIFT))) |
_TIF_NEWCHILD |
(((regs->tstate + 1) & TSTATE_CWP) << TI_FLAG_CWP_SHIFT);
t->ksp = ((unsigned long) child_trap_frame) - STACK_BIAS;
- t->kregs = (struct pt_regs *)(child_trap_frame+sizeof(struct reg_window));
+ t->kregs = (struct pt_regs *)(child_trap_frame+sizeof(struct sparc_stackf));
t->fpsaved[0] = 0;
if (regs->tstate & TSTATE_PRIV) {
flush_register_windows();
memcpy((void *)(t->ksp + STACK_BIAS),
(void *)(regs->u_regs[UREG_FP] + STACK_BIAS),
- sizeof(struct reg_window));
+ sizeof(struct sparc_stackf));
t->kregs->u_regs[UREG_G6] = (unsigned long) t;
t->kregs->u_regs[UREG_G4] = (unsigned long) t->task;
} else {
clr %o0
mov %l5, %o2
mov %l6, %o3
- add %sp, STACK_BIAS + REGWIN_SZ, %o1
+ add %sp, PTREGS_OFF, %o1
mov %l0, %o4
call do_notify_resume
clr %o0
mov %l5, %o2
mov %l6, %o3
- add %sp, STACK_BIAS + REGWIN_SZ, %o1
+ add %sp, PTREGS_OFF, %o1
mov %l0, %o4
call do_notify_resume
clr %o0
mov %l5, %o2
mov %l6, %o3
- add %sp, STACK_BIAS + REGWIN_SZ, %o1
+ add %sp, PTREGS_OFF, %o1
mov %l0, %o4
call do_notify_resume
wrpr %g0, RTRAP_PSTATE, %pstate
save_and_clear_fpu();
regs->u_regs[UREG_FP] &= 0x00000000ffffffffUL;
- sfp = (svr4_signal_frame_t *) get_sigframe(sa, regs, REGWIN_SZ + SVR4_SF_ALIGNED);
+ sfp = (svr4_signal_frame_t *) get_sigframe(sa, regs, sizeof(struct reg_window32) + SVR4_SF_ALIGNED);
if (invalid_frame_pointer (sfp, sizeof (*sfp)))
do_exit(SIGILL);
mov 1, %g5
sllx %g5, THREAD_SHIFT, %g5
- sub %g5, (REGWIN_SZ + STACK_BIAS), %g5
+ sub %g5, (STACKFRAME_SZ + STACK_BIAS), %g5
add %g6, %g5, %sp
mov 0, %fp
* since we must preserve %l5 and %l6, see comment above.
*/
call do_sparc64_fault
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
nop ! yes, nop is correct
ba,pt %xcc, etrap
rd %pc, %g7
call do_sparc64_fault
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,a,pt %xcc, rtrap_clr_l6
.globl winfix_mna, fill_fixup_mna, spill_fixup_mna
mov %o7, %g6 ! Get current back.
ldx [%g6 + TI_TASK], %g4 ! Finish it.
call mem_address_unaligned
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
b,pt %xcc, rtrap
nop ! yes, the nop is correct
mov %l4, %o2
mov %l5, %o1
call mem_address_unaligned
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
mov %o7, %g6 ! Get current back.
ldx [%g6 + TI_TASK], %g4 ! Finish it.
call data_access_exception
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
b,pt %xcc, rtrap
nop ! yes, the nop is correct
mov %l4, %o1
mov %l5, %o2
call data_access_exception
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, rtrap
clr %l6
b,pt %xcc, etrap_irq
109: or %g7, %lo(109b), %g7
call __show_regs
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
clr %l6
/* Has to be a non-v9 branch due to the large distance. */
b rtrap_xcall
be,pt %icc, 2f
srl %i2, 0, %o2
b,pt %xcc, 2f
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
solaris_sucks:
/* Solaris is a big system which needs to be able to do all the things
sethi %hi(sys_call_table32), %l6
andcc %l3, 1, %g0
bne,a,pn %icc, 10f
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
10: srl %i2, 0, %o2
mov %i5, %o5
andn %l3, 3, %l7
2: call %l7
srl %i3, 0, %o3
ret_from_solaris:
- stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
+ stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
ldx [%g6 + TI_FLAGS], %l6
sra %o0, 0, %o0
mov %ulo(TSTATE_XCARRY | TSTATE_ICARRY), %g2
- ldx [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TSTATE], %g3
+ ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %g3
cmp %o0, -ENOIOCTLCMD
sllx %g2, 32, %g2
bgeu,pn %xcc, 1f
/* System call success, clear Carry condition code. */
andn %g3, %g2, %g3
- stx %g3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TSTATE]
+ stx %g3, [%sp + PTREGS_OFF + PT_V9_TSTATE]
bne,pn %icc, solaris_syscall_trace2
- ldx [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC], %l1
+ ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1
andcc %l1, 1, %g0
bne,pn %icc, 2f
clr %l6
add %l1, 0x4, %l2
- stx %l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC] ! pc = npc
+ stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC] ! pc = npc
call rtrap
- stx %l2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC] !npc = npc+4
+ stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC] !npc = npc+4
/* When tnpc & 1, this comes from setcontext and we don't want to advance pc */
2: andn %l1, 3, %l1
call rtrap
- stx %l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC] !npc = npc&~3
+ stx %l1, [%sp + PTREGS_OFF + PT_V9_TNPC] !npc = npc&~3
1:
/* System call failure, set Carry condition code.
sll %o0, 2, %o0
or %l6, %lo(solaris_err_table), %l6
ldsw [%l6 + %o0], %o0
-1: stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
+1: stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
mov 1, %l6
- stx %g3, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TSTATE]
+ stx %g3, [%sp + PTREGS_OFF + PT_V9_TSTATE]
bne,pn %icc, solaris_syscall_trace2
- ldx [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC], %l1
+ ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1
andcc %l1, 1, %g0
bne,pn %icc, 2b
add %l1, 0x4, %l2
- stx %l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC] ! pc = npc
+ stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC] ! pc = npc
call rtrap
- stx %l2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC] !npc = npc+4
+ stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC] !npc = npc+4
solaris_syscall_trace2:
call syscall_trace
andcc %l1, 1, %g0
bne,pn %icc, 2b
nop
- stx %l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC]
+ stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
call rtrap
- stx %l2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC]
+ stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
/* This one is tricky, so that's why we do it in assembly */
.globl solaris_sigsuspend
brlz,pn %o0, ret_from_solaris
nop
call sys_sigsuspend
- stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I0]
+ stx %o0, [%sp + PTREGS_OFF + PT_V9_I0]
.globl solaris_getpid
solaris_getpid:
call sys_getppid
nop
call sys_getpid
- stx %o0, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]
+ stx %o0, [%sp + PTREGS_OFF + PT_V9_I1]
b,pt %xcc, ret_from_solaris
nop
call sys_geteuid
nop
call sys_getuid
- stx %o1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]
+ stx %o1, [%sp + PTREGS_OFF + PT_V9_I1]
b,pt %xcc, ret_from_solaris
nop
call sys_getegid
nop
call sys_getgid
- stx %o1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_I1]
+ stx %o1, [%sp + PTREGS_OFF + PT_V9_I1]
b,pt %xcc, ret_from_solaris
nop
.globl solaris_unimplemented
solaris_unimplemented:
call do_sol_unimplemented
- add %sp, STACK_BIAS + REGWIN_SZ, %o0
+ add %sp, PTREGS_OFF, %o0
ba,pt %xcc, ret_from_solaris
nop
#define KERNBASE 0x400000
-#define PTREGS_OFF (STACK_BIAS + REGWIN_SZ)
+#define PTREGS_OFF (STACK_BIAS + STACKFRAME_SZ)
#define __CHEETAH_ID 0x003e0014
"stx %%g0, [%0 + %2 + 0x78]\n\t" \
"wrpr %%g0, (1 << 3), %%wstate\n\t" \
: \
- : "r" (regs), "r" (sp - REGWIN_SZ - STACK_BIAS), \
+ : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
"i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
} while (0)
"stx %%g0, [%0 + %2 + 0x78]\n\t" \
"wrpr %%g0, (2 << 3), %%wstate\n\t" \
: \
- : "r" (regs), "r" (sp - REGWIN32_SZ), \
+ : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
"i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
} while (0)
#define TRACEREG_SZ sizeof(struct pt_regs)
#define STACKFRAME_SZ sizeof(struct sparc_stackf)
-#define REGWIN_SZ sizeof(struct reg_window)
#define TRACEREG32_SZ sizeof(struct pt_regs32)
#define STACKFRAME32_SZ sizeof(struct sparc_stackf32)
-#define REGWIN32_SZ sizeof(struct reg_window32)
#ifdef __KERNEL__
#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV))
/* For assembly code. */
#define TRACEREG_SZ 0xa0
#define STACKFRAME_SZ 0xc0
-#define REGWIN_SZ 0x80
#define TRACEREG32_SZ 0x50
#define STACKFRAME32_SZ 0x60
-#define REGWIN32_SZ 0x40
#endif
#ifdef __KERNEL__
ba,pt %xcc, etrap; \
109: or %g7, %lo(109b), %g7; \
call routine; \
- add %sp, STACK_BIAS + REGWIN_SZ, %o0; \
+ add %sp, PTREGS_OFF, %o0; \
ba,pt %xcc, rtrap; \
clr %l6; \
nop;
ba,pt %xcc, etrap; \
109: or %g7, %lo(109b), %g7; \
call routine; \
- add %sp, STACK_BIAS + REGWIN_SZ, %o0; \
+ add %sp, PTREGS_OFF, %o0; \
ba,pt %xcc, rtrap; \
clr %l6;
ba,pt %xcc, do_fptrap; \
109: or %g7, %lo(109b), %g7; \
call routine; \
- add %sp, STACK_BIAS + REGWIN_SZ, %o0; \
+ add %sp, PTREGS_OFF, %o0; \
ba,pt %xcc, rtrap; \
clr %l6; \
nop;
ba,pt %xcc, etraptl1; \
109: or %g7, %lo(109b), %g7; \
call routine; \
- add %sp, STACK_BIAS + REGWIN_SZ, %o0; \
+ add %sp, PTREGS_OFF, %o0; \
ba,pt %xcc, rtrap; \
clr %l6; \
nop;
sethi %hi(109f), %g7; \
ba,pt %xcc, etrap; \
109: or %g7, %lo(109b), %g7; \
- add %sp, STACK_BIAS + REGWIN_SZ, %o0; \
+ add %sp, PTREGS_OFF, %o0; \
call routine; \
mov arg, %o1; \
ba,pt %xcc, rtrap; \
sethi %hi(109f), %g7; \
ba,pt %xcc, etraptl1; \
109: or %g7, %lo(109b), %g7; \
- add %sp, STACK_BIAS + REGWIN_SZ, %o0; \
+ add %sp, PTREGS_OFF, %o0; \
call routine; \
mov arg, %o1; \
ba,pt %xcc, rtrap; \
rd %pc, %g7; \
mov level, %o0; \
call routine; \
- add %sp, STACK_BIAS + REGWIN_SZ, %o1; \
+ add %sp, PTREGS_OFF, %o1; \
ba,a,pt %xcc, rtrap_irq;
#define TICK_SMP_IRQ \
b,pt %xcc, etrap_irq; \
109: or %g7, %lo(109b), %g7; \
call smp_percpu_timer_interrupt; \
- add %sp, STACK_BIAS + REGWIN_SZ, %o0; \
+ add %sp, PTREGS_OFF, %o0; \
ba,a,pt %xcc, rtrap_irq;
#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
ba,pt %xcc, etrap; \
rd %pc, %g7; \
flushw; \
- ldx [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC], %l1; \
+ ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
add %l1, 4, %l2; \
- stx %l1, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TPC]; \
+ stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
ba,pt %xcc, rtrap_clr_l6; \
- stx %l2, [%sp + STACK_BIAS + REGWIN_SZ + PT_V9_TNPC];
+ stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
/* Before touching these macros, you owe it to yourself to go and
* see how arch/sparc64/kernel/winfixup.S works... -DaveM