* Copyright (C) 1992-1997, 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/slab.h>
+#include <linux/sched.h>
#include <asm/sn/types.h>
#include <asm/sn/sgi.h>
#include <asm/sn/driver.h>
/* sanity check */
if (byte_count_max > byte_count)
- return(NULL);
+ return NULL;
hubinfo_get(hubv, &hubinfo);
* For now, reject requests that span big windows.
*/
if ((xtalk_addr % BWIN_SIZE) + byte_count > BWIN_SIZE)
- return(NULL);
+ return NULL;
/* Round xtalk address down for big window alignement */
widget == bw_piomap->hpio_xtalk_info.xp_target) {
bw_piomap->hpio_holdcnt++;
spin_unlock(&hubinfo->h_bwlock);
- return(bw_piomap);
+ return bw_piomap;
}
}
done:
spin_unlock(&hubinfo->h_bwlock);
- return(bw_piomap);
+ return bw_piomap;
}
/*
{
/* Verify that range can be mapped using the specified piomap */
if (xtalk_addr < hub_piomap->hpio_xtalk_info.xp_xtalk_addr)
- return(0);
+ return 0;
if (xtalk_addr + byte_count >
( hub_piomap->hpio_xtalk_info.xp_xtalk_addr +
hub_piomap->hpio_xtalk_info.xp_mapsz))
- return(0);
+ return 0;
if (hub_piomap->hpio_flags & HUB_PIOMAP_IS_VALID)
- return(hub_piomap->hpio_xtalk_info.xp_kvaddr +
- (xtalk_addr % hub_piomap->hpio_xtalk_info.xp_mapsz));
+ return hub_piomap->hpio_xtalk_info.xp_kvaddr +
+ (xtalk_addr % hub_piomap->hpio_xtalk_info.xp_mapsz);
else
- return(0);
+ return 0;
}
addr = (caddr_t)iaddr;
}
#endif
- return(addr);
+ return addr;
} else
- return(0);
+ return 0;
}
if (flags & XTALK_FIXED)
dmamap->hdma_flags |= HUB_DMAMAP_IS_FIXED;
- return(dmamap);
+ return dmamap;
}
/*
}
/* There isn't actually any DMA mapping hardware on the hub. */
- return( (PHYS_TO_DMA(paddr)) );
+ return (PHYS_TO_DMA(paddr));
}
/*
}
/* There isn't actually any DMA mapping hardware on the hub. */
- return(palenlist);
+ return palenlist;
}
/*
size_t byte_count, /* length */
unsigned flags) /* defined in dma.h */
{
- return( (PHYS_TO_DMA(paddr)) );
+ return (PHYS_TO_DMA(paddr));
}
/*
{
BUG();
/* no translation needed */
- return(palenlist);
+ return palenlist;
}
/*ARGSUSED*/
{
nasid_t nasid = NASID_GET(addr);
- if (((__psunsigned_t)addr >= RAW_NODE_SWIN_BASE(nasid, 0)) &&
- ((__psunsigned_t)addr < RAW_NODE_SWIN_BASE(nasid, 1)))
+ if (((unsigned long)addr >= RAW_NODE_SWIN_BASE(nasid, 0)) &&
+ ((unsigned long)addr < RAW_NODE_SWIN_BASE(nasid, 1)))
return 1;
return 0;
}
return 1;
/* XXX - Assume this is really a small window address */
- if (WIDGETID_GET((__psunsigned_t)addra) ==
- WIDGETID_GET((__psunsigned_t)addrb))
+ if (WIDGETID_GET((unsigned long)addra) ==
+ WIDGETID_GET((unsigned long)addrb))
return 1;
return 0;
int rc;
xvolinfo = kmalloc(sizeof(struct xswitch_vol_s), GFP_KERNEL);
- if (xvolinfo <= 0 ) {
- printk("xswitch_vertex_init: out of memory\n");
+ if (!xvolinfo) {
+ printk(KERN_WARNING "xswitch_vertex_init(): Unable to "
+ "allocate memory\n");
return;
}
memset(xvolinfo, 0, sizeof(struct xswitch_vol_s));
/* Look for brick prefix in table */
for (i = 0; i < num_bricks; i++) {
if (brick_type == io_brick_tab[i].ibm_type)
- return(io_brick_tab[i].ibm_map_wid[widget_num]);
+ return io_brick_tab[i].ibm_map_wid[widget_num];
}
return 0;
#if PCIBR_SOFT_LIST
-pcibr_list_p pcibr_list = 0;
+pcibr_list_p pcibr_list;
#endif
extern char *pci_space[];
error = io_remap_page_range(vma, phys_addr, vma->vm_start,
vma->vm_end - vma->vm_start,
vma->vm_page_prot);
- return(error);
+ return error;
}
/*
if (error_call)
error = error_call;
- return(error);
+ return error;
}
/* Get the bridge vertex from its xtalk connection point */
if (hwgraph_traverse(xconn, EDGE_LBL_PCI, &pcibr_vhdl) != GRAPH_SUCCESS)
- return(1);
+ return 1;
pcibr_soft = pcibr_soft_get(pcibr_vhdl);
/* Remove the Bridge revision labelled info */
(void)hwgraph_info_remove_LBL(pcibr_vhdl, INFO_LBL_PCIBR_ASIC_REV, NULL);
- /* Remove the character device associated with this bridge */
- hwgraph_edge_remove(pcibr_vhdl, EDGE_LBL_CONTROLLER, NULL);
- /* Remove the PCI bridge vertex */
- hwgraph_edge_remove(xconn, EDGE_LBL_PCI, NULL);
- return(0);
+ return 0;
}
"pcibr_piomap_addr: map=0x%lx, addr=0x%lx\n",
pcibr_piomap, addr));
- return(addr);
+ return addr;
}
/*ARGSUSED */
PCIBR_DEBUG((PCIBR_DEBUG_PIODIR, pconn_vhdl,
"pcibr_piotrans_addr: xio_addr=0x%lx, addr=0x%lx\n",
xio_addr, addr));
- return(addr);
+ return addr;
}
/*
attributes &= (PCI64_ATTR_BAR | PCI64_ATTR_SWAP);
}
- return (attributes);
+ return attributes;
}
/*ARGSUSED */
pciio_info_t pciio_info = pciio_info_get(pconn_vhdl);
pcibr_soft_t pcibr_soft = (pcibr_soft_t) pciio_info_mfast_get(pciio_info);
- return(NASID_TO_COMPACT_NODEID(NASID_GET(pcibr_soft->bs_dir_xbase)));
+ return NASID_TO_COMPACT_NODEID(NASID_GET(pcibr_soft->bs_dir_xbase));
}
/*ARGSUSED */
"pcibr_dmatrans_addr: wanted paddr [0x%lx..0x%lx], "
"xio_port=0x%x, direct64: pci_addr=0x%lx\n",
paddr, paddr + req_size - 1, xio_addr, pci_addr));
- return (pci_addr);
+ return pci_addr;
}
if (!pcibr_try_set_device(pcibr_soft, pciio_slot, flags, BRIDGE_DEV_D64_BITS)) {
pci_addr = pcibr_flags_to_d64(flags, pcibr_soft);
"xio_port=0x%x, direct64: pci_addr=0x%lx, "
"new flags: 0x%x\n", paddr, paddr + req_size - 1,
xio_addr, pci_addr, (uint64_t) flags));
- return (pci_addr);
+ return pci_addr;
}
PCIBR_DEBUG((PCIBR_DEBUG_DMADIR, pconn_vhdl,
" xio_port=0x%x, direct32: pci_addr=0x%lx\n",
paddr, paddr + req_size - 1, xio_addr, pci_addr));
- return (pci_addr);
+ return pci_addr;
}
if (!pcibr_try_set_device(pcibr_soft, pciio_slot, flags, BRIDGE_DEV_D32_BITS)) {
"new flags: 0x%x\n", paddr, paddr + req_size - 1,
xio_addr, pci_addr, (uint64_t) flags));
- return (pci_addr);
+ return pci_addr;
}
/* our flags conflict with Device(x).
*/
iopaddr_t
pcibr_dmamap_pciaddr_get(pcibr_dmamap_t pcibr_dmamap)
{
- return (pcibr_dmamap->bd_pci_addr);
+ return pcibr_dmamap->bd_pci_addr;
}
/* =====================================================================
"pcibr_device_flags_set: Device(%d): 0x%x\n",
pciio_slot, devreg));
}
- return (1);
+ return 1;
}
/*
percent_allowed=(percent_allowed > 100) ? 100 : percent_allowed+1;
}
} else {
- return(ENODEV);
+ return -ENODEV;
}
- return(percent_allowed);
+ return percent_allowed;
}
/*
if (alloc && (rv != GRAPH_SUCCESS)) {
hint = kmalloc(sizeof (*(hint)), GFP_KERNEL);
- if ( !hint )
+ if ( !hint ) {
+ printk(KERN_WARNING "pcibr_hints_get(): unable to allocate "
+ "memory\n");
goto abnormal_exit;
+ }
memset(hint, 0, sizeof (*(hint)));
hint->rrb_alloc_funct = NULL;
abnormal_exit:
kfree(hint);
- return(NULL);
+ return NULL;
}
/* FIXME - compare_and_swap_ptr NOT ATOMIC */
if (*location == old_ptr) {
*location = new_ptr;
- return(1);
+ return 1;
}
else
- return(0);
+ return 0;
}
#endif
-unsigned pcibr_intr_bits(pciio_info_t info, pciio_intr_line_t lines, int nslots);
+unsigned int pcibr_intr_bits(pciio_info_t info, pciio_intr_line_t lines, int nslots);
pcibr_intr_t pcibr_intr_alloc(vertex_hdl_t, device_desc_t, pciio_intr_line_t, vertex_hdl_t);
void pcibr_intr_free(pcibr_intr_t);
void pcibr_setpciint(xtalk_intr_t);
* INTERRUPT MANAGEMENT
*/
-unsigned
+unsigned int
pcibr_intr_bits(pciio_info_t info,
pciio_intr_line_t lines, int nslots)
{
pcireg_wrb_flush_get(pcibr_soft, pciio_slot);
- return(0);
+ return 0;
}
/*
pcibr_soft = pcibr_soft_get(pcibr_vhdl);
if (!pcibr_soft)
- return(-EINVAL);
+ return -EINVAL;
if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(-EINVAL);
+ return -EINVAL;
/* How many RRBs are on this slot? */
vchan_total = NUMBER_VCHANNELS;
pcibr_soft->bs_rrb_valid[slot][3] = chan[3];
- return(-ENODEV);
+ return -ENODEV;
}
if ((pcibr_info->f_vendor == PCIIO_VENDOR_ID_NONE) &&
for (vchan = 0; vchan < vchan_total; vchan++)
pcibr_soft->bs_rrb_valid[slot][vchan] = 0;
- return(-ENODEV);
+ return -ENODEV;
}
for (vchan = 0; vchan < vchan_total; vchan++)
pcibr_soft->bs_rrb_valid[slot][vchan] = chan[vchan];
- return(0);
+ return 0;
}
/* Get the basic software information required to proceed */
pcibr_soft = pcibr_soft_get(pcibr_vhdl);
if (!pcibr_soft)
- return(EINVAL);
+ return -EINVAL;
if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(EINVAL);
+ return -EINVAL;
/* If we have a host slot (eg:- IOC3 has 2 PCI slots and the initialization
* is done by the host slot then we are done.
*/
if (pcibr_soft->bs_slot[slot].has_host) {
- return(0);
+ return 0;
}
/* Try to read the device-id/vendor-id from the config space */
cfgw = pcibr_slot_config_addr(pcibr_soft, slot, 0);
if (pcibr_probe_slot(pcibr_soft, cfgw, &idword))
- return(ENODEV);
+ return -ENODEV;
slotp = &pcibr_soft->bs_slot[slot];
slotp->slot_status |= SLOT_POWER_UP;
* and we are done.
*/
if (vendor == 0xFFFF)
- return(ENODEV);
+ return -ENODEV;
htype = do_pcibr_config_get(cfgw, PCI_CFG_HEADER_TYPE, 1);
nfunc = 1;
}
pcibr_infoh = kmalloc(nfunc*sizeof (*(pcibr_infoh)), GFP_KERNEL);
if ( !pcibr_infoh ) {
- return ENOMEM;
+ return -ENOMEM;
}
memset(pcibr_infoh, 0, nfunc*sizeof (*(pcibr_infoh)));
} /* next win */
} /* next func */
- return(0);
+ return 0;
}
/*
/* Check to see if there is a capabilities pointer in the cfg header */
if (!(do_pcibr_config_get(cfgw, PCI_CFG_STATUS, 2) & PCI_STAT_CAP_LIST)) {
- return (NULL);
+ return NULL;
}
/*
while (cap_nxt && (defend_against_circular_linkedlist <= 48)) {
cap_id = do_pcibr_config_get(cfgw, cap_nxt, 1);
if (cap_id == capability) {
- return ((cfg_p)((char *)cfgw + cap_nxt));
+ return (cfg_p)((char *)cfgw + cap_nxt);
}
cap_nxt = (do_pcibr_config_get(cfgw, cap_nxt+1, 1) & 0xfc);
defend_against_circular_linkedlist++;
}
- return (NULL);
+ return NULL;
}
/*
pcibr_soft = pcibr_soft_get(pcibr_vhdl);
if (!pcibr_soft)
- return(EINVAL);
+ return -EINVAL;
if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(EINVAL);
+ return -EINVAL;
nfunc = pcibr_soft->bs_slot[slot].bss_ninfo;
kfree(pcibr_infoh);
pcibr_soft->bs_slot[slot].bss_ninfo = 0;
- return(0);
+ return 0;
}
/*
int func;
if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(EINVAL);
+ return -EINVAL;
if ((nfunc = pcibr_soft->bs_slot[slot].bss_ninfo) < 1)
- return(EINVAL);
+ return -EINVAL;
if (!(pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos))
- return(EINVAL);
+ return -EINVAL;
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_RBAR, pcibr_soft->bs_vhdl,
"pcibr_slot_pcix_rbar_init for slot %d\n",
pcibr_soft->bs_pcix_rbar_inuse,
pcibr_soft->bs_pcix_rbar_avail));
}
- return(0);
+ return 0;
}
int as_debug = 0;
pcibr_soft = pcibr_soft_get(pcibr_vhdl);
if (!pcibr_soft)
- return(EINVAL);
+ return -EINVAL;
if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(EINVAL);
+ return -EINVAL;
/* allocate address space,
* for windows that have not been
* previously assigned.
*/
if (pcibr_soft->bs_slot[slot].has_host) {
- return(0);
+ return 0;
}
nfunc = pcibr_soft->bs_slot[slot].bss_ninfo;
if (nfunc < 1)
- return(EINVAL);
+ return -EINVAL;
pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos;
if (!pcibr_infoh)
- return(EINVAL);
+ return -EINVAL;
/*
* Try to make the DevIO windows not
do_pcibr_config_set(cfgw, PCI_CFG_COMMAND, 4,
pci_cfg_cmd_reg | pci_cfg_cmd_reg_add);
} /* next func */
- return(rc);
+ return rc;
}
/*
pcibr_soft = pcibr_soft_get(pcibr_vhdl);
if (!pcibr_soft)
- return(EINVAL);
+ return -EINVAL;
if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(EINVAL);
+ return -EINVAL;
/*
* Adjustments to Device(x) and init of bss_device shadow
PCIBR_DEBUG_ALWAYS((PCIBR_DEBUG_DEVREG, pcibr_vhdl,
"pcibr_slot_device_init: Device(%d): 0x%x\n",
slot, devreg));
- return(0);
+ return 0;
}
/*
pcibr_soft = pcibr_soft_get(pcibr_vhdl);
if (!pcibr_soft)
- return(EINVAL);
+ return -EINVAL;
if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(EINVAL);
+ return -EINVAL;
slotp = &pcibr_soft->bs_slot[slot];
if (pcibr_soft->bs_slot[slot].bss_ninfo < 1) {
pcibr_infoh = kmalloc(sizeof (*(pcibr_infoh)), GFP_KERNEL);
if ( !pcibr_infoh ) {
- return ENOMEM;
+ return -ENOMEM;
}
memset(pcibr_infoh, 0, sizeof (*(pcibr_infoh)));
EDGE_LBL_GUEST);
}
- return(0);
+ return 0;
}
pcibr_soft = pcibr_soft_get(pcibr_vhdl);
if (!pcibr_soft)
- return(EINVAL);
+ return -EINVAL;
if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(EINVAL);
+ return -EINVAL;
if (pcibr_soft->bs_slot[slot].has_host) {
- return(EPERM);
+ return -EPERM;
}
xconn_vhdl = pcibr_soft->bs_conn;
pcibr_soft->bs_slot[slot].slot_status |= SLOT_STARTUP_CMPLT;
}
- return(error);
+ return error;
}
/*
pcibr_soft = pcibr_soft_get(pcibr_vhdl);
if (!pcibr_soft)
- return(EINVAL);
+ return -EINVAL;
if (!PCIBR_VALID_SLOT(pcibr_soft, slot))
- return(EINVAL);
+ return -EINVAL;
if (pcibr_soft->bs_slot[slot].has_host)
- return(EPERM);
+ return -EPERM;
nfunc = pcibr_soft->bs_slot[slot].bss_ninfo;
pcibr_infoh = pcibr_soft->bs_slot[slot].bss_infos;
pcibr_soft->bs_slot[slot].slot_status |= SLOT_SHUTDOWN_CMPLT;
}
- return(error);
+ return error;
}
/*
*sub_errorp = error;
if (l1_msg)
;
- return(PCI_SLOT_DRV_DETACH_ERR);
+ return PCI_SLOT_DRV_DETACH_ERR;
}
/* Recalculate the RBARs for all the devices on the bus since we've
(void)pcibr_slot_pcix_rbar_init(pcibr_soft, tmp_slot);
}
- return (0);
+ return 0;
}
? &win_info_p->w_win_alloc
: NULL,
start, size, align);
- return(iopaddr);
+ return iopaddr;
}
pciio_info = kmalloc(sizeof (*(pciio_info)), GFP_KERNEL);
if ( pciio_info )
memset(pciio_info, 0, sizeof (*(pciio_info)));
+ else {
+ printk(KERN_WARNING "pciio_device_info_new(): Unable to "
+ "allocate memory\n");
+ return NULL;
+ }
}
- ASSERT(pciio_info != NULL);
-
pciio_info->c_slot = slot;
pciio_info->c_func = func;
pciio_info->c_vendor = vendor_id;
pciio_info->c_slot,
pciio_info->c_func);
- hwgraph_edge_remove(connectpt,name,&pconn);
pciio_info_set(pconn,0);
- /* Remove the link to our pci provider */
- hwgraph_edge_remove(pconn, EDGE_LBL_MASTER, NULL);
-
-
hwgraph_vertex_unref(pconn);
hwgraph_vertex_destroy(pconn);
(arbitrary_info_t *)&widget_info) == GRAPH_SUCCESS) {
peer_widget_info = kmalloc(sizeof (*(peer_widget_info)), GFP_KERNEL);
if ( !peer_widget_info ) {
- return 0;
+ return -ENOMEM;
}
memset(peer_widget_info, 0, sizeof (*(peer_widget_info)));
*/
pcibr_soft = kmalloc(sizeof (*(pcibr_soft)), GFP_KERNEL);
if ( !pcibr_soft )
- return -1;
+ return -ENOMEM;
self = kmalloc(sizeof (*(self)), GFP_KERNEL);
if ( !self ) {
kfree(pcibr_soft);
- return -1;
+ return -ENOMEM;
}
memset(pcibr_soft, 0, sizeof (*(pcibr_soft)));
memset(self, 0, sizeof (*(self)));
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/smp.h>
+#include <asm/delay.h>
#include <asm/sn/sgi.h>
#include <asm/sn/io.h>
#include <asm/sn/iograph.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/interrupt.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <asm/sn/sgi.h>
#include <asm/sn/sn2/sn_private.h>
#include <asm/sn/iograph.h>
#include <asm/sn/simulator.h>
#include <asm/sn/hcl.h>
#include <asm/sn/hcl_util.h>
+#include <asm/sn/pci/pcibr_private.h>
/* #define DEBUG 1 */
/* #define XBOW_DEBUG 1 */
* completely disappear.
*/
-#define NEW(ptr) (ptr = kmalloc(sizeof (*(ptr)), GFP_KERNEL))
-#define DEL(ptr) (kfree(ptr))
-
char widget_info_fingerprint[] = "widget_info";
/* =====================================================================
char *s,devnm[MAXDEVNAME];
/* Allocate widget_info and associate it with widget vertex */
- NEW(widget_info);
+ widget_info = kmalloc(sizeof(*widget_info), GFP_KERNEL);
+ if (!widget_info)
+ return - ENOMEM;
/* Initialize widget_info */
widget_info->w_vertex = widget;
/* Make sure that we have valid widget information initialized */
if (!(widget_info = xwidget_info_get(widget)))
- return(1);
+ return 1;
hwid = &(widget_info->w_hwid);
- /* Clean out the xwidget information */
- (void)kfree(widget_info->w_name);
- memset((void *)widget_info, 0, sizeof(widget_info));
- DEL(widget_info);
-
- return(0);
+ kfree(widget_info->w_name);
+ kfree(widget_info);
+ return 0;
}
void
#include <linux/types.h>
#include <linux/slab.h>
+#include <asm/errno.h>
#include <asm/sn/sgi.h>
#include <asm/sn/driver.h>
#include <asm/sn/iograph.h>
#include <asm/sn/xtalk/xwidget.h>
#include <asm/sn/xtalk/xtalk_private.h>
-#define NEW(ptr) (ptr = kmalloc(sizeof (*(ptr)), GFP_KERNEL))
-#define DEL(ptr) (kfree(ptr))
/*
* This file provides generic support for Crosstalk
if (xswitch_info == NULL) {
int port;
- NEW(xswitch_info);
+ xswitch_info = kmalloc(sizeof(*xswitch_info), GFP_KERNEL);
+ if (!xswitch_info) {
+ printk(KERN_WARNING "xswitch_info_new(): Unable to "
+ "allocate memory\n");
+ return NULL;
+ }
xswitch_info->census = 0;
for (port = 0; port <= XSWITCH_CENSUS_PORT_MAX; port++) {
xswitch_info_vhdl_set(xswitch_info, port,
*/
#include <linux/config.h>
+#include <asm/sn/sgi.h>
#include <asm/sn/nodepda.h>
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/pda.h>
#include <asm/sn/sn2/shubio.h>
#include <asm/nodedata.h>
+#include <asm/delay.h>
#include <linux/bootmem.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/timer.h>
+#include <asm/sn/sgi.h>
#include <asm/mca.h>
#include <asm/sal.h>
#include <asm/sn/sn_sal.h>
* Copyright (c) 2000-2003 Silicon Graphics, Inc. All rights reserved.
*/
+#include <asm/sn/sgi.h>
#include <asm/sn/sn_sal.h>
/**
#include <linux/proc_fs.h>
#include <asm/system.h>
#include <asm/io.h>
+#include <asm/sn/sn2/addrs.h>
#include <asm/sn/simulator.h>
/* to lookup nasids */
#include <asm/processor.h>
#include <asm/irq.h>
+#include <asm/sn/sgi.h>
#include <asm/sal.h>
#include <asm/system.h>
#include <asm/delay.h>
#ifdef CONFIG_PROC_FS
#include <linux/proc_fs.h>
+#include <asm/sn/sgi.h>
#include <asm/sn/sn_sal.h>
#include <linux/circ_buf.h>
#include <linux/serial_reg.h>
#include <asm/uaccess.h>
+#include <asm/sn/sgi.h>
#include <asm/sn/sn_sal.h>
#include <asm/sn/pci/pciio.h>
#include <asm/sn/simulator.h>
#ifndef _ASM_IA64_SN_ADDRS_H
#define _ASM_IA64_SN_ADDRS_H
-#include <linux/config.h>
-
#include <asm/sn/sn2/addrs.h>
#ifndef __ASSEMBLY__
* the base of the register space.
*/
#define HUB_REG_PTR(_base, _off) \
- (HUBREG_CAST ((__psunsigned_t)(_base) + (__psunsigned_t)(_off)))
+ (HUBREG_CAST ((unsigned long)(_base) + (__psunsigned_t)(_off)))
#define HUB_REG_PTR_L(_base, _off) \
HUB_L(HUB_REG_PTR((_base), (_off)))
/* Create an Address/Length List, and clear it of all entries. */
-extern alenlist_t alenlist_create(unsigned flags);
+extern alenlist_t alenlist_create(unsigned int flags);
/* Grow/shrink an Address/Length List and FIX its size. */
extern int alenlist_grow(alenlist_t, size_t npairs);
extern int alenlist_append(alenlist_t alenlist, /* append to this list */
alenaddr_t address, /* address to append */
size_t length, /* length to append */
- unsigned flags);
+ unsigned int flags);
/*
* Replace a Pair in the middle of a List, and return old values.
alenlist_cursor_t cursorp, /* inout: which item to replace */
alenaddr_t *addrp, /* inout: address */
size_t *lengthp, /* inout: length */
- unsigned flags);
+ unsigned int flags);
/* Get the next Pair from a List */
size_t maxlength, /* in: at most length */
alenaddr_t *addr, /* out: address */
size_t *length, /* out: length */
- unsigned flags);
+ unsigned int flags);
/* Return the number of Pairs stored in this List */
/* Create a copy of an Address/Length List */
extern alenlist_t alenlist_clone(alenlist_t old, /* clone this list */
- unsigned flags);
+ unsigned int flags);
/* Allocate and initialize an Address/Length List Cursor */
-extern alenlist_cursor_t alenlist_cursor_create(alenlist_t alenlist, unsigned flags);
+extern alenlist_cursor_t alenlist_cursor_create(alenlist_t alenlist, unsigned int flags);
/* Free an Address/Length List Cursor */
extern void alenlist_cursor_destroy(alenlist_cursor_t cursorp);
extern alenlist_t kvaddr_to_alenlist( alenlist_t alenlist,
caddr_t kvaddr,
size_t length,
- unsigned flags);
+ unsigned int flags);
/* Convert from a User Virtual Address to a Physical Address/Length List */
extern alenlist_t uvaddr_to_alenlist( alenlist_t alenlist,
uvaddr_t vaddr,
size_t length,
- unsigned flags);
+ unsigned int flags);
/* Convert from a buf struct to a Physical Address/Length List */
struct buf;
extern alenlist_t buf_to_alenlist( alenlist_t alenlist,
struct buf *buf,
- unsigned flags);
+ unsigned int flags);
/*
#ifndef _ASM_IA64_SN_ARCH_H
#define _ASM_IA64_SN_ARCH_H
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <linux/mmzone.h>
+#include <asm/types.h>
#include <asm/sn/types.h>
-
-#include <asm/sn/sn2/arch.h>
+#include <asm/sn/sn_cpuid.h>
typedef u64 shubreg_t;
typedef u64 hubreg_t;
#include <linux/timer.h>
#include <linux/spinlock.h>
#include <linux/cache.h>
-#include <asm/sn/io.h>
-#include <asm/delay.h>
+#include <asm/sn/types.h>
/* #define BTE_DEBUG */
#ifndef _ASM_IA64_SN_CLKSUPPORT_H
#define _ASM_IA64_SN_CLKSUPPORT_H
-#include <linux/config.h>
#include <asm/sn/arch.h>
-#include <asm/sn/addrs.h>
typedef long clkreg_t;
struct piomap;
struct dmamap;
-typedef __psunsigned_t iobush_t;
+typedef unsigned long iobush_t;
/* interrupt function */
typedef void *intr_arg_t;
#ifndef _ASM_IA64_SN_HCL_H
#define _ASM_IA64_SN_HCL_H
+#include <linux/fs.h>
#include <asm/sn/sgi.h>
extern vertex_hdl_t hwgraph_root;
#define hwgraph_connectpt_set labelcl_info_connectpt_set
#define hwgraph_generate_path hwgfs_generate_path
#define hwgraph_path_to_vertex(a) hwgfs_find_handle(NULL, a, 0, 0, 0, 1)
-#define hwgraph_edge_remove(a,b,c)
#define hwgraph_vertex_unref(a)
/*
#ifndef _ASM_IA64_SN_HCL_UTIL_H
#define _ASM_IA64_SN_HCL_UTIL_H
+#include <asm/sn/sgi.h>
+
extern char * dev_to_name(vertex_hdl_t, char *, unsigned int);
extern int device_master_set(vertex_hdl_t, vertex_hdl_t);
extern vertex_hdl_t device_master_get(vertex_hdl_t);
*
* Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved.
*/
+
+#include <asm/types.h>
+
typedef struct dentry *hwgfs_handle_t;
extern hwgfs_handle_t hwgfs_register(hwgfs_handle_t dir, const char *name,
void init_all_devices(void);
#endif /* __KERNEL__ */
+#include <asm/sn/sgi.h>
#include <asm/sn/xtalk/xbow.h> /* For get MAX_PORT_NUM */
int io_brick_map_widget(int, int);
typedef struct console_s {
- __psunsigned_t uart_base;
- __psunsigned_t config_base;
- __psunsigned_t memory_base;
+ unsigned long uart_base;
+ unsigned long config_base;
+ unsigned long memory_base;
short baud;
short flag;
int type;
/* --- New Macros for the changed kl_config_hdr_t structure --- */
#define PTR_CH_CONS_INFO(_k) ((console_t *)\
- ((__psunsigned_t)_k + (_k->ch_cons_off)))
+ ((unsigned long)_k + (_k->ch_cons_off)))
#define KL_CONFIG_CH_CONS_INFO(_n) PTR_CH_CONS_INFO(KL_CONFIG_HDR(_n))
#ifndef _ASM_IA64_SN_KLDIR_H
#define _ASM_IA64_SN_KLDIR_H
-#include <asm/sn/sgi.h>
+#include <linux/types.h>
/*
* The kldir memory area resides at a fixed place in each node's memory and
typedef struct kldir_ent_s {
u64 magic; /* Indicates validity of entry */
off_t offset; /* Offset from start of node space */
- __psunsigned_t pointer; /* Pointer to area in some cases */
+ unsigned long pointer; /* Pointer to area in some cases */
size_t size; /* Size in bytes */
u64 count; /* Repeat count if array, 1 if not */
size_t stride; /* Stride if array, 0 if not */
#endif
-#include <linux/config.h>
+#include <asm/semaphore.h>
#include <asm/sn/klconfig.h>
#include <asm/sn/ksys/elsc.h>
#define _ASM_IA64_SN_NODEPDA_H
-#include <linux/config.h>
-#include <asm/sn/sgi.h>
+#include <asm/semaphore.h>
#include <asm/irq.h>
#include <asm/sn/intr.h>
#include <asm/sn/router.h>
#include <asm/sn/pda.h>
#include <asm/sn/module.h>
#include <asm/sn/bte.h>
+#include <asm/sn/sn2/arch.h>
/*
* NUMA Node-Specific Data structures are defined in this file.
/* 0x020000-0x027FFF -- PCI Device Configuration Spaces */
union { /* make all access sizes available. */
- uchar_t c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */
+ unsigned char c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */
uint16_t s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */
uint32_t l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */
uint64_t d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */
union {
- uchar_t c[0x100 / 1];
+ unsigned char c[0x100 / 1];
uint16_t s[0x100 / 2];
uint32_t l[0x100 / 4];
uint64_t d[0x100 / 8];
/* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */
union { /* make all access sizes available. */
- uchar_t c[0x1000 / 1];
+ unsigned char c[0x1000 / 1];
uint16_t s[0x1000 / 2];
uint32_t l[0x1000 / 4];
uint64_t d[0x1000 / 8];
union {
- uchar_t c[0x100 / 1];
+ unsigned char c[0x100 / 1];
uint16_t s[0x100 / 2];
uint32_t l[0x100 / 4];
uint64_t d[0x100 / 8];
/* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */
union {
- uchar_t c[8 / 1];
+ unsigned char c[8 / 1];
uint16_t s[8 / 2];
uint32_t l[8 / 4];
uint64_t d[8 / 8];
} b_pci_iack; /* 0x030000-0x030007 */
- uchar_t _pad_030007[0x04fff8]; /* 0x030008-0x07FFFF */
+ unsigned char _pad_030007[0x04fff8]; /* 0x030008-0x07FFFF */
/* 0x080000-0x0FFFFF -- External Address Translation Entry RAM */
bridge_ate_t b_ext_ate_ram[0x10000];
/* 0x200000-0xBFFFFF -- PCI/GIO Device Spaces */
union { /* make all access sizes available. */
- uchar_t c[0x100000 / 1];
+ unsigned char c[0x100000 / 1];
uint16_t s[0x100000 / 2];
uint32_t l[0x100000 / 4];
uint64_t d[0x100000 / 8];
/* 0xC00000-0xFFFFFF -- External Flash Proms 1,0 */
union { /* make all access sizes available. */
- uchar_t c[0x400000 / 1]; /* read-only */
+ unsigned char c[0x400000 / 1]; /* read-only */
uint16_t s[0x400000 / 2]; /* read-write */
uint32_t l[0x400000 / 4]; /* read-only */
uint64_t d[0x400000 / 8]; /* read-only */
*/
#define PCIBR_WAR_ENABLED(pv, pcibr_soft) \
((1 << XWIDGET_PART_REV_NUM_REV(pcibr_soft->bs_rev_num)) & pv)
-/*
- * Defines for individual WARs. Each is a bitmask of applicable
- * part revision numbers. (1 << 1) == rev A, (1 << 2) == rev B,
- * (3 << 1) == (rev A or rev B), etc
- */
-#define PV854697 (~0) /* PIC: write 64bit regs as 64bits. permanent */
-#define PV854827 (~0) /* PIC: fake widget 0xf presence bit. permanent */
-#define PV855271 (1 << 1) /* PIC: use virt chan iff 64-bit device. */
-#define PV878674 (~0) /* PIC: Dont allow 64bit PIOs. permanent */
-#define PV855272 (1 << 1) /* PIC: runaway interrupt WAR */
-#define PV856155 (1 << 1) /* PIC: arbitration WAR */
-#define PV856864 (1 << 1) /* PIC: lower timeout to free TNUMs quicker */
-#define PV856866 (1 << 1) /* PIC: avoid rrb's 0/1/8/9. */
-#define PV862253 (1 << 1) /* PIC: don't enable write req RAM parity checking */
-#define PV867308 (3 << 1) /* PIC: make LLP error interrupts FATAL for PIC */
/* defines for pcibr_soft_s->bs_bridge_mode */
#define PCIBR_BRIDGEMODE_PCI_33 0x0
iopaddr_t pcipio_addr, /* starting address */
size_t byte_count,
size_t byte_count_max, /* maximum size of a mapping */
- unsigned flags); /* defined in sys/pio.h */
+ unsigned int flags); /* defined in sys/pio.h */
typedef void
pciio_piomap_free_f (pciio_piomap_t pciio_piomap);
pciio_space_t space, /* which address space */
iopaddr_t pciio_addr, /* starting address */
size_t byte_count, /* map this many bytes */
- unsigned flags);
+ unsigned int flags);
typedef caddr_t
pciio_pio_addr_f (vertex_hdl_t dev, /* translate for this device */
iopaddr_t pciio_addr, /* starting address */
size_t byte_count, /* map this many bytes */
pciio_piomap_t *mapp, /* in case a piomap was needed */
- unsigned flags);
+ unsigned int flags);
typedef iopaddr_t
pciio_piospace_alloc_f (vertex_hdl_t dev, /* PIO space for this device */
pciio_dmamap_alloc_f (vertex_hdl_t dev, /* set up mappings for this device */
device_desc_t dev_desc, /* device descriptor */
size_t byte_count_max, /* max size of a mapping */
- unsigned flags); /* defined in dma.h */
+ unsigned int flags); /* defined in dma.h */
typedef void
pciio_dmamap_free_f (pciio_dmamap_t dmamap);
device_desc_t dev_desc, /* device descriptor */
paddr_t paddr, /* system physical address */
size_t byte_count, /* length */
- unsigned flags); /* defined in dma.h */
+ unsigned int flags); /* defined in dma.h */
typedef void
pciio_dmamap_drain_f (pciio_dmamap_t map);
typedef uint64_t
pciio_config_get_f (vertex_hdl_t conn, /* pci connection point */
- unsigned reg, /* register byte offset */
- unsigned size); /* width in bytes (1..4) */
+ unsigned int reg, /* register byte offset */
+ unsigned int size); /* width in bytes (1..4) */
typedef void
pciio_config_set_f (vertex_hdl_t conn, /* pci connection point */
- unsigned reg, /* register byte offset */
- unsigned size, /* width in bytes (1..4) */
+ unsigned int reg, /* register byte offset */
+ unsigned int size, /* width in bytes (1..4) */
uint64_t value); /* value to store */
typedef pciio_slot_t
pciio_driver_register (pciio_vendor_id_t vendor_id, /* card's vendor number */
pciio_device_id_t device_id, /* card's device number */
char *driver_prefix, /* driver prefix */
- unsigned flags);
+ unsigned int flags);
extern void
pciio_error_register (vertex_hdl_t pconn, /* which slot */
* All PCI providers set up PIO using this information.
*/
struct pciio_piomap_s {
- unsigned pp_flags; /* PCIIO_PIOMAP flags */
+ unsigned int pp_flags; /* PCIIO_PIOMAP flags */
vertex_hdl_t pp_dev; /* associated pci card */
pciio_slot_t pp_slot; /* which slot the card is in */
pciio_space_t pp_space; /* which address space */
* All PCI providers set up DMA using this information.
*/
struct pciio_dmamap_s {
- unsigned pd_flags; /* PCIIO_DMAMAP flags */
+ unsigned int pd_flags; /* PCIIO_DMAMAP flags */
vertex_hdl_t pd_dev; /* associated pci card */
pciio_slot_t pd_slot; /* which slot the card is in */
};
*/
struct pciio_intr_s {
- unsigned pi_flags; /* PCIIO_INTR flags */
+ unsigned int pi_flags; /* PCIIO_INTR flags */
vertex_hdl_t pi_dev; /* associated pci card */
device_desc_t pi_dev_desc; /* override device descriptor */
pciio_intr_line_t pi_lines; /* which interrupt line(s) */
#ifndef _ASM_IA64_SN_PDA_H
#define _ASM_IA64_SN_PDA_H
-#include <linux/config.h>
#include <linux/cache.h>
#include <asm/percpu.h>
#include <asm/system.h>
-#include <asm/processor.h>
-#include <asm/page.h>
#include <asm/sn/bte.h>
#ifndef _ASM_IA64_SN_PIO_H
#define _ASM_IA64_SN_PIO_H
-#include <linux/types.h>
-#include <asm/sn/sgi.h>
-#include <asm/sn/driver.h>
+#include <asm/sn/types.h>
/*
* pioaddr_t - The kernel virtual address that a PIO can be done upon.
* to long mostly, just cast for other sizes.
*/
-typedef volatile ulong* pioaddr_t;
+typedef volatile unsigned long* pioaddr_t;
/*
* iopaddr_t - the physical io space relative address (e.g. VME A16S 0x0800).
#include <asm/sn/types.h>
#include <asm/uaccess.h> /* for copy_??_user */
-#include <linux/mm.h>
-#include <linux/fs.h>
#include <asm/sn/hwgfs.h>
typedef hwgfs_handle_t vertex_hdl_t;
#define CPU_NONE (-1)
#define GRAPH_VERTEX_NONE ((vertex_hdl_t)-1)
+/*
+ * Defines for individual WARs. Each is a bitmask of applicable
+ * part revision numbers. (1 << 1) == rev A, (1 << 2) == rev B,
+ * (3 << 1) == (rev A or rev B), etc
+ */
+#define PV854697 (~0) /* PIC: write 64bit regs as 64bits. permanent */
+#define PV854827 (~0UL) /* PIC: fake widget 0xf presence bit. permanent */
+#define PV855271 (1 << 1) /* PIC: use virt chan iff 64-bit device. */
+#define PV878674 (~0) /* PIC: Dont allow 64bit PIOs. permanent */
+#define PV855272 (1 << 1) /* PIC: runaway interrupt WAR */
+#define PV856155 (1 << 1) /* PIC: arbitration WAR */
+#define PV856864 (1 << 1) /* PIC: lower timeout to free TNUMs quicker */
+#define PV856866 (1 << 1) /* PIC: avoid rrb's 0/1/8/9. */
+#define PV862253 (1 << 1) /* PIC: don't enable write req RAM parity checking */
+#define PV867308 (3 << 1) /* PIC: make LLP error interrupts FATAL for PIC */
/*
* No code is complete without an Assertion macro
#ifndef _ASM_IA64_SN_SN2_ARCH_H
#define _ASM_IA64_SN_SN2_ARCH_H
-#include <asm/types.h>
-
-
#define CPUS_PER_NODE 4 /* CPUs on a single hub */
#define CPUS_PER_SUBNODE 4 /* CPUs on a single hub PI */
#ifndef _ASM_IA64_SN_SN2_SN_PRIVATE_H
#define _ASM_IA64_SN_SN2_SN_PRIVATE_H
+#include <linux/wait.h>
#include <asm/sn/nodepda.h>
#include <asm/sn/io.h>
#include <asm/sn/xtalk/xwidget.h>
extern void mem_init(void);
extern void cpu_unenable(cpuid_t);
extern nasid_t get_lowest_nasid(void);
-extern __psunsigned_t get_master_bridge_base(void);
+extern unsigned long get_master_bridge_base(void);
extern int check_nasid_equiv(nasid_t, nasid_t);
extern char get_console_pcislot(void);
xwidgetnum_t test_wid);
/* memsupport.c */
-extern void poison_state_alter_range(__psunsigned_t start, int len, int poison);
+extern void poison_state_alter_range(unsigned long start, int len, int poison);
extern int memory_present(paddr_t);
extern int memory_read_accessible(paddr_t);
extern int memory_write_accessible(paddr_t);
/* klnuma.c */
extern void replicate_kernel_text(int numnodes);
-extern __psunsigned_t get_freemem_start(cnodeid_t cnode);
+extern unsigned long get_freemem_start(cnodeid_t cnode);
extern void setup_replication_mask(int maxnodes);
/* init.c */
/* Used for debugger to signal upper software a breakpoint has taken place */
extern void *debugger_update;
-extern __psunsigned_t debugger_stopped;
+extern unsigned long debugger_stopped;
/*
* piomap, created by shub_pio_alloc.
#define paddr_cnode(_pa) (NASID_TO_COMPACT_NODEID(NASID_GET(_pa)))
extern void membank_pathname_get(paddr_t, char *);
-/* To redirect the output into the error buffer */
-#define errbuf_print(_s) printf("#%s",_s)
-
extern void crbx(nasid_t nasid, void (*pf) (char *, ...));
void bootstrap(void);
#include <linux/config.h>
#include <linux/smp.h>
-#include <linux/sched.h>
-#include <linux/mmzone.h>
-#include <asm/sn/types.h>
-#include <asm/current.h>
-#include <asm/nodedata.h>
#include <asm/sn/pda.h>
+#include <asm/intrinsics.h>
/*
#ifndef _ASM_IA64_SN_SN_PRIVATE_H
#define _ASM_IA64_SN_SN_PRIVATE_H
-#include <linux/config.h>
-#include <asm/sn/nodepda.h>
-#include <asm/sn/xtalk/xwidget.h>
-#include <asm/sn/xtalk/xtalk_private.h>
-
#include <asm/sn/sn2/sn_private.h>
#endif /* _ASM_IA64_SN_SN_PRIVATE_H */
#ifndef _ASM_IA64_SN_TYPES_H
#define _ASM_IA64_SN_TYPES_H
-#include <linux/config.h>
-#include <linux/types.h>
-
typedef unsigned long cpuid_t;
typedef signed short nasid_t; /* node id in numa-as-id space */
typedef signed char partid_t; /* partition ID type */
typedef unsigned int moduleid_t; /* user-visible module number type */
typedef unsigned int cmoduleid_t; /* kernel compact module id type */
-typedef signed char slabid_t;
+typedef signed char slabid_t;
typedef unsigned char clusterid_t; /* Clusterid of the cell */
-typedef uint64_t __psunsigned_t;
-
typedef unsigned long iopaddr_t;
-typedef unsigned char uchar_t;
typedef unsigned long paddr_t;
typedef unsigned long pfn_t;
typedef short cnodeid_t;
#ifndef _ASM_IA64_SN_VECTOR_H
#define _ASM_IA64_SN_VECTOR_H
-#include <linux/config.h>
-
#define NET_VEC_NULL ((net_vec_t) 0)
#define NET_VEC_BAD ((net_vec_t) -1)
* xbow.h - header file for crossbow chip and xbow section of xbridge
*/
-#include <linux/config.h>
+#include <asm/types.h>
#include <asm/sn/xtalk/xtalk.h>
#include <asm/sn/xtalk/xwidget.h>
#include <asm/sn/xtalk/xswitch.h>
#ifndef __ASSEMBLY__
typedef uint32_t xbowreg_t;
-#define XBOWCONST (xbowreg_t)
-
-/* Generic xbow register, given base and offset */
-#define XBOW_REG_PTR(base, offset) ((volatile xbowreg_t*) \
- ((__psunsigned_t)(base) + (__psunsigned_t)(offset)))
-
/* Register set for each xbow link */
typedef volatile struct xb_linkregs_s {
/*
/* of the widget0 address space (before 0xf4) */
#define XBOW_WID_UNDEF 0xe4
-/* pointer to link arbitration register, given xbow base, dst and src widget id */
-#define XBOW_PRIO_ARBREG_PTR(base, dst_wid, src_wid) \
- XBOW_REG_PTR(XBOW_PRIO_LINKREGS_PTR(base, dst_wid), XBOW_ARB_OFF(src_wid))
-
-/* pointer to link registers base, given xbow base and destination widget id */
-#define XBOW_PRIO_LINKREGS_PTR(base, dst_wid) (xb_linkregs_t*) \
- XBOW_REG_PTR(base, XB_LINK_REG_BASE(dst_wid))
-
/* xbow link register set base, legal value for x is 0x8..0xf */
#define XB_LINK_BASE 0x100
#define XB_LINK_OFFSET 0x40
XWIDGET_MFG_NUM(wid) == XXBOW_WIDGET_MFGR_NUM)
#define XBOW_WAR_ENABLED(pv, widid) ((1 << XWIDGET_REV_NUM(widid)) & pv)
-#define PV854827 (~0) /* PIC: fake widget 0xf presence bit. permanent */
-#define PV863579 (1 << 1) /* PIC: PIO to PIC register */
-
#ifndef __ASSEMBLY__
/*
iopaddr_t xtalk_addr, /* map for this xtalk_addr range */
size_t byte_count,
size_t byte_count_max, /* maximum size of a mapping */
- unsigned flags); /* defined in sys/pio.h */
+ unsigned int flags); /* defined in sys/pio.h */
typedef void
xtalk_piomap_free_f (xtalk_piomap_t xtalk_piomap);
device_desc_t dev_desc, /* device descriptor */
iopaddr_t xtalk_addr, /* Crosstalk address */
size_t byte_count, /* map this many bytes */
- unsigned flags); /* (currently unused) */
+ unsigned int flags); /* (currently unused) */
extern caddr_t
xtalk_pio_addr (vertex_hdl_t dev, /* translate for this device */
iopaddr_t xtalk_addr, /* Crosstalk address */
size_t byte_count, /* map this many bytes */
xtalk_piomap_t *xtalk_piomapp, /* RETURNS mapping resources */
- unsigned flags); /* (currently unused) */
+ unsigned int flags); /* (currently unused) */
/* DMA MANAGEMENT */
xtalk_dmamap_alloc_f (vertex_hdl_t dev, /* set up mappings for this device */
device_desc_t dev_desc, /* device descriptor */
size_t byte_count_max, /* max size of a mapping */
- unsigned flags); /* defined in dma.h */
+ unsigned int flags); /* defined in dma.h */
typedef void
xtalk_dmamap_free_f (xtalk_dmamap_t dmamap);
typedef alenlist_t
xtalk_dmamap_list_f (xtalk_dmamap_t dmamap, /* use these mapping resources */
alenlist_t alenlist, /* map this address/length list */
- unsigned flags);
+ unsigned int flags);
typedef void
xtalk_dmamap_done_f (xtalk_dmamap_t dmamap);
device_desc_t dev_desc, /* device descriptor */
paddr_t paddr, /* system physical address */
size_t byte_count, /* length */
- unsigned flags);
+ unsigned int flags);
typedef alenlist_t
xtalk_dmatrans_list_f (vertex_hdl_t dev, /* translate for this device */
device_desc_t dev_desc, /* device descriptor */
alenlist_t palenlist, /* system address/length list */
- unsigned flags);
+ unsigned int flags);
typedef void
xtalk_dmamap_drain_f (xtalk_dmamap_t map); /* drain this map's channel */
int which,
iopaddr_t xtalk_addr,
size_t byte_count,
- unsigned flags);
+ unsigned int flags);
/*
* Adapters that provide a crosstalk interface adhere to this software interface.
} widget_cfg_t;
typedef struct {
- unsigned other:8;
- unsigned bo:1;
- unsigned error:1;
- unsigned vbpm:1;
- unsigned gbr:1;
- unsigned ds:2;
- unsigned ct:1;
- unsigned tnum:5;
- unsigned pactyp:4;
- unsigned sidn:4;
- unsigned didn:4;
+ unsigned int other:8;
+ unsigned int bo:1;
+ unsigned int error:1;
+ unsigned int vbpm:1;
+ unsigned int gbr:1;
+ unsigned int ds:2;
+ unsigned int ct:1;
+ unsigned int tnum:5;
+ unsigned int pactyp:4;
+ unsigned int sidn:4;
+ unsigned int didn:4;
} w_err_cmd_word_f;
typedef union {
extern int xwidget_driver_register(xwidget_part_num_t part_num,
xwidget_mfg_num_t mfg_num,
char *driver_prefix,
- unsigned flags);
+ unsigned int flags);
extern void xwidget_driver_unregister(char *driver_prefix);
* However, since nobody looks inside ...
*/
typedef struct v_widget_s {
- unsigned v_widget_s_is_really_empty;
+ unsigned int v_widget_s_is_really_empty;
#define v_widget_s_is_really_empty and using this would be a syntax error.
} v_widget_t;
#endif /* _KERNEL */
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