will run on a 386 class machine.
- "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
- - "586" for generic Pentium CPUs, possibly lacking the TSC
+ - "586" for generic Pentium CPUs lacking the TSC
(time stamp counter) register.
- "Pentium-Classic" for the Intel Pentium.
- "Pentium-MMX" for the Intel Pentium MMX.
CONFIG_M586
Select this for an x586 or x686 processor such as the AMD K5, the
Intel 5x86 or 6x86, or the Intel 6x86MX. This choice does not
- assume the RDTSC instruction.
+ assume the RDTSC (Read Time Stamp Counter) instruction.
CONFIG_M586TSC
Select this for a Pentium Classic processor with the RDTSC (Read
Time Stamp Counter) instruction for benchmarking.
+CONFIG_M586MMX
+ Select this for a Pentium with the MMX graphics/multimedia
+ extended instructions.
+
+CONFIG_M686
+ Select this for a Pro/Celeron/Pentium II. This enables the use of
+ Pentium Pro extended instructions, and disables the init-time guard
+ against the f00f bug found in earlier Pentiums.
+
+CONFIG_MPENTIUMIII
+ Select this for Intel chips based on the Pentium-III and
+ Celeron-Coppermine core. Enables use of some extended prefetch
+ instructions, in addition to the Pentium II extensions.
+
+CONFIG_MPENTIUM4
+ Select this for Intel Pentium 4 chips. Presently these are
+ treated almost like Pentium IIIs, but with a different cache
+ shift.
+
+CONFIG_MCRUSOE
+ Select this for Transmeta Crusoe processor. Treats the processor
+ like a 586 with TSC, and sets some GCC optimization flags (like a
+ Pentium Pro with no alignment requirements).
+
+CONFIG_MK6
+ Select this for an AMD K6-family processor. Enables use of
+ some extended instructions, and passes appropriate optimization
+ flags to GCC.
+
+CONFIG_MK7
+ Select this for an AMD Athlon K7-family processor. Enables use of
+ some extended instructions, and passes appropriate optimization
+ flags to GCC.
+
+CONFIG_MCYRIXIII
+ Select this for a Cyrix III or C3 chip. Presently Linux and GCC
+ treat this chip as a generic 586. Whilst the CPU is 686 class,
+ it lacks the cmov extension which gcc assumes is present when
+ generating 686 code.
+
+CONFIG_MWINCHIPC6
+ Select this for a IDT Winchip C6 chip. Linux and GCC
+ treat this chip as a 586TSC with some extended instructions
+ and alignment requirements.
+
+CONFIG_MWINCHIP2
+ Select this for a IDT Winchip-2. Linux and GCC
+ treat this chip as a 586TSC with some extended instructions
+ and alignment requirements.
+
+CONFIG_MWINCHIP3D
+ Select this for a IDT Winchip-2A or 3. Linux and GCC
+ treat this chip as a 586TSC with some extended instructions
+ and alignment reqirements. Development kernels also enable
+ out of order memory stores for this CPU, which can increase
+ performance of some operations.
+
CONFIG_VGA_CONSOLE
Saying Y here will allow you to use Linux in text mode through a
display that complies with the generic VGA standard. Virtually
Enable vendor-specific code for TiVo IDE disks. Unless you are the
IDE maintainer, you probably do not want to mess with this.
+CONFIG_IDEDISK_STROKE
+ Should you have a system w/ an AWARD Bios and your drives are larger
+ than 32GB and it will not boot, one is required to perform a few OEM
+ operations first. The option is called "STROKE" because it allows
+ one to "soft clip" the drive to work around a barrier limit. For
+ Maxtor drives it is called "jumpon.exe". Please search Maxtor's
+ web-site for "JUMPON.EXE". IBM has a similar tool at:
+ <http://www.storage.ibm.com/hdd/support/download.htm>.
+
+ If you are unsure, say N here.
+
+CONFIG_IDE_TASK_IOCTL
+ This is a direct raw access to the media. It is a complex but
+ elegant solution to test and validate the domain of the hardware and
+ perform below the driver data recovery if needed. This is the most
+ basic form of media-forensics.
+
+ If you are unsure, say N here.
+
+CONFIG_BLK_DEV_IDEDMA_FORCED
+ This is an old piece of lost code from Linux 2.0 Kernels.
+
+ Generally say N here.
+
+CONFIG_IDEDMA_ONLYDISK
+ This is used if you know your ATAPI Devices are going to fail DMA
+ Transfers.
+
+ Generally say N here.
+
+CONFIG_BLK_DEV_IT8172
+ Say Y here to support the on-board IDE controller on the Integrated
+ Technology Express, Inc. ITE8172 SBC. Vendor page at
+ <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
+ board at <http://www.mvista.com/allies/semiconductor/ite.html>.
+
+CONFIG_IT8172_TUNING
+ Say Y here to support tuning the ITE8172's IDE interface. This makes
+ it possible to set DMA channel or PIO opration and the transfer rate.
+
+CONFIG_IT8172_REVC
+ Say Y here to support the older, Revision C version of the Integrated
+ Technology Express, Inc. ITE8172 SBC. Vendor page at
+ <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
+ board at <http://www.mvista.com/allies/semiconductor/ite.html>.
+
+CONFIG_IT8172_SCR0
+ Say Y here to support smart-card reader 0 (SCR0) on the Integrated
+ Technology Express, Inc. ITE8172 SBC. Vendor page at
+ <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
+ board at <http://www.mvista.com/allies/semiconductor/ite.html>.
+
+CONFIG_IT8172_SCR1
+ Say Y here to support smart-card reader 1 (SCR1) on the Integrated
+ Technology Express, Inc. ITE8172 SBC. Vendor page at
+ <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
+ board at <http://www.mvista.com/allies/semiconductor/ite.html>.
+
projects / history.git / commitdiff