# Andre Hedrick <andre@linux-ide.org>
#
mainmenu_option next_comment
-comment 'IDE, ATA and ATAPI Block devices'
+comment 'ATA and ATAPI Block devices'
dep_tristate 'Enhanced IDE/MFM/RLL disk/cdrom/tape/floppy support' CONFIG_BLK_DEV_IDE $CONFIG_IDE
comment 'Please see Documentation/ide.txt for help/info on IDE drives'
dep_tristate ' SCSI emulation support' CONFIG_BLK_DEV_IDESCSI $CONFIG_BLK_DEV_IDE $CONFIG_SCSI
comment 'IDE chipset support'
- if [ "$CONFIG_BLK_DEV_IDE" != "n" ]; then
- dep_bool ' CMD640 chipset bugfix/support' CONFIG_BLK_DEV_CMD640 $CONFIG_X86
- dep_bool ' CMD640 enhanced support' CONFIG_BLK_DEV_CMD640_ENHANCED $CONFIG_BLK_DEV_CMD640
- dep_bool ' ISA-PNP EIDE support' CONFIG_BLK_DEV_ISAPNP $CONFIG_ISAPNP
- if [ "$CONFIG_PCI" = "y" ]; then
- dep_bool ' RZ1000 chipset bugfix/support' CONFIG_BLK_DEV_RZ1000 $CONFIG_X86
- bool ' Generic PCI IDE chipset support' CONFIG_BLK_DEV_IDEPCI
- if [ "$CONFIG_BLK_DEV_IDEPCI" = "y" ]; then
- bool ' Sharing PCI IDE interrupts support' CONFIG_IDEPCI_SHARE_IRQ
- bool ' Generic PCI bus-master DMA support' CONFIG_BLK_DEV_IDEDMA_PCI
- bool ' Boot off-board chipsets first support' CONFIG_BLK_DEV_OFFBOARD
- dep_bool ' Use PCI DMA by default when available' CONFIG_IDEDMA_PCI_AUTO $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_bool ' Enable DMA only for disks ' CONFIG_IDEDMA_ONLYDISK $CONFIG_IDEDMA_PCI_AUTO
- define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_bool ' ATA Work(s) In Progress (EXPERIMENTAL)' CONFIG_IDEDMA_PCI_WIP $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_EXPERIMENTAL
- dep_bool ' Attempt to HACK around Chipsets that TIMEOUT (WIP)' CONFIG_BLK_DEV_IDEDMA_TIMEOUT $CONFIG_IDEDMA_PCI_WIP
- dep_bool ' Good-Bad DMA Model-Firmware (WIP)' CONFIG_IDEDMA_NEW_DRIVE_LISTINGS $CONFIG_IDEDMA_PCI_WIP
-# dep_bool ' Asynchronous DMA support (WIP) (EXPERIMENTAL)' CONFIG_BLK_DEV_ADMA $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_IDEDMA_PCI_WIP
- define_bool CONFIG_BLK_DEV_ADMA $CONFIG_BLK_DEV_IDEDMA_PCI
-# dep_bool ' Tag Command Queue DMA support (WIP) (EXPERIMENTAL)' CONFIG_BLK_DEV_IDEDMA_TCQ $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_IDEDMA_PCI_WIP
-
- dep_bool ' AEC62XX chipset support' CONFIG_BLK_DEV_AEC62XX $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_mbool ' AEC62XX Tuning support' CONFIG_AEC62XX_TUNING $CONFIG_BLK_DEV_AEC62XX
- dep_bool ' ALI M15x3 chipset support' CONFIG_BLK_DEV_ALI15X3 $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_mbool ' ALI M15x3 WDC support (DANGEROUS)' CONFIG_WDC_ALI15X3 $CONFIG_BLK_DEV_ALI15X3
- dep_bool ' AMD Viper support' CONFIG_BLK_DEV_AMD74XX $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_mbool ' AMD Viper ATA-66 Override (WIP)' CONFIG_AMD74XX_OVERRIDE $CONFIG_BLK_DEV_AMD74XX $CONFIG_IDEDMA_PCI_WIP
- dep_bool ' CMD64X chipset support' CONFIG_BLK_DEV_CMD64X $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_bool ' CY82C693 chipset support' CONFIG_BLK_DEV_CY82C693 $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_bool ' Cyrix CS5530 MediaGX chipset support' CONFIG_BLK_DEV_CS5530 $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_bool ' HPT34X chipset support' CONFIG_BLK_DEV_HPT34X $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_mbool ' HPT34X AUTODMA support (WIP)' CONFIG_HPT34X_AUTODMA $CONFIG_BLK_DEV_HPT34X $CONFIG_IDEDMA_PCI_WIP
- dep_bool ' HPT366 chipset support' CONFIG_BLK_DEV_HPT366 $CONFIG_BLK_DEV_IDEDMA_PCI
- if [ "$CONFIG_X86" = "y" -o "$CONFIG_IA64" = "y" ]; then
- dep_mbool ' Intel PIIXn chipsets support' CONFIG_BLK_DEV_PIIX $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_mbool ' PIIXn Tuning support' CONFIG_PIIX_TUNING $CONFIG_BLK_DEV_PIIX $CONFIG_IDEDMA_PCI_AUTO
- fi
- if [ "$CONFIG_MIPS_ITE8172" = "y" -o "$CONFIG_MIPS_IVR" = "y" ]; then
- dep_mbool ' IT8172 IDE support' CONFIG_BLK_DEV_IT8172 $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_mbool ' IT8172 IDE Tuning support' CONFIG_IT8172_TUNING $CONFIG_BLK_DEV_IT8172 $CONFIG_IDEDMA_PCI_AUTO
- fi
- dep_bool ' NS87415 chipset support (EXPERIMENTAL)' CONFIG_BLK_DEV_NS87415 $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_bool ' OPTi 82C621 chipset enhanced support (EXPERIMENTAL)' CONFIG_BLK_DEV_OPTI621 $CONFIG_EXPERIMENTAL
- dep_mbool ' Pacific Digital A-DMA support (EXPERIMENTAL)' CONFIG_BLK_DEV_PDC_ADMA $CONFIG_BLK_DEV_ADMA $CONFIG_IDEDMA_PCI_WIP
- dep_bool ' PROMISE PDC202{46|62|65|67|68|69|70} support' CONFIG_BLK_DEV_PDC202XX $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_bool ' Special UDMA Feature' CONFIG_PDC202XX_BURST $CONFIG_BLK_DEV_PDC202XX
- dep_bool ' Special FastTrak Feature' CONFIG_PDC202XX_FORCE $CONFIG_BLK_DEV_PDC202XX
- dep_bool ' ServerWorks OSB4/CSB5 chipsets support' CONFIG_BLK_DEV_SVWKS $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86
- dep_bool ' SiS5513 chipset support' CONFIG_BLK_DEV_SIS5513 $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86
- dep_bool ' SLC90E66 chipset support' CONFIG_BLK_DEV_SLC90E66 $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86
- dep_bool ' Tekram TRM290 chipset support (EXPERIMENTAL)' CONFIG_BLK_DEV_TRM290 $CONFIG_BLK_DEV_IDEDMA_PCI
- dep_bool ' VIA82CXXX chipset support' CONFIG_BLK_DEV_VIA82CXXX $CONFIG_BLK_DEV_IDEDMA_PCI
- fi
-
- if [ "$CONFIG_PPC" = "y" -o "$CONFIG_ARM" = "y" ]; then
- bool ' Winbond SL82c105 support' CONFIG_BLK_DEV_SL82C105
- fi
- fi
- if [ "$CONFIG_ALL_PPC" = "y" ]; then
- bool ' Builtin PowerMac IDE support' CONFIG_BLK_DEV_IDE_PMAC
- dep_bool ' PowerMac IDE DMA support' CONFIG_BLK_DEV_IDEDMA_PMAC $CONFIG_BLK_DEV_IDE_PMAC
- dep_bool ' Use DMA by default' CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO $CONFIG_BLK_DEV_IDEDMA_PMAC
- if [ "$CONFIG_BLK_DEV_IDE_PMAC" = "y" ]; then
- define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_PMAC
+ dep_bool ' CMD640 chipset bugfix/support' CONFIG_BLK_DEV_CMD640 $CONFIG_X86
+ dep_bool ' CMD640 enhanced support' CONFIG_BLK_DEV_CMD640_ENHANCED $CONFIG_BLK_DEV_CMD640
+ dep_bool ' ISA-PNP EIDE support' CONFIG_BLK_DEV_ISAPNP $CONFIG_ISAPNP
+ if [ "$CONFIG_PCI" = "y" ]; then
+ dep_bool ' RZ1000 chipset bugfix/support' CONFIG_BLK_DEV_RZ1000 $CONFIG_X86
+ bool ' Generic PCI IDE chipset support' CONFIG_BLK_DEV_IDEPCI
+ if [ "$CONFIG_BLK_DEV_IDEPCI" = "y" ]; then
+ bool ' Boot off-board chipsets first support' CONFIG_BLK_DEV_OFFBOARD
+ bool ' Sharing PCI IDE interrupts support' CONFIG_IDEPCI_SHARE_IRQ
+ bool ' Generic PCI bus-master DMA support' CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_bool ' Use PCI DMA by default when available' CONFIG_IDEDMA_PCI_AUTO $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_bool ' Enable DMA only for disks ' CONFIG_IDEDMA_ONLYDISK $CONFIG_IDEDMA_PCI_AUTO
+ define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_bool ' ATA Work(s) In Progress (EXPERIMENTAL)' CONFIG_IDEDMA_PCI_WIP $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_EXPERIMENTAL
+ dep_bool ' Attempt to HACK around Chipsets that TIMEOUT (WIP)' CONFIG_BLK_DEV_IDEDMA_TIMEOUT $CONFIG_IDEDMA_PCI_WIP
+ dep_bool ' Good-Bad DMA Model-Firmware (WIP)' CONFIG_IDEDMA_NEW_DRIVE_LISTINGS $CONFIG_IDEDMA_PCI_WIP
+ dep_bool ' AEC62XX chipset support' CONFIG_BLK_DEV_AEC62XX $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_mbool ' AEC62XX Tuning support' CONFIG_AEC62XX_TUNING $CONFIG_BLK_DEV_AEC62XX
+ dep_bool ' ALI M15x3 chipset support' CONFIG_BLK_DEV_ALI15X3 $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_mbool ' ALI M15x3 WDC support (DANGEROUS)' CONFIG_WDC_ALI15X3 $CONFIG_BLK_DEV_ALI15X3
+ dep_bool ' AMD Viper support' CONFIG_BLK_DEV_AMD74XX $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_mbool ' AMD Viper ATA-66 Override (WIP)' CONFIG_AMD74XX_OVERRIDE $CONFIG_BLK_DEV_AMD74XX $CONFIG_IDEDMA_PCI_WIP
+ dep_bool ' CMD64X chipset support' CONFIG_BLK_DEV_CMD64X $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_bool ' CY82C693 chipset support' CONFIG_BLK_DEV_CY82C693 $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_bool ' Cyrix CS5530 MediaGX chipset support' CONFIG_BLK_DEV_CS5530 $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_bool ' HPT34X chipset support' CONFIG_BLK_DEV_HPT34X $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_mbool ' HPT34X AUTODMA support (WIP)' CONFIG_HPT34X_AUTODMA $CONFIG_BLK_DEV_HPT34X $CONFIG_IDEDMA_PCI_WIP
+ dep_bool ' HPT366 chipset support' CONFIG_BLK_DEV_HPT366 $CONFIG_BLK_DEV_IDEDMA_PCI
+ if [ "$CONFIG_X86" = "y" -o "$CONFIG_IA64" = "y" ]; then
+ dep_mbool ' Intel PIIXn chipsets support' CONFIG_BLK_DEV_PIIX $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_mbool ' PIIXn Tuning support' CONFIG_PIIX_TUNING $CONFIG_BLK_DEV_PIIX $CONFIG_IDEDMA_PCI_AUTO
fi
- if [ "$CONFIG_BLK_DEV_IDEDMA_PMAC" = "y" ]; then
- define_bool CONFIG_BLK_DEV_IDEPCI $CONFIG_BLK_DEV_IDEDMA_PMAC
+ if [ "$CONFIG_MIPS_ITE8172" = "y" -o "$CONFIG_MIPS_IVR" = "y" ]; then
+ dep_mbool ' IT8172 IDE support' CONFIG_BLK_DEV_IT8172 $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_mbool ' IT8172 IDE Tuning support' CONFIG_IT8172_TUNING $CONFIG_BLK_DEV_IT8172 $CONFIG_IDEDMA_PCI_AUTO
fi
+ dep_bool ' NS87415 chipset support (EXPERIMENTAL)' CONFIG_BLK_DEV_NS87415 $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_bool ' OPTi 82C621 chipset enhanced support (EXPERIMENTAL)' CONFIG_BLK_DEV_OPTI621 $CONFIG_EXPERIMENTAL
+ dep_mbool ' Pacific Digital A-DMA support (EXPERIMENTAL)' CONFIG_BLK_DEV_PDC_ADMA $CONFIG_IDEDMA_PCI_WIP
+ dep_bool ' PROMISE PDC202{46|62|65|67|68|69|70} support' CONFIG_BLK_DEV_PDC202XX $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_bool ' Special UDMA Feature' CONFIG_PDC202XX_BURST $CONFIG_BLK_DEV_PDC202XX
+ dep_bool ' Special FastTrak Feature' CONFIG_PDC202XX_FORCE $CONFIG_BLK_DEV_PDC202XX
+ dep_bool ' ServerWorks OSB4/CSB5 chipsets support' CONFIG_BLK_DEV_SVWKS $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86
+ dep_bool ' SiS5513 chipset support' CONFIG_BLK_DEV_SIS5513 $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86
+ dep_bool ' SLC90E66 chipset support' CONFIG_BLK_DEV_SLC90E66 $CONFIG_BLK_DEV_IDEDMA_PCI $CONFIG_X86
+ dep_bool ' Tekram TRM290 chipset support (EXPERIMENTAL)' CONFIG_BLK_DEV_TRM290 $CONFIG_BLK_DEV_IDEDMA_PCI
+ dep_bool ' VIA82CXXX chipset support' CONFIG_BLK_DEV_VIA82CXXX $CONFIG_BLK_DEV_IDEDMA_PCI
fi
- if [ "$CONFIG_ARCH_ACORN" = "y" ]; then
- dep_bool ' ICS IDE interface support' CONFIG_BLK_DEV_IDE_ICSIDE $CONFIG_ARCH_ACORN
- dep_bool ' ICS DMA support' CONFIG_BLK_DEV_IDEDMA_ICS $CONFIG_BLK_DEV_IDE_ICSIDE
- dep_bool ' Use ICS DMA by default' CONFIG_IDEDMA_ICS_AUTO $CONFIG_BLK_DEV_IDEDMA_ICS
- define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_ICS
- dep_bool ' RapIDE interface support' CONFIG_BLK_DEV_IDE_RAPIDE $CONFIG_ARCH_ACORN
- fi
- if [ "$CONFIG_AMIGA" = "y" ]; then
- dep_bool ' Amiga Gayle IDE interface support' CONFIG_BLK_DEV_GAYLE $CONFIG_AMIGA
- dep_mbool ' Amiga IDE Doubler support (EXPERIMENTAL)' CONFIG_BLK_DEV_IDEDOUBLER $CONFIG_BLK_DEV_GAYLE $CONFIG_EXPERIMENTAL
- fi
- if [ "$CONFIG_ZORRO" = "y" -a "$CONFIG_EXPERIMENTAL" = "y" ]; then
- dep_mbool ' Buddha/Catweasel IDE interface support (EXPERIMENTAL)' CONFIG_BLK_DEV_BUDDHA $CONFIG_ZORRO $CONFIG_EXPERIMENTAL
- fi
- if [ "$CONFIG_ATARI" = "y" ]; then
- dep_bool ' Falcon IDE interface support' CONFIG_BLK_DEV_FALCON_IDE $CONFIG_ATARI
- fi
- if [ "$CONFIG_MAC" = "y" ]; then
- dep_bool ' Macintosh Quadra/Powerbook IDE interface support' CONFIG_BLK_DEV_MAC_IDE $CONFIG_MAC
+
+ if [ "$CONFIG_PPC" = "y" -o "$CONFIG_ARM" = "y" ]; then
+ bool ' Winbond SL82c105 support' CONFIG_BLK_DEV_SL82C105
fi
- if [ "$CONFIG_Q40" = "y" ]; then
- dep_bool ' Q40/Q60 IDE interface support' CONFIG_BLK_DEV_Q40IDE $CONFIG_Q40
+ fi
+ if [ "$CONFIG_ALL_PPC" = "y" ]; then
+ bool ' Builtin PowerMac IDE support' CONFIG_BLK_DEV_IDE_PMAC
+ dep_bool ' PowerMac IDE DMA support' CONFIG_BLK_DEV_IDEDMA_PMAC $CONFIG_BLK_DEV_IDE_PMAC
+ dep_bool ' Use DMA by default' CONFIG_BLK_DEV_IDEDMA_PMAC_AUTO $CONFIG_BLK_DEV_IDEDMA_PMAC
+ if [ "$CONFIG_BLK_DEV_IDE_PMAC" = "y" ]; then
+ define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_PMAC
fi
- if [ "$CONFIG_8xx" = "y" ]; then
- dep_bool ' MPC8xx IDE support' CONFIG_BLK_DEV_MPC8xx_IDE $CONFIG_8xx
+ if [ "$CONFIG_BLK_DEV_IDEDMA_PMAC" = "y" ]; then
+ define_bool CONFIG_BLK_DEV_IDEPCI $CONFIG_BLK_DEV_IDEDMA_PMAC
fi
+ fi
+ if [ "$CONFIG_ARCH_ACORN" = "y" ]; then
+ dep_bool ' ICS IDE interface support' CONFIG_BLK_DEV_IDE_ICSIDE $CONFIG_ARCH_ACORN
+ dep_bool ' ICS DMA support' CONFIG_BLK_DEV_IDEDMA_ICS $CONFIG_BLK_DEV_IDE_ICSIDE
+ dep_bool ' Use ICS DMA by default' CONFIG_IDEDMA_ICS_AUTO $CONFIG_BLK_DEV_IDEDMA_ICS
+ define_bool CONFIG_BLK_DEV_IDEDMA $CONFIG_BLK_DEV_IDEDMA_ICS
+ dep_bool ' RapIDE interface support' CONFIG_BLK_DEV_IDE_RAPIDE $CONFIG_ARCH_ACORN
+ fi
+ if [ "$CONFIG_AMIGA" = "y" ]; then
+ dep_bool ' Amiga Gayle IDE interface support' CONFIG_BLK_DEV_GAYLE $CONFIG_AMIGA
+ dep_mbool ' Amiga IDE Doubler support (EXPERIMENTAL)' CONFIG_BLK_DEV_IDEDOUBLER $CONFIG_BLK_DEV_GAYLE $CONFIG_EXPERIMENTAL
+ fi
+ if [ "$CONFIG_ZORRO" = "y" -a "$CONFIG_EXPERIMENTAL" = "y" ]; then
+ dep_mbool ' Buddha/Catweasel IDE interface support (EXPERIMENTAL)' CONFIG_BLK_DEV_BUDDHA $CONFIG_ZORRO $CONFIG_EXPERIMENTAL
+ fi
+ if [ "$CONFIG_ATARI" = "y" ]; then
+ dep_bool ' Falcon IDE interface support' CONFIG_BLK_DEV_FALCON_IDE $CONFIG_ATARI
+ fi
+ if [ "$CONFIG_MAC" = "y" ]; then
+ dep_bool ' Macintosh Quadra/Powerbook IDE interface support' CONFIG_BLK_DEV_MAC_IDE $CONFIG_MAC
+ fi
+ if [ "$CONFIG_Q40" = "y" ]; then
+ dep_bool ' Q40/Q60 IDE interface support' CONFIG_BLK_DEV_Q40IDE $CONFIG_Q40
+ fi
+ if [ "$CONFIG_8xx" = "y" ]; then
+ dep_bool ' MPC8xx IDE support' CONFIG_BLK_DEV_MPC8xx_IDE $CONFIG_8xx
+ fi
- if [ "$CONFIG_BLK_DEV_MPC8xx_IDE" = "y" ]; then
- choice 'Type of MPC8xx IDE interface' \
- "8xx_PCCARD CONFIG_IDE_8xx_PCCARD \
- 8xx_DIRECT CONFIG_IDE_8xx_DIRECT \
- EXT_DIRECT CONFIG_IDE_EXT_DIRECT" 8xx_PCCARD
- fi
+ if [ "$CONFIG_BLK_DEV_MPC8xx_IDE" = "y" ]; then
+ choice 'Type of MPC8xx IDE interface' \
+ "8xx_PCCARD CONFIG_IDE_8xx_PCCARD \
+ 8xx_DIRECT CONFIG_IDE_8xx_DIRECT \
+ EXT_DIRECT CONFIG_IDE_EXT_DIRECT" 8xx_PCCARD
+ fi
- bool ' Other IDE chipset support' CONFIG_IDE_CHIPSETS
- if [ "$CONFIG_IDE_CHIPSETS" = "y" ]; then
- comment 'Note: most of these also require special kernel boot parameters'
- bool ' ALI M14xx support' CONFIG_BLK_DEV_ALI14XX
- bool ' DTC-2278 support' CONFIG_BLK_DEV_DTC2278
- bool ' Holtek HT6560B support' CONFIG_BLK_DEV_HT6560B
- if [ "$CONFIG_BLK_DEV_IDEDISK" = "y" -a "$CONFIG_EXPERIMENTAL" = "y" ]; then
- bool ' PROMISE DC4030 support (EXPERIMENTAL)' CONFIG_BLK_DEV_PDC4030
- fi
- bool ' QDI QD65xx support' CONFIG_BLK_DEV_QD65XX
- bool ' UMC-8672 support' CONFIG_BLK_DEV_UMC8672
+ bool ' Other IDE chipset support' CONFIG_IDE_CHIPSETS
+ if [ "$CONFIG_IDE_CHIPSETS" = "y" ]; then
+ comment 'Note: most of these also require special kernel boot parameters'
+ bool ' ALI M14xx support' CONFIG_BLK_DEV_ALI14XX
+ bool ' DTC-2278 support' CONFIG_BLK_DEV_DTC2278
+ bool ' Holtek HT6560B support' CONFIG_BLK_DEV_HT6560B
+ if [ "$CONFIG_BLK_DEV_IDEDISK" = "y" -a "$CONFIG_EXPERIMENTAL" = "y" ]; then
+ bool ' PROMISE DC4030 support (EXPERIMENTAL)' CONFIG_BLK_DEV_PDC4030
fi
+ bool ' QDI QD65xx support' CONFIG_BLK_DEV_QD65XX
+ bool ' UMC-8672 support' CONFIG_BLK_DEV_UMC8672
+ fi
+ if [ "$CONFIG_BLK_DEV_IDEDMA_PCI" = "y" -o \
+ "$CONFIG_BLK_DEV_IDEDMA_PMAC" = "y" -o \
+ "$CONFIG_BLK_DEV_IDEDMA_ICS" = "y" ]; then
+ bool ' IGNORE word93 Validation BITS' CONFIG_IDEDMA_IVB
fi
else
bool 'Old hard disk (MFM/RLL/IDE) driver' CONFIG_BLK_DEV_HD_ONLY
define_bool CONFIG_IDEDMA_AUTO n
fi
-if [ "$CONFIG_BLK_DEV_IDEDMA_PCI" = "y" -o \
- "$CONFIG_BLK_DEV_IDEDMA_PMAC" = "y" -o \
- "$CONFIG_BLK_DEV_IDEDMA_ICS" = "y" ]; then
- bool ' IGNORE word93 Validation BITS' CONFIG_IDEDMA_IVB
-fi
-
if [ "$CONFIG_BLK_DEV_TIVO" = "y" ]; then
define_bool CONFIG_DMA_NONPCI y
else
/*
- * linux/drivers/ide/sis5513.c Version 0.11 June 9, 2000
+ * linux/drivers/ide/sis5513.c Version 0.13 March 4, 2002
*
* Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
+ * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
* May be copied or modified under the terms of the GNU General Public License
*
- * Thanks to SIS Taiwan for direct support and hardware.
- * Tested and designed on the SiS620/5513 chipset.
+*/
+
+/* Thanks :
+ * For direct support and hardware : SiS Taiwan.
+ * For ATA100 support advice : Daniela Engert.
+ * For checking code correctness, providing patches :
+ * John Fremlin, Manfred Spraul
+ */
+
+/*
+ * Original tests and design on the SiS620/5513 chipset.
+ * ATA100 tests and design on the SiS735/5513 chipset.
+ * ATA16/33 design from specs
+ */
+
+/*
+ * TODO:
+ * - Get ridden of SisHostChipInfo[] completness dependancy.
+ * - Get ATA-133 datasheets, implement ATA-133 init code.
+ * - Are there pre-ATA_16 SiS chips ? -> tune init code for them
+ * or remove ATA_00 define
+ * - More checks in the config registers (force values instead of
+ * relying on the BIOS setting them correctly).
+ * - Further optimisations ?
+ * . for example ATA66+ regs 0x48 & 0x4A
*/
#include <linux/config.h>
#include "ide_modes.h"
+// #define DEBUG
+/* if BROKEN_LEVEL is defined it limits the DMA mode
+ at boot time to its value */
+// #define BROKEN_LEVEL XFER_SW_DMA_0
#define DISPLAY_SIS_TIMINGS
-#define SIS5513_DEBUG_DRIVE_INFO 0
-static struct pci_dev *host_dev = NULL;
+/* Miscellaneaous flags */
+#define SIS5513_LATENCY 0x01
+/* ATA transfer mode capabilities */
+#define ATA_00 0x00
+#define ATA_16 0x01
+#define ATA_33 0x02
+#define ATA_66 0x03
+#define ATA_100a 0x04
+#define ATA_100 0x05
+#define ATA_133 0x06
+
+static unsigned char dma_capability = 0x00;
+
+
+/*
+ * Debug code: following IDE config registers' changes
+ */
+#ifdef DEBUG
+/* Copy of IDE Config registers 0x00 -> 0x58
+ Fewer might be used depending on the actual chipset */
+static unsigned char ide_regs_copy[] = {
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0
+};
+
+static byte sis5513_max_config_register(void) {
+ switch(dma_capability) {
+ case ATA_00:
+ case ATA_16: return 0x4f;
+ case ATA_33: return 0x52;
+ case ATA_66:
+ case ATA_100a:
+ case ATA_100:
+ case ATA_133:
+ default: return 0x57;
+ }
+}
+
+/* Read config registers, print differences from previous read */
+static void sis5513_load_verify_registers(struct pci_dev* dev, char* info) {
+ int i;
+ byte reg_val;
+ byte changed=0;
+ byte max = sis5513_max_config_register();
+
+ printk("SIS5513: %s, changed registers:\n", info);
+ for(i=0; i<=max; i++) {
+ pci_read_config_byte(dev, i, ®_val);
+ if (reg_val != ide_regs_copy[i]) {
+ printk("%0#x: %0#x -> %0#x\n",
+ i, ide_regs_copy[i], reg_val);
+ ide_regs_copy[i]=reg_val;
+ changed=1;
+ }
+ }
-#define SIS5513_FLAG_ATA_00 0x00000000
-#define SIS5513_FLAG_ATA_16 0x00000001
-#define SIS5513_FLAG_ATA_33 0x00000002
-#define SIS5513_FLAG_ATA_66 0x00000004
-#define SIS5513_FLAG_LATENCY 0x00000010
+ if (!changed) {
+ printk("none\n");
+ }
+}
+
+/* Load config registers, no printing */
+static void sis5513_load_registers(struct pci_dev* dev) {
+ int i;
+ byte max = sis5513_max_config_register();
+
+ for(i=0; i<=max; i++) {
+ pci_read_config_byte(dev, i, &(ide_regs_copy[i]));
+ }
+}
+
+/* Print a register */
+static void sis5513_print_register(int reg) {
+ printk(" %0#x:%0#x", reg, ide_regs_copy[reg]);
+}
+
+/* Print valuable registers */
+static void sis5513_print_registers(struct pci_dev* dev, char* marker) {
+ int i;
+ byte max = sis5513_max_config_register();
+
+ sis5513_load_registers(dev);
+ printk("SIS5513 %s\n", marker);
+ printk("SIS5513 dump:");
+ for(i=0x00; i<0x40; i++) {
+ if ((i % 0x10)==0) printk("\n ");
+ sis5513_print_register(i);
+ }
+ for(; i<49; i++) {
+ sis5513_print_register(i);
+ }
+ printk("\n ");
+
+ for(; i<=max; i++) {
+ sis5513_print_register(i);
+ }
+ printk("\n");
+}
+#endif
+
+/*
+ * Devices supported
+ */
static const struct {
const char *name;
unsigned short host_id;
- unsigned int flags;
+ unsigned char dma_capability;
+ unsigned char flags;
} SiSHostChipInfo[] = {
- { "SiS530", PCI_DEVICE_ID_SI_530, SIS5513_FLAG_ATA_66, },
- { "SiS540", PCI_DEVICE_ID_SI_540, SIS5513_FLAG_ATA_66, },
- { "SiS620", PCI_DEVICE_ID_SI_620, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS630", PCI_DEVICE_ID_SI_630, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS635", PCI_DEVICE_ID_SI_635, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS640", PCI_DEVICE_ID_SI_640, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS645", PCI_DEVICE_ID_SI_645, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS650", PCI_DEVICE_ID_SI_650, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS730", PCI_DEVICE_ID_SI_730, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS735", PCI_DEVICE_ID_SI_735, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS740", PCI_DEVICE_ID_SI_740, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS745", PCI_DEVICE_ID_SI_745, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS750", PCI_DEVICE_ID_SI_750, SIS5513_FLAG_ATA_66|SIS5513_FLAG_LATENCY, },
- { "SiS5591", PCI_DEVICE_ID_SI_5591, SIS5513_FLAG_ATA_33, },
- { "SiS5597", PCI_DEVICE_ID_SI_5597, SIS5513_FLAG_ATA_33, },
- { "SiS5600", PCI_DEVICE_ID_SI_5600, SIS5513_FLAG_ATA_33, },
- { "SiS5511", PCI_DEVICE_ID_SI_5511, SIS5513_FLAG_ATA_16, },
-};
-
-#if 0
-
-static struct _pio_mode_mapping {
- byte data_active;
- byte recovery;
- byte pio_mode;
-} pio_mode_mapping[] = {
- { 8, 12, 0 },
- { 6, 7, 1 },
- { 4, 4, 2 },
- { 3, 3, 3 },
- { 3, 1, 4 }
+ { "SiS750", PCI_DEVICE_ID_SI_750, ATA_100, SIS5513_LATENCY },
+ { "SiS745", PCI_DEVICE_ID_SI_745, ATA_100, SIS5513_LATENCY },
+ { "SiS740", PCI_DEVICE_ID_SI_740, ATA_100, SIS5513_LATENCY },
+ { "SiS735", PCI_DEVICE_ID_SI_735, ATA_100, SIS5513_LATENCY },
+ { "SiS730", PCI_DEVICE_ID_SI_730, ATA_100a, SIS5513_LATENCY },
+ { "SiS650", PCI_DEVICE_ID_SI_650, ATA_100, SIS5513_LATENCY },
+ { "SiS645", PCI_DEVICE_ID_SI_645, ATA_100, SIS5513_LATENCY },
+ { "SiS635", PCI_DEVICE_ID_SI_635, ATA_100, SIS5513_LATENCY },
+ { "SiS640", PCI_DEVICE_ID_SI_640, ATA_66, SIS5513_LATENCY },
+ { "SiS630", PCI_DEVICE_ID_SI_630, ATA_66, SIS5513_LATENCY },
+ { "SiS620", PCI_DEVICE_ID_SI_620, ATA_66, SIS5513_LATENCY },
+ { "SiS540", PCI_DEVICE_ID_SI_540, ATA_66, 0},
+ { "SiS530", PCI_DEVICE_ID_SI_530, ATA_66, 0},
+ { "SiS5600", PCI_DEVICE_ID_SI_5600, ATA_33, 0},
+ { "SiS5598", PCI_DEVICE_ID_SI_5598, ATA_33, 0},
+ { "SiS5597", PCI_DEVICE_ID_SI_5597, ATA_33, 0},
+ { "SiS5591", PCI_DEVICE_ID_SI_5591, ATA_33, 0},
+ { "SiS5513", PCI_DEVICE_ID_SI_5513, ATA_16, 0},
+ { "SiS5511", PCI_DEVICE_ID_SI_5511, ATA_16, 0},
};
-static struct _dma_mode_mapping {
- byte data_active;
- byte recovery;
- byte dma_mode;
-} dma_mode_mapping[] = {
- { 8, 8, 0 },
- { 3, 2, 1 },
- { 3, 1, 2 }
+/* Cycle time bits and values vary accross chip dma capabilities
+ These three arrays hold the register layout and the values to set.
+ Indexed by dma_capability and (dma_mode - XFER_UDMA_0) */
+static byte cycle_time_offset[] = {0,0,5,4,4,0,0};
+static byte cycle_time_range[] = {0,0,2,3,3,4,4};
+static byte cycle_time_value[][XFER_UDMA_5 - XFER_UDMA_0 + 1] = {
+ {0,0,0,0,0,0}, /* no udma */
+ {0,0,0,0,0,0}, /* no udma */
+ {3,2,1,0,0,0},
+ {7,5,3,2,1,0},
+ {7,5,3,2,1,0},
+ {11,7,5,4,2,1},
+ {0,0,0,0,0,0} /* not yet known, ask SiS */
};
-static struct _udma_mode_mapping {
- byte cycle_time;
- char * udma_mode;
-} udma_mode_mapping[] = {
- { 8, "Mode 0" },
- { 6, "Mode 1" },
- { 4, "Mode 2" },
- { 3, "Mode 3" },
- { 2, "Mode 4" },
- { 0, "Mode 5" }
-};
+static struct pci_dev *host_dev = NULL;
-static __inline__ char * find_udma_mode (byte cycle_time)
-{
- int n;
-
- for (n = 0; n <= 4; n++)
- if (udma_mode_mapping[n].cycle_time <= cycle_time)
- return udma_mode_mapping[n].udma_mode;
- return udma_mode_mapping[4].udma_mode;
-}
-#endif
+/*
+ * Printing configuration
+ */
#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS)
#include <linux/stat.h>
#include <linux/proc_fs.h>
extern int (*sis_display_info)(char *, char **, off_t, int); /* ide-proc.c */
static struct pci_dev *bmide_dev;
-static char *cable_type[] = {
+static char* cable_type[] = {
"80 pins",
"40 pins"
};
-static char *recovery_time [] ={
+static char* recovery_time[] ={
"12 PCICLK", "1 PCICLK",
"2 PCICLK", "3 PCICLK",
"4 PCICLK", "5 PCICLCK",
"15 PCICLK", "15 PCICLK"
};
-static char * cycle_time [] = {
- "2 CLK", "2 CLK",
- "3 CLK", "4 CLK",
- "5 CLK", "6 CLK",
- "7 CLK", "8 CLK"
-};
-
-static char * active_time [] = {
+static char* active_time[] = {
"8 PCICLK", "1 PCICLCK",
- "2 PCICLK", "2 PCICLK",
+ "2 PCICLK", "3 PCICLK",
"4 PCICLK", "5 PCICLK",
"6 PCICLK", "12 PCICLK"
};
+static char* cycle_time[] = {
+ "Reserved", "2 CLK",
+ "3 CLK", "4 CLK",
+ "5 CLK", "6 CLK",
+ "7 CLK", "8 CLK",
+ "9 CLK", "10 CLK",
+ "11 CLK", "12 CLK",
+ "Reserved", "Reserved",
+ "Reserved", "Reserved"
+};
+
+/* Generic add master or slave info function */
+static char* get_drives_info (char *buffer, byte pos)
+{
+ byte reg00, reg01, reg10, reg11; /* timing registers */
+ char* p = buffer;
+
+/* Postwrite/Prefetch */
+ pci_read_config_byte(bmide_dev, 0x4b, ®00);
+ p += sprintf(p, "Drive %d: Postwrite %s \t \t Postwrite %s\n",
+ pos, (reg00 & (0x10 << pos)) ? "Enabled" : "Disabled",
+ (reg00 & (0x40 << pos)) ? "Enabled" : "Disabled");
+ p += sprintf(p, " Prefetch %s \t \t Prefetch %s\n",
+ (reg00 & (0x01 << pos)) ? "Enabled" : "Disabled",
+ (reg00 & (0x04 << pos)) ? "Enabled" : "Disabled");
+
+ pci_read_config_byte(bmide_dev, 0x40+2*pos, ®00);
+ pci_read_config_byte(bmide_dev, 0x41+2*pos, ®01);
+ pci_read_config_byte(bmide_dev, 0x44+2*pos, ®10);
+ pci_read_config_byte(bmide_dev, 0x45+2*pos, ®11);
+
+/* UDMA */
+ if (dma_capability >= ATA_33) {
+ p += sprintf(p, " UDMA %s \t \t \t UDMA %s\n",
+ (reg01 & 0x80) ? "Enabled" : "Disabled",
+ (reg11 & 0x80) ? "Enabled" : "Disabled");
+
+ p += sprintf(p, " UDMA Cycle Time ");
+ switch(dma_capability) {
+ case ATA_33: p += sprintf(p, cycle_time[(reg01 & 0x60) >> 5]); break;
+ case ATA_66:
+ case ATA_100a: p += sprintf(p, cycle_time[(reg01 & 0x70) >> 4]); break;
+ case ATA_100: p += sprintf(p, cycle_time[reg01 & 0x0F]); break;
+ case ATA_133:
+ default: p += sprintf(p, "133+ ?"); break;
+ }
+ p += sprintf(p, " \t UDMA Cycle Time ");
+ switch(dma_capability) {
+ case ATA_33: p += sprintf(p, cycle_time[(reg11 & 0x60) >> 5]); break;
+ case ATA_66:
+ case ATA_100a: p += sprintf(p, cycle_time[(reg11 & 0x70) >> 4]); break;
+ case ATA_100: p += sprintf(p, cycle_time[reg11 & 0x0F]); break;
+ case ATA_133:
+ default: p += sprintf(p, "133+ ?"); break;
+ }
+ p += sprintf(p, "\n");
+ }
+
+/* Data Active */
+ p += sprintf(p, " Data Active Time ");
+ switch(dma_capability) {
+ case ATA_00:
+ case ATA_16: /* confirmed */
+ case ATA_33:
+ case ATA_66:
+ case ATA_100a: p += sprintf(p, active_time[reg01 & 0x07]); break;
+ case ATA_100: p += sprintf(p, active_time[(reg00 & 0x70) >> 4]); break;
+ case ATA_133:
+ default: p += sprintf(p, "133+ ?"); break;
+ }
+ p += sprintf(p, " \t Data Active Time ");
+ switch(dma_capability) {
+ case ATA_00:
+ case ATA_16:
+ case ATA_33:
+ case ATA_66:
+ case ATA_100a: p += sprintf(p, active_time[reg11 & 0x07]); break;
+ case ATA_100: p += sprintf(p, active_time[(reg10 & 0x70) >> 4]); break;
+ case ATA_133:
+ default: p += sprintf(p, "133+ ?"); break;
+ }
+ p += sprintf(p, "\n");
+
+/* Data Recovery */
+ /* warning: may need (reg&0x07) for pre ATA66 chips */
+ p += sprintf(p, " Data Recovery Time %s \t Data Recovery Time %s\n",
+ recovery_time[reg00 & 0x0f], recovery_time[reg10 & 0x0f]);
+
+ return p;
+}
+
+static char* get_masters_info(char* buffer)
+{
+ return get_drives_info(buffer, 0);
+}
+
+static char* get_slaves_info(char* buffer)
+{
+ return get_drives_info(buffer, 1);
+}
+
+/* Main get_info, called on /proc/ide/sis reads */
static int sis_get_info (char *buffer, char **addr, off_t offset, int count)
{
- int rc;
char *p = buffer;
- byte reg,reg1;
+ byte reg;
u16 reg2, reg3;
+ p += sprintf(p, "\nSiS 5513 ");
+ switch(dma_capability) {
+ case ATA_00: p += sprintf(p, "Unknown???"); break;
+ case ATA_16: p += sprintf(p, "DMA 16"); break;
+ case ATA_33: p += sprintf(p, "Ultra 33"); break;
+ case ATA_66: p += sprintf(p, "Ultra 66"); break;
+ case ATA_100a:
+ case ATA_100: p += sprintf(p, "Ultra 100"); break;
+ case ATA_133:
+ default: p+= sprintf(p, "Ultra 133+"); break;
+ }
+ p += sprintf(p, " chipset\n");
p += sprintf(p, "--------------- Primary Channel ---------------- Secondary Channel -------------\n");
- rc = pci_read_config_byte(bmide_dev, 0x4a, ®);
- p += sprintf(p, "Channel Status: %s \t \t \t \t %s \n",
- (reg & 0x02) ? "On" : "Off",
- (reg & 0x04) ? "On" : "Off");
-
- rc = pci_read_config_byte(bmide_dev, 0x09, ®);
+
+/* Status */
+ pci_read_config_byte(bmide_dev, 0x4a, ®);
+ p += sprintf(p, "Channel Status: ");
+ if (dma_capability < ATA_66) {
+ p += sprintf(p, "%s \t \t \t \t %s\n",
+ (reg & 0x04) ? "On" : "Off",
+ (reg & 0x02) ? "On" : "Off");
+ } else {
+ p += sprintf(p, "%s \t \t \t \t %s \n",
+ (reg & 0x02) ? "On" : "Off",
+ (reg & 0x04) ? "On" : "Off");
+ }
+
+/* Operation Mode */
+ pci_read_config_byte(bmide_dev, 0x09, ®);
p += sprintf(p, "Operation Mode: %s \t \t \t %s \n",
(reg & 0x01) ? "Native" : "Compatible",
(reg & 0x04) ? "Native" : "Compatible");
-
- rc = pci_read_config_byte(bmide_dev, 0x48, ®);
- p += sprintf(p, "Cable Type: %s \t \t \t %s\n",
- (reg & 0x10) ? cable_type[1] : cable_type[0],
- (reg & 0x20) ? cable_type[1] : cable_type[0]);
-
- rc = pci_read_config_word(bmide_dev, 0x4c, ®2);
- rc = pci_read_config_word(bmide_dev, 0x4e, ®3);
+
+/* 80-pin cable ? */
+ if (dma_capability > ATA_33) {
+ pci_read_config_byte(bmide_dev, 0x48, ®);
+ p += sprintf(p, "Cable Type: %s \t \t \t %s\n",
+ (reg & 0x10) ? cable_type[1] : cable_type[0],
+ (reg & 0x20) ? cable_type[1] : cable_type[0]);
+ }
+
+/* Prefetch Count */
+ pci_read_config_word(bmide_dev, 0x4c, ®2);
+ pci_read_config_word(bmide_dev, 0x4e, ®3);
p += sprintf(p, "Prefetch Count: %d \t \t \t \t %d\n",
reg2, reg3);
- rc = pci_read_config_byte(bmide_dev, 0x4b, ®);
- p += sprintf(p, "Drive 0: Postwrite %s \t \t Postwrite %s\n",
- (reg & 0x10) ? "Enabled" : "Disabled",
- (reg & 0x40) ? "Enabled" : "Disabled");
- p += sprintf(p, " Prefetch %s \t \t Prefetch %s\n",
- (reg & 0x01) ? "Enabled" : "Disabled",
- (reg & 0x04) ? "Enabled" : "Disabled");
-
- rc = pci_read_config_byte(bmide_dev, 0x41, ®);
- rc = pci_read_config_byte(bmide_dev, 0x45, ®1);
- p += sprintf(p, " UDMA %s \t \t \t UDMA %s\n",
- (reg & 0x80) ? "Enabled" : "Disabled",
- (reg1 & 0x80) ? "Enabled" : "Disabled");
- p += sprintf(p, " UDMA Cycle Time %s \t UDMA Cycle Time %s\n",
- cycle_time[(reg & 0x70) >> 4], cycle_time[(reg1 & 0x70) >> 4]);
- p += sprintf(p, " Data Active Time %s \t Data Active Time %s\n",
- active_time[(reg & 0x07)], active_time[(reg1 &0x07)] );
-
- rc = pci_read_config_byte(bmide_dev, 0x40, ®);
- rc = pci_read_config_byte(bmide_dev, 0x44, ®1);
- p += sprintf(p, " Data Recovery Time %s \t Data Recovery Time %s\n",
- recovery_time[(reg & 0x0f)], recovery_time[(reg1 & 0x0f)]);
-
+ p = get_masters_info(p);
+ p = get_slaves_info(p);
- rc = pci_read_config_byte(bmide_dev, 0x4b, ®);
- p += sprintf(p, "Drive 1: Postwrite %s \t \t Postwrite %s\n",
- (reg & 0x20) ? "Enabled" : "Disabled",
- (reg & 0x80) ? "Enabled" : "Disabled");
- p += sprintf(p, " Prefetch %s \t \t Prefetch %s\n",
- (reg & 0x02) ? "Enabled" : "Disabled",
- (reg & 0x08) ? "Enabled" : "Disabled");
-
- rc = pci_read_config_byte(bmide_dev, 0x43, ®);
- rc = pci_read_config_byte(bmide_dev, 0x47, ®1);
- p += sprintf(p, " UDMA %s \t \t \t UDMA %s\n",
- (reg & 0x80) ? "Enabled" : "Disabled",
- (reg1 & 0x80) ? "Enabled" : "Disabled");
- p += sprintf(p, " UDMA Cycle Time %s \t UDMA Cycle Time %s\n",
- cycle_time[(reg & 0x70) >> 4], cycle_time[(reg1 & 0x70) >> 4]);
- p += sprintf(p, " Data Active Time %s \t Data Active Time %s\n",
- active_time[(reg & 0x07)], active_time[(reg1 &0x07)] );
-
- rc = pci_read_config_byte(bmide_dev, 0x42, ®);
- rc = pci_read_config_byte(bmide_dev, 0x46, ®1);
- p += sprintf(p, " Data Recovery Time %s \t Data Recovery Time %s\n",
- recovery_time[(reg & 0x0f)], recovery_time[(reg1 & 0x0f)]);
return p-buffer;
}
#endif /* defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS) */
+
byte sis_proc = 0;
extern char *ide_xfer_verbose (byte xfer_rate);
+
+/*
+ * Configuration functions
+ */
+/* Enables per-drive prefetch and postwrite */
static void config_drive_art_rwp (ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
byte reg4bh = 0;
byte rw_prefetch = (0x11 << drive->dn);
- pci_read_config_byte(dev, 0x4b, ®4bh);
+#ifdef DEBUG
+ printk("SIS5513: config_drive_art_rwp, drive %d\n", drive->dn);
+ sis5513_load_verify_registers(dev, "config_drive_art_rwp start");
+#endif
+
if (drive->type != ATA_DISK)
return;
-
+ pci_read_config_byte(dev, 0x4b, ®4bh);
+
if ((reg4bh & rw_prefetch) != rw_prefetch)
pci_write_config_byte(dev, 0x4b, reg4bh|rw_prefetch);
+#ifdef DEBUG
+ sis5513_load_verify_registers(dev, "config_drive_art_rwp end");
+#endif
}
+
+/* Set per-drive active and recovery time */
static void config_art_rwp_pio (ide_drive_t *drive, byte pio)
{
ide_hwif_t *hwif = HWIF(drive);
unsigned short eide_pio_timing[6] = {600, 390, 240, 180, 120, 90};
unsigned short xfer_pio = drive->id->eide_pio_modes;
+#ifdef DEBUG
+ sis5513_load_verify_registers(dev, "config_drive_art_rwp_pio start");
+#endif
+
config_drive_art_rwp(drive);
pio = ide_get_best_pio_mode(drive, 255, pio, NULL);
if (drive->id->eide_pio_iordy > 0) {
for (xfer_pio = 5;
- xfer_pio>0 &&
- drive->id->eide_pio_iordy>eide_pio_timing[xfer_pio];
+ (xfer_pio > 0) &&
+ (drive->id->eide_pio_iordy > eide_pio_timing[xfer_pio]);
xfer_pio--);
} else {
xfer_pio = (drive->id->eide_pio_modes & 4) ? 0x05 :
timing = (xfer_pio >= pio) ? xfer_pio : pio;
-/*
- * Mode 0 Mode 1 Mode 2 Mode 3 Mode 4
- * Active time 8T (240ns) 6T (180ns) 4T (120ns) 3T (90ns) 3T (90ns)
- * 0x41 2:0 bits 000 110 100 011 011
- * Recovery time 12T (360ns) 7T (210ns) 4T (120ns) 3T (90ns) 1T (30ns)
- * 0x40 3:0 bits 0000 0111 0100 0011 0001
- * Cycle time 20T (600ns) 13T (390ns) 8T (240ns) 6T (180ns) 4T (120ns)
- */
+#ifdef DEBUG
+ printk("SIS5513: config_drive_art_rwp_pio, drive %d, pio %d, timing %d\n",
+ drive->dn, pio, timing);
+#endif
switch(drive->dn) {
case 0: drive_pci = 0x40; break;
default: return;
}
- pci_read_config_byte(dev, drive_pci, &test1);
- pci_read_config_byte(dev, drive_pci|0x01, &test2);
-
- /*
- * Do a blanket clear of active and recovery timings.
- */
-
- test1 &= ~0x07;
- test2 &= ~0x0F;
-
- switch(timing) {
- case 4: test1 |= 0x01; test2 |= 0x03; break;
- case 3: test1 |= 0x03; test2 |= 0x03; break;
- case 2: test1 |= 0x04; test2 |= 0x04; break;
- case 1: test1 |= 0x07; test2 |= 0x06; break;
- default: break;
+ /* register layout changed with newer ATA100 chips */
+ if (dma_capability < ATA_100) {
+ pci_read_config_byte(dev, drive_pci, &test1);
+ pci_read_config_byte(dev, drive_pci+1, &test2);
+
+ /* Clear active and recovery timings */
+ test1 &= ~0x0F;
+ test2 &= ~0x07;
+
+ switch(timing) {
+ case 4: test1 |= 0x01; test2 |= 0x03; break;
+ case 3: test1 |= 0x03; test2 |= 0x03; break;
+ case 2: test1 |= 0x04; test2 |= 0x04; break;
+ case 1: test1 |= 0x07; test2 |= 0x06; break;
+ default: break;
+ }
+ pci_write_config_byte(dev, drive_pci, test1);
+ pci_write_config_byte(dev, drive_pci+1, test2);
+ } else {
+ switch(timing) { /* active recovery
+ v v */
+ case 4: test1 = 0x30|0x01; break;
+ case 3: test1 = 0x30|0x03; break;
+ case 2: test1 = 0x40|0x04; break;
+ case 1: test1 = 0x60|0x07; break;
+ default: break;
+ }
+ pci_write_config_byte(dev, drive_pci, test1);
}
- pci_write_config_byte(dev, drive_pci, test1);
- pci_write_config_byte(dev, drive_pci|0x01, test2);
+#ifdef DEBUG
+ sis5513_load_verify_registers(dev, "config_drive_art_rwp_pio start");
+#endif
}
static int config_chipset_for_pio (ide_drive_t *drive, byte pio)
{
- int err;
byte speed;
switch(pio) {
config_art_rwp_pio(drive, pio);
drive->current_speed = speed;
- err = ide_config_drive_speed(drive, speed);
- return err;
+ return ide_config_drive_speed(drive, speed);
}
static int sis5513_tune_chipset (ide_drive_t *drive, byte speed)
ide_hwif_t *hwif = HWIF(drive);
struct pci_dev *dev = hwif->pci_dev;
- byte drive_pci, test1, test2;
- byte unmask, four_two, mask = 0;
-
- if (host_dev) {
- switch(host_dev->device) {
- case PCI_DEVICE_ID_SI_530:
- case PCI_DEVICE_ID_SI_540:
- case PCI_DEVICE_ID_SI_620:
- case PCI_DEVICE_ID_SI_630:
- case PCI_DEVICE_ID_SI_635:
- case PCI_DEVICE_ID_SI_640:
- case PCI_DEVICE_ID_SI_645:
- case PCI_DEVICE_ID_SI_650:
- case PCI_DEVICE_ID_SI_730:
- case PCI_DEVICE_ID_SI_735:
- case PCI_DEVICE_ID_SI_740:
- case PCI_DEVICE_ID_SI_745:
- case PCI_DEVICE_ID_SI_750:
- unmask = 0xF0;
- four_two = 0x01;
- break;
- default:
- unmask = 0xE0;
- four_two = 0x00;
- break;
- }
- } else {
- unmask = 0xE0;
- four_two = 0x00;
- }
+ byte drive_pci, reg;
+#ifdef DEBUG
+ sis5513_load_verify_registers(dev, "sis5513_tune_chipset start");
+ printk("SIS5513: sis5513_tune_chipset, drive %d, speed %d\n",
+ drive->dn, speed);
+#endif
switch(drive->dn) {
- case 0: drive_pci = 0x40;break;
- case 1: drive_pci = 0x42;break;
- case 2: drive_pci = 0x44;break;
- case 3: drive_pci = 0x46;break;
+ case 0: drive_pci = 0x40; break;
+ case 1: drive_pci = 0x42; break;
+ case 2: drive_pci = 0x44; break;
+ case 3: drive_pci = 0x46; break;
default: return ide_dma_off;
}
- pci_read_config_byte(dev, drive_pci, &test1);
- pci_read_config_byte(dev, drive_pci|0x01, &test2);
+#ifdef BROKEN_LEVEL
+#ifdef DEBUG
+ printk("SIS5513: BROKEN_LEVEL activated, speed=%d -> speed=%d\n", speed, BROKEN_LEVEL);
+#endif
+ if (speed > BROKEN_LEVEL) speed = BROKEN_LEVEL;
+#endif
- if ((speed <= XFER_MW_DMA_2) && (test2 & 0x80)) {
- pci_write_config_byte(dev, drive_pci|0x01, test2 & ~0x80);
- pci_read_config_byte(dev, drive_pci|0x01, &test2);
- } else {
- pci_write_config_byte(dev, drive_pci|0x01, test2 & ~unmask);
+ pci_read_config_byte(dev, drive_pci+1, ®);
+ /* Disable UDMA bit for non UDMA modes on UDMA chips */
+ if ((speed < XFER_UDMA_0) && (dma_capability > ATA_16)) {
+ reg &= 0x7F;
+ pci_write_config_byte(dev, drive_pci+1, reg);
}
+ /* Config chip for mode */
switch(speed) {
#ifdef CONFIG_BLK_DEV_IDEDMA
- case XFER_UDMA_5: mask = 0x80; break;
- case XFER_UDMA_4: mask = 0x90; break;
- case XFER_UDMA_3: mask = 0xA0; break;
- case XFER_UDMA_2: mask = (four_two) ? 0xB0 : 0xA0; break;
- case XFER_UDMA_1: mask = (four_two) ? 0xD0 : 0xC0; break;
- case XFER_UDMA_0: mask = unmask; break;
+ case XFER_UDMA_5:
+ case XFER_UDMA_4:
+ case XFER_UDMA_3:
+ case XFER_UDMA_2:
+ case XFER_UDMA_1:
+ case XFER_UDMA_0:
+ /* Force the UDMA bit on if we want to use UDMA */
+ reg |= 0x80;
+ /* clean reg cycle time bits */
+ reg &= ~((0xFF >> (8 - cycle_time_range[dma_capability]))
+ << cycle_time_offset[dma_capability]);
+ /* set reg cycle time bits */
+ reg |= cycle_time_value[dma_capability-ATA_00][speed-XFER_UDMA_0]
+ << cycle_time_offset[dma_capability];
+ pci_write_config_byte(dev, drive_pci+1, reg);
+ break;
case XFER_MW_DMA_2:
case XFER_MW_DMA_1:
case XFER_MW_DMA_0:
case XFER_SW_DMA_2:
case XFER_SW_DMA_1:
- case XFER_SW_DMA_0: break;
+ case XFER_SW_DMA_0:
+ break;
#endif /* CONFIG_BLK_DEV_IDEDMA */
case XFER_PIO_4: return((int) config_chipset_for_pio(drive, 4));
case XFER_PIO_3: return((int) config_chipset_for_pio(drive, 3));
case XFER_PIO_2: return((int) config_chipset_for_pio(drive, 2));
case XFER_PIO_1: return((int) config_chipset_for_pio(drive, 1));
case XFER_PIO_0:
- default: return((int) config_chipset_for_pio(drive, 0));
+ default: return((int) config_chipset_for_pio(drive, 0));
}
-
- if (speed > XFER_MW_DMA_2)
- pci_write_config_byte(dev, drive_pci|0x01, test2|mask);
-
drive->current_speed = speed;
+#ifdef DEBUG
+ sis5513_load_verify_registers(dev, "sis5513_tune_chipset end");
+#endif
return ((int) ide_config_drive_speed(drive, speed));
}
struct hd_driveid *id = drive->id;
ide_hwif_t *hwif = HWIF(drive);
- byte four_two = 0, speed = 0;
- int err;
+ byte speed = 0;
byte unit = (drive->select.b.unit & 0x01);
byte udma_66 = eighty_ninty_three(drive);
- byte ultra_100 = 0;
- if (host_dev) {
- switch(host_dev->device) {
- case PCI_DEVICE_ID_SI_635:
- case PCI_DEVICE_ID_SI_640:
- case PCI_DEVICE_ID_SI_645:
- case PCI_DEVICE_ID_SI_650:
- case PCI_DEVICE_ID_SI_730:
- case PCI_DEVICE_ID_SI_735:
- case PCI_DEVICE_ID_SI_740:
- case PCI_DEVICE_ID_SI_745:
- case PCI_DEVICE_ID_SI_750:
- ultra_100 = 1;
- case PCI_DEVICE_ID_SI_530:
- case PCI_DEVICE_ID_SI_540:
- case PCI_DEVICE_ID_SI_620:
- case PCI_DEVICE_ID_SI_630:
- four_two = 0x01;
- break;
- default:
- four_two = 0x00; break;
- }
- }
+#ifdef DEBUG
+ printk("SIS5513: config_chipset_for_dma, drive %d, ultra %d\n",
+ drive->dn, ultra);
+#endif
- if ((id->dma_ultra & 0x0020) && (ultra) && (udma_66) && (four_two) && (ultra_100))
+ if ((id->dma_ultra & 0x0020) && ultra && udma_66 && (dma_capability >= ATA_100a))
speed = XFER_UDMA_5;
- else if ((id->dma_ultra & 0x0010) && (ultra) && (udma_66) && (four_two))
+ else if ((id->dma_ultra & 0x0010) && ultra && udma_66 && (dma_capability >= ATA_66))
speed = XFER_UDMA_4;
- else if ((id->dma_ultra & 0x0008) && (ultra) && (udma_66) && (four_two))
+ else if ((id->dma_ultra & 0x0008) && ultra && udma_66 && (dma_capability >= ATA_66))
speed = XFER_UDMA_3;
- else if ((id->dma_ultra & 0x0004) && (ultra))
+ else if ((id->dma_ultra & 0x0004) && ultra && (dma_capability >= ATA_33))
speed = XFER_UDMA_2;
- else if ((id->dma_ultra & 0x0002) && (ultra))
+ else if ((id->dma_ultra & 0x0002) && ultra && (dma_capability >= ATA_33))
speed = XFER_UDMA_1;
- else if ((id->dma_ultra & 0x0001) && (ultra))
+ else if ((id->dma_ultra & 0x0001) && ultra && (dma_capability >= ATA_33))
speed = XFER_UDMA_0;
else if (id->dma_mword & 0x0004)
speed = XFER_MW_DMA_2;
outb(inb(hwif->dma_base+2)|(1<<(5+unit)), hwif->dma_base+2);
- err = sis5513_tune_chipset(drive, speed);
-
-#if SIS5513_DEBUG_DRIVE_INFO
- printk("%s: %s drive%d\n", drive->name, ide_xfer_verbose(speed), drive->dn);
-#endif /* SIS5513_DEBUG_DRIVE_INFO */
+ sis5513_tune_chipset(drive, speed);
return ((int) ((id->dma_ultra >> 11) & 7) ? ide_dma_on :
((id->dma_ultra >> 8) & 7) ? ide_dma_on :
return HWIF(drive)->dmaproc(dma_func, drive);
}
-/*
- * sis5513_dmaproc() initiates/aborts (U)DMA read/write operations on a drive.
- */
+/* initiates/aborts (U)DMA read/write operations on a drive. */
int sis5513_dmaproc (ide_dma_action_t func, ide_drive_t *drive)
{
switch (func) {
}
#endif /* CONFIG_BLK_DEV_IDEDMA */
+/* Chip detection and general config */
unsigned int __init pci_init_sis5513(struct pci_dev *dev)
{
struct pci_dev *host;
int i = 0;
- byte latency = 0;
- pci_read_config_byte(dev, PCI_LATENCY_TIMER, &latency);
+#ifdef DEBUG
+ sis5513_print_registers(dev, "pci_init_sis5513 start");
+#endif
- for (i = 0; i < ARRAY_SIZE (SiSHostChipInfo) && !host_dev; i++) {
+ /* Find the chip */
+ for (i = 0; i < ARRAY_SIZE(SiSHostChipInfo) && !host_dev; i++) {
host = pci_find_device (PCI_VENDOR_ID_SI,
SiSHostChipInfo[i].host_id,
NULL);
continue;
host_dev = host;
+ dma_capability = SiSHostChipInfo[i].dma_capability;
printk(SiSHostChipInfo[i].name);
printk("\n");
- if (SiSHostChipInfo[i].flags & SIS5513_FLAG_LATENCY) {
- if (latency != 0x10)
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x10);
+
+ if (SiSHostChipInfo[i].flags & SIS5513_LATENCY) {
+ byte latency = (dma_capability == ATA_100)? 0x80 : 0x10; /* Lacking specs */
+ pci_write_config_byte(dev, PCI_LATENCY_TIMER, latency);
}
}
+ /* Make general config ops here
+ 1/ tell IDE channels to operate in Compabitility mode only
+ 2/ tell old chips to allow per drive IDE timings */
if (host_dev) {
- byte reg52h = 0;
-
- pci_read_config_byte(dev, 0x52, ®52h);
- if (!(reg52h & 0x04)) {
- /* set IDE controller to operate in Compabitility mode only */
- pci_write_config_byte(dev, 0x52, reg52h|0x04);
+ byte reg;
+ switch(dma_capability) {
+ case ATA_133:
+ case ATA_100:
+ /* Set compatibility bit */
+ pci_read_config_byte(dev, 0x49, ®);
+ if (!(reg & 0x01)) {
+ pci_write_config_byte(dev, 0x49, reg|0x01);
+ }
+ break;
+ case ATA_100a:
+ case ATA_66:
+ /* On ATA_66 chips the bit was elsewhere */
+ pci_read_config_byte(dev, 0x52, ®);
+ if (!(reg & 0x04)) {
+ pci_write_config_byte(dev, 0x52, reg|0x04);
+ }
+ break;
+ case ATA_33:
+ /* On ATA_33 we didn't have a single bit to set */
+ pci_read_config_byte(dev, 0x09, ®);
+ if ((reg & 0x0f) != 0x00) {
+ pci_write_config_byte(dev, 0x09, reg&0xf0);
+ }
+ case ATA_16:
+ /* force per drive recovery and active timings
+ needed on ATA_33 and below chips */
+ pci_read_config_byte(dev, 0x52, ®);
+ if (!(reg & 0x08)) {
+ pci_write_config_byte(dev, 0x52, reg|0x08);
+ }
+ break;
+ case ATA_00:
+ default: break;
}
+
#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS)
if (!sis_proc) {
sis_proc = 1;
bmide_dev = dev;
sis_display_info = &sis_get_info;
}
-#endif /* defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS) */
+#endif
}
+#ifdef DEBUG
+ sis5513_load_verify_registers(dev, "pci_init_sis5513 end");
+#endif
return 0;
}
byte mask = hwif->channel ? 0x20 : 0x10;
pci_read_config_byte(hwif->pci_dev, 0x48, ®48h);
- if (host_dev) {
- switch(host_dev->device) {
- case PCI_DEVICE_ID_SI_530:
- case PCI_DEVICE_ID_SI_540:
- case PCI_DEVICE_ID_SI_620:
- case PCI_DEVICE_ID_SI_630:
- case PCI_DEVICE_ID_SI_635:
- case PCI_DEVICE_ID_SI_640:
- case PCI_DEVICE_ID_SI_645:
- case PCI_DEVICE_ID_SI_650:
- case PCI_DEVICE_ID_SI_730:
- case PCI_DEVICE_ID_SI_735:
- case PCI_DEVICE_ID_SI_740:
- case PCI_DEVICE_ID_SI_745:
- case PCI_DEVICE_ID_SI_750:
- ata66 = (reg48h & mask) ? 0 : 1;
- default:
- break;
- }
+ if (dma_capability >= ATA_66) {
+ ata66 = (reg48h & mask) ? 0 : 1;
}
- return (ata66);
+ return ata66;
}
void __init ide_init_sis5513 (ide_hwif_t *hwif)
return;
if (host_dev) {
- switch(host_dev->device) {
#ifdef CONFIG_BLK_DEV_IDEDMA
- case PCI_DEVICE_ID_SI_530:
- case PCI_DEVICE_ID_SI_540:
- case PCI_DEVICE_ID_SI_620:
- case PCI_DEVICE_ID_SI_630:
- case PCI_DEVICE_ID_SI_635:
- case PCI_DEVICE_ID_SI_640:
- case PCI_DEVICE_ID_SI_645:
- case PCI_DEVICE_ID_SI_650:
- case PCI_DEVICE_ID_SI_730:
- case PCI_DEVICE_ID_SI_735:
- case PCI_DEVICE_ID_SI_740:
- case PCI_DEVICE_ID_SI_745:
- case PCI_DEVICE_ID_SI_750:
- case PCI_DEVICE_ID_SI_5600:
- case PCI_DEVICE_ID_SI_5597:
- case PCI_DEVICE_ID_SI_5591:
- if (!noautodma)
- hwif->autodma = 1;
- hwif->highmem = 1;
- hwif->dmaproc = &sis5513_dmaproc;
- break;
-#endif /* CONFIG_BLK_DEV_IDEDMA */
- default:
- hwif->autodma = 0;
- break;
+ if (dma_capability > ATA_16) {
+ hwif->autodma = noautodma ? 0 : 1;
+ hwif->highmem = 1;
+ hwif->dmaproc = &sis5513_dmaproc;
+ } else {
+#endif
+ hwif->autodma = 0;
+#ifdef CONFIG_BLK_DEV_IDEDMA
}
+#endif
}
return;
}
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