.align 3
ret_from_sys_call:
cmovne $26,0,$19 /* $19 = 0 => non-restartable */
- ldq $3,TASK_PROCESSOR($8)
+ ldl $3,TASK_PROCESSOR($8)
lda $4,softirq_state
sll $3,5,$3
addq $3,$4,$4
if (DEVICE_NR(inode->i_rdev) >= NUM_RAMDISKS)
return -ENXIO;
+ filp->f_op = &def_blk_fops;
MOD_INC_USE_COUNT;
return 0;
*/
static void __init rd_load_image(kdev_t device, int offset, int unit)
{
- struct inode inode, out_inode;
+ struct inode *inode, *out_inode;
struct file infile, outfile;
struct dentry in_dentry, out_dentry;
mm_segment_t fs;
ram_device = MKDEV(MAJOR_NR, unit);
memset(&infile, 0, sizeof(infile));
- memset(&inode, 0, sizeof(inode));
memset(&in_dentry, 0, sizeof(in_dentry));
- inode.i_rdev = device;
- init_waitqueue_head(&inode.i_wait);
+ inode = get_empty_inode();
+ inode->i_rdev = device;
+ inode->i_bdev = bdget(kdev_t_to_nr(device));
infile.f_mode = 1; /* read only */
infile.f_dentry = &in_dentry;
- in_dentry.d_inode = &inode;
+ in_dentry.d_inode = inode;
memset(&outfile, 0, sizeof(outfile));
- memset(&out_inode, 0, sizeof(out_inode));
memset(&out_dentry, 0, sizeof(out_dentry));
- out_inode.i_rdev = ram_device;
- init_waitqueue_head(&out_inode.i_wait);
+ out_inode = get_empty_inode();
+ out_inode->i_rdev = ram_device;
+ out_inode->i_bdev = bdget(kdev_t_to_nr(ram_device));
outfile.f_mode = 3; /* read/write */
outfile.f_dentry = &out_dentry;
- out_dentry.d_inode = &out_inode;
+ out_dentry.d_inode = out_inode;
- if (blkdev_open(&inode, &infile) != 0) return;
- if (blkdev_open(&out_inode, &outfile) != 0) return;
+ if (blkdev_open(inode, &infile) != 0)
+ goto free_inodes;
+ if (blkdev_open(out_inode, &outfile) != 0)
+ goto free_inodes;
fs = get_fs();
set_fs(KERNEL_DS);
rotate = 0;
invalidate_buffers(device);
if (infile.f_op->release)
- infile.f_op->release(&inode, &infile);
+ infile.f_op->release(inode, &infile);
printk("Please insert disk #%d and press ENTER\n", i/devblocks+1);
wait_for_keypress();
- if (blkdev_open(&inode, &infile) != 0) {
+ if (blkdev_open(inode, &infile) != 0) {
printk("Error opening disk.\n");
goto done;
}
done:
if (infile.f_op->release)
- infile.f_op->release(&inode, &infile);
+ infile.f_op->release(inode, &infile);
set_fs(fs);
+free_inodes:
+ iput(inode);
+ iput(out_inode);
}
-/* $Id: sunbmac.c,v 1.14 2000/02/09 11:15:35 davem Exp $
+/* $Id: sunbmac.c,v 1.15 2000/02/10 21:14:22 davem Exp $
* sunbmac.c: Driver for Sparc BigMAC 100baseT ethernet adapters.
*
* Copyright (C) 1997, 1998, 1999 David S. Miller (davem@redhat.com)
-/* $Id: sunhme.c,v 1.86 2000/02/09 11:15:36 davem Exp $
+/* $Id: sunhme.c,v 1.87 2000/02/10 21:14:22 davem Exp $
* sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
* auto carrier detecting ethernet driver. Also known as the
* "Happy Meal Ethernet" found on SunSwift SBUS cards.
-/* $Id: sunlance.c,v 1.94 2000/02/09 11:15:40 davem Exp $
+/* $Id: sunlance.c,v 1.95 2000/02/10 21:14:24 davem Exp $
* lance.c: Linux/Sparc/Lance driver
*
* Written 1995, 1996 by Miguel de Icaza
-/* $Id: sunqe.c,v 1.43 2000/02/09 21:11:19 davem Exp $
+/* $Id: sunqe.c,v 1.44 2000/02/10 21:14:25 davem Exp $
* sunqe.c: Sparc QuadEthernet 10baseT SBUS card driver.
* Once again I am out to prove that every ethernet
* controller out there can be most efficiently programmed
head_list = priv->txList + priv->txHead;
if ( ! bbuf ) {
- if (in_irq())
- dev_kfree_skb_irq( (struct sk_buff *) head_list->buffer[9].address );
- else
- dev_kfree_skb( (struct sk_buff *) head_list->buffer[9].address );
-
+ dev_kfree_skb_irq( (struct sk_buff *) head_list->buffer[9].address );
head_list->buffer[9].address = 0;
}
list = priv->txList + i;
skb = (struct sk_buff *) list->buffer[9].address;
if ( skb ) {
- dev_kfree_skb( skb );
+ if (in_irq())
+ dev_kfree_skb_irq( skb );
+ else
+ dev_kfree_skb( skb );
list->buffer[9].address = 0;
}
}
list = priv->rxList + i;
skb = (struct sk_buff *) list->buffer[9].address;
if ( skb ) {
- dev_kfree_skb( skb );
+ if (in_irq())
+ dev_kfree_skb_irq( skb );
+ else
+ dev_kfree_skb( skb );
list->buffer[9].address = 0;
}
}
if (csr5 & (RxIntr | RxNoBuf))
work_budget -= tulip_rx(dev);
- spin_lock(&tp->tx_lock);
-
if (csr5 & (TxNoBuf | TxDied | TxIntr)) {
unsigned int dirty_tx;
+ spin_lock(&tp->tx_lock);
+
for (dirty_tx = tp->dirty_tx; tp->cur_tx - dirty_tx > 0;
dirty_tx++) {
int entry = dirty_tx % TX_RING_SIZE;
outl(tp->csr6 | 0x0002, ioaddr + CSR6);
outl(tp->csr6 | 0x2002, ioaddr + CSR6);
}
+ spin_unlock(&tp->tx_lock);
}
- spin_unlock(&tp->tx_lock);
/* Log errors. */
if (csr5 & AbnormalIntr) { /* Abnormal error summary bit. */
will often result in the machine crashing or spontaneously rebooting
during startup. Examples of machines that need this are the
Dell PowerEdge 6300 machines.
+
+ "aic7xxx=seltime:2" - This option controls how long the card waits
+ during a device selection sequence for the device to respond.
+ The original SCSI spec says that this "should be" 256ms. This
+ is generally not required with modern devices. However, some
+ very old SCSI I devices need the full 256ms. Most modern devices
+ can run fine with only 64ms. The default for this option is
+ 64ms. If you need to change this option, then use the following
+ table to set the proper value in the example above:
+ 0 - 256ms
+ 1 - 128ms
+ 2 - 64ms
+ 3 - 32ms
"aic7xxx=panic_on_abort" - This option is for debugging and will cause
the driver to panic the linux kernel and freeze the system the first
Web sites
------------------------------
- http://people.redhat.com/dledford/aic7xxx.html
- - Primary web site maintained by Doug Ledford.
+ http://people.redhat.com/dledford/
+ - My web site, also the primary aic7xxx site with several related
+ pages.
Dean W. Gehnert
deang@teleport.com
$Revision: 3.0 $
-Modified by Doug Ledford 1998-9
+Modified by Doug Ledford 1998-2000
+
*/
#define VIRT_TO_BUS(a) (unsigned int)virt_to_bus((void *)(a))
-#define AIC7XXX_C_VERSION "5.1.21"
+#define AIC7XXX_C_VERSION "5.2.0"
#define NUMBER(arr) (sizeof(arr) / sizeof(arr[0]))
#define MIN(a,b) (((a) < (b)) ? (a) : (b))
* and what flags weren't. This way, I could clean up the flag usage on
* a use by use basis. Doug Ledford
*/
+ AHC_NO_STPWR = 0x00040000,
AHC_RESET_DELAY = 0x00080000,
AHC_A_SCANNED = 0x00100000,
AHC_B_SCANNED = 0x00200000,
AHC_AIC7899_FE = AHC_AIC7890_FE|AHC_ULTRA3,
} ahc_feature;
+#define SCB_DMA_ADDR(scb, addr) ((unsigned long)(addr) + (scb)->scb_dma->dma_offset)
+
+struct aic7xxx_scb_dma {
+ unsigned long dma_offset; /* Correction you have to add
+ * to virtual address to get
+ * dma handle in this region */
+ dma_addr_t dma_address; /* DMA handle of the start,
+ * for unmap */
+ unsigned int dma_len; /* DMA length */
+};
+
struct aic7xxx_scb {
struct aic7xxx_hwscb *hscb; /* corresponding hardware scb */
Scsi_Cmnd *cmd; /* Scsi_Cmnd for this scb */
struct hw_scatterlist *sg_list; /* SG list in adapter format */
unsigned char tag_action;
unsigned char sg_count;
- unsigned char sense_cmd[6]; /*
+ unsigned char *sense_cmd; /*
* Allocate 6 characters for
* sense command.
*/
+ unsigned char *cmnd;
unsigned int sg_length; /* We init this during buildscb so we
* don't have to calculate anything
* during underflow/overflow/stat code
*/
void *kmalloc_ptr;
+ struct aic7xxx_scb_dma *scb_dma;
};
/*
unsigned char numscbs; /* current number of scbs */
unsigned char maxhscbs; /* hardware scbs */
unsigned char maxscbs; /* max scbs including pageable scbs */
+ unsigned int hscbs_dma; /* DMA handle to hscbs */
+ unsigned int hscbs_dma_len; /* length of the above DMA area */
void *hscb_kmalloc_ptr;
} scb_data_type;
volatile unsigned char activescbs; /* active scbs */
volatile unsigned char max_activescbs;
volatile unsigned char qinfifonext;
+ volatile unsigned char *untagged_scbs;
+ volatile unsigned char *qoutfifo;
+ volatile unsigned char *qinfifo;
#define DEVICE_PRESENT 0x01
#define BUS_DEVICE_RESET_PENDING 0x02
* We put the less frequently used host structure items after the more
* frequently used items to try and ease the burden on the cache subsystem.
* These entries are not *commonly* accessed, whereas the preceding entries
- * are accessed very often. The only exceptions are the qinfifo, qoutfifo,
- * and untagged_scbs array. But, they are often accessed only once and each
- * access into these arrays is likely to blow a cache line, so they are put
- * down here so we can minimize the number of cache lines required to hold
- * the preceeding entries.
+ * are accessed very often.
*/
- volatile unsigned char untagged_scbs[256];
- volatile unsigned char qoutfifo[256];
- volatile unsigned char qinfifo[256];
unsigned int irq; /* IRQ for this adapter */
int instance; /* aic7xxx instance number */
int scsi_id; /* host adapter SCSI ID */
unsigned short ultraenb; /* Ultra mode target list */
unsigned short bios_control; /* bios control - SEEPROM */
unsigned short adapter_control; /* adapter control - SEEPROM */
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,92)
- struct pci_dev *pdev;
-#endif
+ struct pci_dev *pdev;
unsigned char pci_bus;
unsigned char pci_device_fn;
struct seeprom_config sc;
int host_no; /* SCSI host number */
unsigned long mbase; /* I/O memory address */
ahc_chip chip; /* chip type */
+ dma_addr_t fifo_dma; /* DMA handle for fifo arrays */
/*
* Statistics Kept:
/*
* So that we can set how long each device is given as a selection timeout.
* The table of values goes like this:
- * 0 - 256ms
- * 1 - 128ms
- * 2 - 64ms
- * 3 - 32ms
+ * 0 - 256ms
+ * 1 - 128ms
+ * 2 - 64ms
+ * 3 - 32ms
* We default to 64ms because it's fast. Some old SCSI-I devices need a
* longer time. The final value has to be left shifted by 3, hence 0x10
* is the final value.
{
x = inb(p->base + port);
}
+ mb();
return(x);
#else
return(inb(p->base + port));
struct ins_format1 *fmt1_ins;
struct ins_format3 *fmt3_ins;
unsigned char opcode;
+ volatile unsigned char hcntrl;
instr = *(union ins_formats*) &seqprog[instrptr * 4];
}
}
aic_outb(p, (instr.integer & 0xff), SEQRAM);
- udelay(50);
+ hcntrl = aic_inb(p, HCNTRL);
aic_outb(p, ((instr.integer >> 8) & 0xff), SEQRAM);
- udelay(50);
+ hcntrl = aic_inb(p, HCNTRL);
aic_outb(p, ((instr.integer >> 16) & 0xff), SEQRAM);
- udelay(50);
+ hcntrl = aic_inb(p, HCNTRL);
aic_outb(p, ((instr.integer >> 24) & 0xff), SEQRAM);
+ hcntrl = aic_inb(p, HCNTRL);
udelay(50);
break;
printk("\n");
}
-/*+F*************************************************************************
- * Function:
- * aic7xxx_delay
- *
- * Description:
- * Delay for specified amount of time. We use mdelay because the timer
- * interrupt is not guaranteed to be enabled. This will cause an
- * infinite loop since jiffies (clock ticks) is not updated.
- *-F*************************************************************************/
-static void
-aic7xxx_delay(int seconds)
-{
- mdelay(seconds * 1000);
-}
-
/*+F*************************************************************************
* Function:
* aic7xxx_info
aic7xxx_allocate_scb(struct aic7xxx_host *p)
{
struct aic7xxx_scb *scbp = NULL;
- int scb_size = sizeof(struct aic7xxx_scb) +
- sizeof (struct hw_scatterlist) * AIC7XXX_MAX_SG;
+ int scb_size = (sizeof (struct hw_scatterlist) * AIC7XXX_MAX_SG) + 12 + 6;
int i;
int step = PAGE_SIZE / 1024;
unsigned long scb_count = 0;
struct hw_scatterlist *hsgp;
struct aic7xxx_scb *scb_ap;
- unsigned long temp;
-
+ struct aic7xxx_scb_dma *scb_dma;
+ unsigned char *bufs;
if (p->scb_data->numscbs < p->scb_data->maxscbs)
{
* efficiency since scb_size * (i -1) is growing slightly faster
* than the right hand side. If the number of SG array elements
* is changed, this function may not be near so efficient any more.
+ *
+ * Since the DMA'able buffers are now allocated in a seperate
+ * chunk this algorithm has been modified to match. The '12'
+ * and '6' factors in scb_size are for the DMA'able command byte
+ * and sensebuffers respectively. -DaveM
*/
for ( i=step;; i *= 2 )
{
}
}
scb_count = MIN( (i-1), p->scb_data->maxscbs - p->scb_data->numscbs);
- scb_ap = (struct aic7xxx_scb *)kmalloc(scb_size * scb_count, GFP_ATOMIC);
- if (scb_ap != NULL)
+ scb_ap = (struct aic7xxx_scb *)kmalloc(sizeof (struct aic7xxx_scb) * scb_count
+ + sizeof(struct aic7xxx_scb_dma), GFP_ATOMIC);
+ if (scb_ap == NULL)
+ return(0);
+ scb_dma = (struct aic7xxx_scb_dma *)&scb_ap[scb_count];
+ hsgp = (struct hw_scatterlist *)
+ pci_alloc_consistent(p->pdev, scb_size * scb_count,
+ &scb_dma->dma_address);
+ if (hsgp == NULL)
{
-#ifdef AIC7XXX_VERBOSE_DEBUGGING
- if (aic7xxx_verbose > 0xffff)
- {
- if (p->scb_data->numscbs == 0)
- printk(INFO_LEAD "Allocating initial %ld SCB structures.\n",
- p->host_no, -1, -1, -1, scb_count);
- else
- printk(INFO_LEAD "Allocating %ld additional SCB structures.\n",
- p->host_no, -1, -1, -1, scb_count);
- }
-#endif
- memset(scb_ap, 0, scb_count * scb_size);
- temp = (unsigned long) &scb_ap[scb_count];
- temp += 1023;
- temp &= ~1023;
- hsgp = (struct hw_scatterlist *)temp;
- for (i=0; i < scb_count; i++)
- {
- scbp = &scb_ap[i];
- scbp->hscb = &p->scb_data->hscbs[p->scb_data->numscbs];
- scbp->sg_list = &hsgp[i * AIC7XXX_MAX_SG];
- memset(scbp->hscb, 0, sizeof(struct aic7xxx_hwscb));
- scbp->hscb->tag = p->scb_data->numscbs;
- /*
- * Place in the scb array; never is removed
- */
- p->scb_data->scb_array[p->scb_data->numscbs++] = scbp;
- scbq_insert_tail(&p->scb_data->free_scbs, scbp);
- }
- scbp->kmalloc_ptr = scb_ap;
+ kfree(scb_ap);
+ return(0);
}
- else
+ bufs = (unsigned char *)&hsgp[scb_count * AIC7XXX_MAX_SG];
+#ifdef AIC7XXX_VERBOSE_DEBUGGING
+ if (aic7xxx_verbose > 0xffff)
{
- return(0);
+ if (p->scb_data->numscbs == 0)
+ printk(INFO_LEAD "Allocating initial %ld SCB structures.\n",
+ p->host_no, -1, -1, -1, scb_count);
+ else
+ printk(INFO_LEAD "Allocating %ld additional SCB structures.\n",
+ p->host_no, -1, -1, -1, scb_count);
+ }
+#endif
+ memset(scb_ap, 0, sizeof (struct aic7xxx_scb) * scb_count);
+ scb_dma->dma_offset = (unsigned long)scb_dma->dma_address
+ - (unsigned long)hsgp;
+ scb_dma->dma_len = scb_size * scb_count;
+ for (i=0; i < scb_count; i++)
+ {
+ scbp = &scb_ap[i];
+ scbp->hscb = &p->scb_data->hscbs[p->scb_data->numscbs];
+ scbp->sg_list = &hsgp[i * AIC7XXX_MAX_SG];
+ scbp->sense_cmd = bufs;
+ scbp->cmnd = bufs + 6;
+ bufs += 12 + 6;
+ scbp->scb_dma = scb_dma;
+ memset(scbp->hscb, 0, sizeof(struct aic7xxx_hwscb));
+ scbp->hscb->tag = p->scb_data->numscbs;
+ /*
+ * Place in the scb array; never is removed
+ */
+ p->scb_data->scb_array[p->scb_data->numscbs++] = scbp;
+ scbq_insert_tail(&p->scb_data->free_scbs, scbp);
}
+ scbp->kmalloc_ptr = scb_ap;
}
return(scb_count);
}
struct aic7xxx_scb *scbp;
unsigned char queue_depth;
+ if (scb->sg_count == 1)
+ pci_unmap_single(p->pdev, le32_to_cpu(scb->sg_list[0].address),
+ le32_to_cpu(scb->sg_list[0].length));
+ else if (scb->sg_count > 1)
+ {
+ struct scatterlist *sg;
+
+ sg = (struct scatterlist *)cmd->request_buffer;
+ pci_unmap_sg(p->pdev, sg, cmd->use_sg);
+ }
if (scb->flags & SCB_RECOVERY_SCB)
{
p->flags &= ~AHC_ABORT_PENDING;
while ( (aic_inb(p, SCSISEQ) & SCSIRSTO) == 0)
mdelay(5);
- mdelay(10);
+ /*
+ * Some of the new Ultra2 chipsets need a longer delay after a chip
+ * reset than just the init setup creates, so we have to delay here
+ * before we go into a reset in order to make the chips happy.
+ */
+ if (p->features & AHC_ULTRA2)
+ mdelay(250);
+ else
+ mdelay(50);
/* Turn off the bus reset. */
aic_outb(p, 0, SCSISEQ);
- mdelay(5);
+ mdelay(10);
aic7xxx_clear_intstat(p);
/* Re-enable reset interrupts. */
case CHECK_CONDITION:
if ( !(scb->flags & SCB_SENSE) )
{
+ unsigned char *sense_buffer;
/*
* XXX - How do we save the residual (if there is one).
*/
* Send a sense command to the requesting target.
* XXX - revisit this and get rid of the memcopys.
*/
- memcpy(&scb->sense_cmd[0], &generic_sense[0],
+ memcpy(scb->sense_cmd, &generic_sense[0],
sizeof(generic_sense));
scb->sense_cmd[1] = (cmd->lun << 5);
scb->sense_cmd[4] = sizeof(cmd->sense_buffer);
- scb->sg_list[0].address =
- cpu_to_le32(VIRT_TO_BUS(&cmd->sense_buffer[0]));
+ sense_buffer = cmd->sense_buffer;
scb->sg_list[0].length =
cpu_to_le32(sizeof(cmd->sense_buffer));
hscb->control = 0;
hscb->target_status = 0;
hscb->SG_list_pointer =
- cpu_to_le32(VIRT_TO_BUS(&scb->sg_list[0]));
- hscb->data_pointer = scb->sg_list[0].address;
+ cpu_to_le32(SCB_DMA_ADDR(scb, scb->sg_list));
hscb->data_count = scb->sg_list[0].length;
hscb->SCSI_cmd_pointer =
- cpu_to_le32(VIRT_TO_BUS(&scb->sense_cmd[0]));
+ cpu_to_le32(SCB_DMA_ADDR(scb, scb->sense_cmd));
hscb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]);
hscb->residual_SG_segment_count = 0;
hscb->residual_data_count[0] = 0;
* SENSE information anyway.
*/
if (cmd->next->cmnd[0] != TEST_UNIT_READY)
- {
- scb->sg_list[0].address =
- cpu_to_le32(VIRT_TO_BUS(&cmd->next->sense_buffer[0]));
- hscb->data_pointer = scb->sg_list[0].address;
- }
+ sense_buffer = cmd->next->sense_buffer;
}
+ scb->sg_list[0].address =
+ cpu_to_le32(pci_map_single(p->pdev, sense_buffer,
+ sizeof(cmd->sense_buffer)));
+ hscb->data_pointer = scb->sg_list[0].address;
+
scb->flags |= SCB_SENSE;
/*
* Ensure the target is busy since this will be an
else if (scb->flags & SCB_MSGOUT_PPR)
{
unsigned int max_sync, period;
- unsigned char options = p->transinfo[tindex].goal_options;
+ unsigned char options = 0;
if (p->features & AHC_ULTRA2)
{
(p->dev_flags[tindex] & DEVICE_SCSI_3) &&
(p->transinfo[tindex].goal_width ==
MSG_EXT_WDTR_BUS_16_BIT) &&
- (options != 0) )
+ (p->transinfo[tindex].goal_options != 0) )
{
max_sync = AHC_SYNCRATE_ULTRA3;
+ options = p->transinfo[tindex].goal_options;
}
else
{
}
break;
+ case WIDE_RESIDUE:
+ {
+ unsigned char resid_sgcnt, index;
+ unsigned char scb_index = aic_inb(p, SCB_TAG);
+ unsigned int cur_addr, resid_dcnt;
+ unsigned int native_addr, native_length;
+ int i;
+
+ if(scb_index > p->scb_data->numscbs)
+ {
+ printk(WARN_LEAD "invalid scb_index during WIDE_RESIDUE.\n",
+ p->host_no, -1, -1, -1);
+ /*
+ * XXX: Add error handling here
+ */
+ break;
+ }
+ scb = p->scb_data->scb_array[scb_index];
+ if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
+ {
+ printk(WARN_LEAD "invalid scb during WIDE_RESIDUE flags:0x%x "
+ "scb->cmd:0x%lx\n", p->host_no, CTL_OF_SCB(scb),
+ scb->flags, (unsigned long)scb->cmd);
+ break;
+ }
+
+ /*
+ * We have a valid scb to use on this WIDE_RESIDUE message, so
+ * we need to walk the sg list looking for this particular sg
+ * segment, then see if we happen to be at the very beginning of
+ * the segment. If we are, then we have to back things up to
+ * the previous segment. If not, then we simply need to remove
+ * one byte from this segments address and add one to the byte
+ * count.
+ */
+ cur_addr = aic_inb(p, SHADDR) | (aic_inb(p, SHADDR + 1) << 8) |
+ (aic_inb(p, SHADDR + 2) << 16) | (aic_inb(p, SHADDR + 3) << 24);
+ resid_sgcnt = aic_inb(p, SCB_RESID_SGCNT);
+ resid_dcnt = aic_inb(p, SCB_RESID_DCNT) |
+ (aic_inb(p, SCB_RESID_DCNT + 1) << 8) |
+ (aic_inb(p, SCB_RESID_DCNT + 2) << 24);
+ index = scb->sg_count - resid_sgcnt;
+ native_addr = le32_to_cpu(scb->sg_list[index].address);
+ native_length = le32_to_cpu(scb->sg_list[index].length);
+ /*
+ * Make sure this is a valid sg_seg for the given pointer
+ */
+ if(cur_addr < native_addr ||
+ cur_addr > (native_addr + native_length))
+ {
+ printk(WARN_LEAD "invalid cur_addr:0x%x during WIDE_RESIDUE\n",
+ p->host_no, CTL_OF_SCB(scb), cur_addr);
+ if(index > 0)
+ printk(WARN_LEAD " sg_address[-1]:0x%x sg_length[-1]:%d\n",
+ p->host_no, CTL_OF_SCB(scb),
+ le32_to_cpu(scb->sg_list[index - 1].address),
+ le32_to_cpu(scb->sg_list[index - 1].length));
+ printk(WARN_LEAD " sg_address:0x%x sg_length:%d\n",
+ p->host_no, CTL_OF_SCB(scb),
+ native_addr, native_length);
+ if(resid_sgcnt > 1)
+ printk(WARN_LEAD " sg_address[1]:0x%x sg_length[1]:%d\n",
+ p->host_no, CTL_OF_SCB(scb),
+ le32_to_cpu(scb->sg_list[index + 1].address),
+ le32_to_cpu(scb->sg_list[index + 1].length));
+ break;
+ }
+
+ /*
+ * If our current address matches the sg_seg->address then we
+ * have to back up the sg array to the previous segment and set
+ * it up to have only one byte of transfer left to go.
+ */
+ if(cur_addr == native_addr)
+ {
+ if(index == 0)
+ {
+ printk(WARN_LEAD "bogus WIDE_RESIDUE message, no data has been "
+ "transferred.\n", p->host_no, CTL_OF_SCB(scb));
+ break;
+ }
+ resid_sgcnt++;
+ index--;
+ cur_addr = le32_to_cpu(scb->sg_list[index].address) +
+ le32_to_cpu(scb->sg_list[index].length) - 1;
+ native_addr = aic_inb(p, SG_NEXT) | (aic_inb(p, SG_NEXT + 1) << 8)
+ | (aic_inb(p, SG_NEXT + 2) << 16) | (aic_inb(p, SG_NEXT + 3) << 24);
+ native_addr -= SG_SIZEOF;
+ aic_outb(p, resid_sgcnt, SG_COUNT);
+ aic_outb(p, resid_sgcnt, SCB_RESID_SGCNT);
+ aic_outb(p, native_addr & 0xff, SG_NEXT);
+ aic_outb(p, (native_addr >> 8) & 0xff, SG_NEXT + 1);
+ aic_outb(p, (native_addr >> 16) & 0xff, SG_NEXT + 2);
+ aic_outb(p, (native_addr >> 24) & 0xff, SG_NEXT + 3);
+ aic_outb(p, 1, SCB_RESID_DCNT);
+ aic_outb(p, 0, SCB_RESID_DCNT + 1);
+ aic_outb(p, 0, SCB_RESID_DCNT + 2);
+ aic_outb(p, 1, HCNT);
+ aic_outb(p, 0, HCNT + 1);
+ aic_outb(p, 0, HCNT + 2);
+ aic_outb(p, cur_addr & 0xff, HADDR);
+ aic_outb(p, (cur_addr >> 8) & 0xff, HADDR + 1);
+ aic_outb(p, (cur_addr >> 16) & 0xff, HADDR + 2);
+ aic_outb(p, (cur_addr >> 24) & 0xff, HADDR + 3);
+ /*
+ * The sequencer actually wants to find the new address and byte
+ * count in the SHCNT and SHADDR register sets. These registers
+ * are a shadow of the regular HCNT and HADDR registers. On the
+ * Ultra2 controllers, these registers are read only and the way
+ * we have to set their values is to put the values we want into
+ * the HCNT and HADDR registers and then output PRELOADEN into
+ * the DFCNTRL register which causes the card to latch the current
+ * values in the HADDR and HCNT registers and drop it through to
+ * the shadow registers. On older cards we copy them directly
+ * across by hand.
+ */
+ if(p->features & AHC_ULTRA2)
+ {
+ aic_outb(p, aic_inb(p, DMAPARAMS), DFCNTRL);
+ i=0;
+ udelay(1);
+ while(((aic_inb(p, SSTAT0) & SDONE) != 0) && (i++ < 1000))
+ {
+ aic_outb(p, aic_inb(p, DMAPARAMS), DFCNTRL);
+ udelay(1);
+ }
+ }
+ else
+ {
+ aic_outb(p, 1, STCNT);
+ aic_outb(p, 0, STCNT + 1);
+ aic_outb(p, 0, STCNT + 2);
+ aic_outb(p, cur_addr & 0xff, SHADDR);
+ aic_outb(p, (cur_addr >> 8) & 0xff, SHADDR + 1);
+ aic_outb(p, (cur_addr >> 16) & 0xff, SHADDR + 2);
+ aic_outb(p, (cur_addr >> 24) & 0xff, SHADDR + 3);
+ }
+ }
+ else
+ {
+ /*
+ * Back the data pointer up by one and add one to the remaining
+ * byte count. Then store that in the HCNT and HADDR registers.
+ */
+ cur_addr--;
+ resid_dcnt++;
+ aic_outb(p, resid_dcnt & 0xff, SCB_RESID_DCNT);
+ aic_outb(p, (resid_dcnt >> 8) & 0xff, SCB_RESID_DCNT + 1);
+ aic_outb(p, (resid_dcnt >> 16) & 0xff, SCB_RESID_DCNT + 2);
+ aic_outb(p, resid_dcnt & 0xff, HCNT);
+ aic_outb(p, (resid_dcnt >> 8) & 0xff, HCNT + 1);
+ aic_outb(p, (resid_dcnt >> 16) & 0xff, HCNT + 2);
+ aic_outb(p, cur_addr & 0xff, HADDR);
+ aic_outb(p, (cur_addr >> 8) & 0xff, HADDR + 1);
+ aic_outb(p, (cur_addr >> 16) & 0xff, HADDR + 2);
+ aic_outb(p, (cur_addr >> 24) & 0xff, HADDR + 3);
+ if(p->features & AHC_ULTRA2)
+ {
+ aic_outb(p, aic_inb(p, DMAPARAMS), DFCNTRL);
+ i=0;
+ udelay(1);
+ while(((aic_inb(p, SSTAT0) & SDONE) != 0) && (i++ < 1000))
+ {
+ aic_outb(p, aic_inb(p, DMAPARAMS), DFCNTRL);
+ udelay(1);
+ }
+ }
+ else
+ {
+ aic_outb(p, resid_dcnt & 0xff, STCNT);
+ aic_outb(p, (resid_dcnt >> 8) & 0xff, STCNT + 1);
+ aic_outb(p, (resid_dcnt >> 16) & 0xff, STCNT + 2);
+ aic_outb(p, cur_addr & 0xff, SHADDR);
+ aic_outb(p, (cur_addr >> 8) & 0xff, SHADDR + 1);
+ aic_outb(p, (cur_addr >> 16) & 0xff, SHADDR + 2);
+ aic_outb(p, (cur_addr >> 24) & 0xff, SHADDR + 3);
+ }
+ }
+ }
+ break;
+
+
#if AIC7XXX_NOT_YET
case TRACEPOINT:
{
break;
}
- /*
- * If we aren't on one of the new Ultra3 cards, then reject any PPR
- * message since we can't support any option field other than 0
- */
- if( !(p->features & AHC_ULTRA3) )
- {
- reject = TRUE;
- break;
- }
-
if (p->msg_len < (MSG_EXT_PPR_LEN + 2))
{
break;
return;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,1,95)
spin_lock_irqsave(&io_request_lock, cpu_flags);
- if(test_and_set_bit(AHC_IN_ISR_BIT, &p->flags))
+ if(test_and_set_bit(AHC_IN_ISR_BIT, (void *)&p->flags))
{
return;
}
} while ( (aic_inb(p, INTSTAT) & INT_PEND) );
aic7xxx_done_cmds_complete(p);
aic7xxx_run_waiting_queues(p);
- clear_bit(AHC_IN_ISR_BIT, &p->flags);
+ clear_bit(AHC_IN_ISR_BIT, (void *)&p->flags);
spin_unlock_irqrestore(&io_request_lock, cpu_flags);
#else
if(set_bit(AHC_IN_ISR_BIT, (int *)&p->flags))
#undef CLOCK_PULSE
}
+#define CLOCK_PULSE(p) \
+ do { \
+ int limit = 0; \
+ do { \
+ mb(); \
+ pause_sequencer(p); /* This is just to generate some PCI */ \
+ /* traffic so the PCI read is flushed */ \
+ /* it shouldn't be needed, but some */ \
+ /* chipsets do indeed appear to need */ \
+ /* something to force PCI reads to get */ \
+ /* flushed */ \
+ udelay(1); /* Do nothing */ \
+ } while (((aic_inb(p, SEECTL) & SEERDY) == 0) && (++limit < 1000)); \
+ } while(0)
+
/*+F*************************************************************************
* Function:
* acquire_seeprom
static int
acquire_seeprom(struct aic7xxx_host *p)
{
- int wait;
/*
* Request access of the memory port. When access is
* should be no contention.
*/
aic_outb(p, SEEMS, SEECTL);
- wait = 1000; /* 1000 msec = 1 second */
- while ((wait > 0) && ((aic_inb(p, SEECTL) & SEERDY) == 0))
- {
- wait--;
- mdelay(1); /* 1 msec */
- }
+ CLOCK_PULSE(p);
if ((aic_inb(p, SEECTL) & SEERDY) == 0)
{
aic_outb(p, 0, SEECTL);
static void
release_seeprom(struct aic7xxx_host *p)
{
+ /*
+ * Make sure the SEEPROM is ready before we release it.
+ */
+ CLOCK_PULSE(p);
aic_outb(p, 0, SEECTL);
+ CLOCK_PULSE(p);
}
/*+F*************************************************************************
};
struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
-#define CLOCK_PULSE(p) \
- while ((aic_inb(p, SEECTL) & SEERDY) == 0) \
- { \
- ; /* Do nothing */ \
- }
-
/*
* Request access of the memory port.
*/
}
return (1);
-#undef CLOCK_PULSE
}
/*+F*************************************************************************
{
unsigned char brdctl, value;
+ /*
+ * Make sure the SEEPROM is ready before we access it
+ */
+ CLOCK_PULSE(p);
if (p->features & AHC_ULTRA2)
{
brdctl = BRDRW_ULTRA2;
aic_outb(p, brdctl, BRDCTL);
- udelay(4);
- return(aic_inb(p, BRDCTL));
+ CLOCK_PULSE(p);
+ value = aic_inb(p, BRDCTL);
+ CLOCK_PULSE(p);
+ return(value);
}
brdctl = BRDRW;
if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) ||
brdctl |= BRDCS;
}
aic_outb(p, brdctl, BRDCTL);
- udelay(1);
+ CLOCK_PULSE(p);
value = aic_inb(p, BRDCTL);
+ CLOCK_PULSE(p);
aic_outb(p, 0, BRDCTL);
- udelay(1);
+ CLOCK_PULSE(p);
return (value);
}
{
unsigned char brdctl;
+ /*
+ * Make sure the SEEPROM is ready before we access it
+ */
+ CLOCK_PULSE(p);
if (p->features & AHC_ULTRA2)
{
brdctl = value;
aic_outb(p, brdctl, BRDCTL);
- udelay(4);
+ CLOCK_PULSE(p);
brdctl |= BRDSTB_ULTRA2;
aic_outb(p, brdctl, BRDCTL);
- udelay(4);
+ CLOCK_PULSE(p);
brdctl &= ~BRDSTB_ULTRA2;
aic_outb(p, brdctl, BRDCTL);
- udelay(4);
+ CLOCK_PULSE(p);
read_brdctl(p);
+ CLOCK_PULSE(p);
}
else
{
}
brdctl = BRDSTB | BRDCS;
aic_outb(p, brdctl, BRDCTL);
- udelay(1);
+ CLOCK_PULSE(p);
brdctl |= value;
aic_outb(p, brdctl, BRDCTL);
- udelay(1);
+ CLOCK_PULSE(p);
brdctl &= ~BRDSTB;
aic_outb(p, brdctl, BRDCTL);
- udelay(1);
+ CLOCK_PULSE(p);
brdctl &= ~BRDCS;
aic_outb(p, brdctl, BRDCTL);
- udelay(1);
+ CLOCK_PULSE(p);
}
}
+#undef CLOCK_PULSE
+
/*+F*************************************************************************
* Function:
* aic785x_cable_detect
unsigned char term, scsi_conf;
struct Scsi_Host *host;
- /*
- * Lock out other contenders for our i/o space.
- */
- request_region(p->base, MAXREG - MINREG, "aic7xxx");
-
-
host = p->host;
p->scb_data->maxscbs = AIC7XXX_MAXSCB;
p->dev_timer.function = (void *)aic7xxx_timer;
p->dev_timer_active = 0;
- for (i = 0; i < NUMBER(p->untagged_scbs); i++)
- {
- p->untagged_scbs[i] = SCB_LIST_NULL;
- p->qinfifo[i] = SCB_LIST_NULL;
- p->qoutfifo[i] = SCB_LIST_NULL;
- }
/*
* We currently have no commands of any type
*/
printk("VLB slot %d\n", p->pci_device_fn);
break;
default:
- printk("PCI %d/%d\n", PCI_SLOT(p->pci_device_fn),
+ printk("PCI %d/%d/%d\n", p->pci_bus, PCI_SLOT(p->pci_device_fn),
PCI_FUNC(p->pci_device_fn));
break;
}
}
aic_outb(p, 0, SEQ_FLAGS);
+ /*
+ * We are starting to do real work on the card....it's possible we could
+ * generate some spurious interrupts at this point, especially in the
+ * event of a PCI error or some such. If there are other devices already
+ * registered on the same interrupt as us, this could cause the machine
+ * to lock up. So, we disable the interrupt this card is on until we
+ * finish our card setup. We only need to do this for modules, if we are
+ * compiled into the kernel then interrupts are already off during this
+ * part of the code.
+ */
+#ifdef MODULE
+ disable_irq(p->irq);
+#endif
+
detect_maxscb(p);
#endif
if ( (aic7xxx_stpwlev >> p->instance) & 0x01 )
{
- devconfig |= 0x02;
+ devconfig |= STPWLEVEL;
if (aic7xxx_verbose & VERBOSE_PROBE2)
- printk("(scsi%d) Force setting STPWLEV bit\n", p->host_no);
+ printk("(scsi%d) Force setting STPWLEVEL bit\n", p->host_no);
}
else
{
- devconfig &= ~0x02;
+ devconfig &= ~STPWLEVEL;
if (aic7xxx_verbose & VERBOSE_PROBE2)
- printk("(scsi%d) Force clearing STPWLEV bit\n", p->host_no);
+ printk("(scsi%d) Force clearing STPWLEVEL bit\n", p->host_no);
}
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,92)
pci_write_config_byte(p->pdev, DEVCONFIG, devconfig);
}
}
- /*
- * Clear out any possible pending interrupts.
- */
- aic7xxx_clear_intstat(p);
-
/*
* Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels
*/
aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term |
ENSTIMER | ACTNEGEN, SXFRCTL1);
aic_outb(p, 0, SIMODE0);
- aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1);
+ /*
+ * If we are a cardbus adapter then don't enable SCSI reset detection.
+ * We shouldn't likely be sharing SCSI busses with someone else, and
+ * if we don't have a cable currently plugged into the controller then
+ * we won't have a power source for the SCSI termination, which means
+ * we'll see infinite incoming bus resets.
+ */
+ if(p->flags & AHC_NO_STPWR)
+ aic_outb(p, ENSELTIMO | ENSCSIPERR, SIMODE1);
+ else
+ aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1);
aic_outb(p, 0, SCSIRATE);
if ( p->features & AHC_ULTRA2)
aic_outb(p, 0, SCSIOFFSET);
{
size_t array_size;
unsigned int hscb_physaddr;
- unsigned long temp;
array_size = p->scb_data->maxscbs * sizeof(struct aic7xxx_hwscb);
if (p->scb_data->hscbs == NULL)
{
- /*
- * A little padding so we can align thing the way we want
+ /* pci_alloc_consistent enforces the alignment already and
+ * clears the area as well.
*/
- p->scb_data->hscbs = kmalloc(array_size + 0x1f, GFP_ATOMIC);
+ p->scb_data->hscbs = pci_alloc_consistent(p->pdev, array_size,
+ &p->scb_data->hscbs_dma);
+ /* We have to use pci_free_consistent, not kfree */
+ p->scb_data->hscb_kmalloc_ptr = NULL;
+ p->scb_data->hscbs_dma_len = array_size;
}
if (p->scb_data->hscbs == NULL)
{
printk("(scsi%d) Unable to allocate hardware SCB array; "
"failing detection.\n", p->host_no);
+ aic_outb(p, 0, SIMODE1);
+#ifdef MODULE
+ enable_irq(p->irq);
+#endif
p->irq = 0;
return(0);
}
- /*
- * Save the actual kmalloc buffer pointer off, then align our
- * buffer to a 32 byte boundary
- */
- p->scb_data->hscb_kmalloc_ptr = p->scb_data->hscbs;
- temp = (unsigned long)p->scb_data->hscbs;
- temp += 0x1f;
- temp &= ~0x1f;
- p->scb_data->hscbs = (struct aic7xxx_hwscb *)temp;
- /* At least the control byte of each SCB needs to be 0. */
- memset(p->scb_data->hscbs, 0, array_size);
-
- /* Tell the sequencer where it can find the hardware SCB array. */
- hscb_physaddr = VIRT_TO_BUS(p->scb_data->hscbs);
+
+ hscb_physaddr = p->scb_data->hscbs_dma;
aic_outb(p, hscb_physaddr & 0xFF, HSCB_ADDR);
aic_outb(p, (hscb_physaddr >> 8) & 0xFF, HSCB_ADDR + 1);
aic_outb(p, (hscb_physaddr >> 16) & 0xFF, HSCB_ADDR + 2);
aic_outb(p, (hscb_physaddr >> 24) & 0xFF, HSCB_ADDR + 3);
/* Set up the fifo areas at the same time */
- hscb_physaddr = VIRT_TO_BUS(&p->untagged_scbs[0]);
+ p->untagged_scbs = pci_alloc_consistent(p->pdev, 3*256, &p->fifo_dma);
+ if (p->untagged_scbs == NULL)
+ {
+ printk("(scsi%d) Unable to allocate hardware FIFO arrays; "
+ "failing detection.\n", p->host_no);
+ p->irq = 0;
+ return(0);
+ }
+
+ p->qoutfifo = p->untagged_scbs + 256;
+ p->qinfifo = p->qoutfifo + 256;
+ for (i = 0; i < 256; i++)
+ {
+ p->untagged_scbs[i] = SCB_LIST_NULL;
+ p->qinfifo[i] = SCB_LIST_NULL;
+ p->qoutfifo[i] = SCB_LIST_NULL;
+ }
+
+ hscb_physaddr = p->fifo_dma;
aic_outb(p, hscb_physaddr & 0xFF, SCBID_ADDR);
aic_outb(p, (hscb_physaddr >> 8) & 0xFF, SCBID_ADDR + 1);
aic_outb(p, (hscb_physaddr >> 16) & 0xFF, SCBID_ADDR + 2);
p->next = first_aic7xxx;
first_aic7xxx = p;
- /*
- * Clear out any possible pending interrupts, again.
- */
- aic7xxx_clear_intstat(p);
-
/*
* Allocate the first set of scbs for this controller. This is to stream-
* line code elsewhere in the driver. If we have to check for the existence
printk(KERN_INFO "(scsi%d) Resetting channel%s\n", p->host_no, channel);
}
- /*
- * Some of the new Ultra2 chipsets need a longer delay after a chip
- * reset than just the init setup creates, so we have to delay here
- * before we go into a reset in order to make the chips happy.
- */
- if (p->features & AHC_ULTRA2)
- mdelay(250);
aic7xxx_reset_current_bus(p);
/*
- * Delay for the reset delay.
+ * Delay for the reset delay by setting the timer, this will delay
+ * future commands sent to any devices.
*/
- if (!reset_delay)
- aic7xxx_delay(AIC7XXX_RESET_DELAY);
+ p->flags |= AHC_RESET_DELAY;
+ for(i=0; i<MAX_TARGETS; i++)
+ {
+ p->dev_expires[i] = jiffies + (4 * HZ);
+ p->dev_timer_active |= (0x01 << i);
+ }
+ p->dev_timer.expires = p->dev_expires[p->scsi_id];
+ add_timer(&p->dev_timer);
+ p->dev_timer_active |= (0x01 << MAX_TARGETS);
}
else
{
"the no_reset\n", p->host_no);
printk(KERN_INFO "(scsi%d) option unless you have a verifiable need "
"for it.\n", p->host_no);
- printk(KERN_INFO "(scsi%d) The no_reset option is known to break some "
- "systems,\n", p->host_no);
- printk(KERN_INFO "(scsi%d) and is not supported by the driver author\n",
- p->host_no);
- aic7xxx_delay(AIC7XXX_RESET_DELAY);
}
}
{
printk(KERN_WARNING "(scsi%d) Couldn't register IRQ %d, ignoring "
"controller.\n", p->host_no, p->irq);
+ aic_outb(p, 0, SIMODE1);
+#ifdef MODULE
+ enable_irq(p->irq);
+#endif
p->irq = 0;
return (0);
}
+ if(aic_inb(p, INTSTAT) & INT_PEND)
+ printk(INFO_LEAD "spurious interrupt during configuration, cleared.\n",
+ p->host_no, -1, -1 , -1);
+ aic7xxx_clear_intstat(p);
+
+#ifdef MODULE
+ enable_irq(p->irq);
+#endif
+
unpause_sequencer(p, /* unpause_always */ TRUE);
return (found);
wait = 1000; /* 1 second (1000 * 1 msec) */
while (--wait && !(aic_inb(p, HCNTRL) & CHIPRSTACK))
{
- mdelay(1); /* 1 msec */
+ udelay(1); /* 1 msec */
}
pause_sequencer(p);
*/
if (p->scb_data != NULL)
{
+ struct aic7xxx_scb_dma *scb_dma = NULL;
if (p->scb_data->hscbs != NULL)
{
- kfree(p->scb_data->hscb_kmalloc_ptr);
+ pci_free_consistent(p->pdev, p->scb_data->hscbs_dma_len,
+ p->scb_data->hscbs, p->scb_data->hscbs_dma);
p->scb_data->hscbs = p->scb_data->hscb_kmalloc_ptr = NULL;
}
/*
*/
for (i = 0; i < p->scb_data->numscbs; i++)
{
+ if (p->scb_data->scb_array[i]->scb_dma != scb_dma)
+ {
+ scb_dma = p->scb_data->scb_array[i]->scb_dma;
+ pci_free_consistent(p->pdev, scb_dma->dma_len,
+ (void *)((unsigned long)scb_dma->dma_address
+ - scb_dma->dma_offset),
+ scb_dma->dma_address);
+ }
if (p->scb_data->scb_array[i]->kmalloc_ptr != NULL)
kfree(p->scb_data->scb_array[i]->kmalloc_ptr);
p->scb_data->scb_array[i] = NULL;
}
}
+ pci_free_consistent(p->pdev, 3*256, (void *)p->untagged_scbs, p->fifo_dma);
}
/*+F*************************************************************************
if (!have_seeprom)
{
p->sc_size = 128;
- have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
+ have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
scarray, p->sc_size, p->sc_type);
if (!have_seeprom)
{
if(p->sc_type == C46)
- have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
+ have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
scarray, p->sc_size, C56_66);
else
- have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
+ have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
scarray, p->sc_size, C46);
}
}
template->sg_tablesize = AIC7XXX_MAX_SG;
-#if defined(__i386__) || defined(__alpha__)
#ifdef CONFIG_PCI
/*
- * PCI-bus chipset probe.
+ * PCI-bus probe.
*/
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,92)
if (pci_present())
- {
- if (pci_find_device(PCI_VENDOR_ID_INTEL,
- PCI_DEVICE_ID_INTEL_82450GX,
- NULL))
- aic7xxx_no_probe = 1;
- if (pci_find_device(PCI_VENDOR_ID_INTEL,
- PCI_DEVICE_ID_INTEL_82451NX,
- NULL))
- aic7xxx_no_probe = 1;
- }
#else
-#define PCI_DEVICE_ID_INTEL_82451NX 0x84ca
if (pcibios_present())
+#endif
{
- unsigned char pci_bus, pci_devfn;
- if (!(pcibios_find_device(PCI_VENDOR_ID_INTEL,
- PCI_DEVICE_ID_INTEL_82450GX,
- 0, &pci_bus, &pci_devfn)) )
- aic7xxx_no_probe = 1;
- if (!(pcibios_find_device(PCI_VENDOR_ID_INTEL,
- PCI_DEVICE_ID_INTEL_82451NX,
- 0, &pci_bus, &pci_devfn)) )
- aic7xxx_no_probe = 1;
- }
-#endif /* LINUX_VERSION_CODE */
-#endif /* CONFIG_PCI */
- /*
- * EISA/VL-bus card signature probe.
- */
- slot = MINSLOT;
- while ( (slot <= MAXSLOT) &&
- !(aic7xxx_no_probe) )
- {
- base = SLOTBASE(slot) + MINREG;
-
- if (check_region(base, MAXREG - MINREG))
- {
- /*
- * Some other driver has staked a
- * claim to this i/o region already.
- */
- slot++;
- continue; /* back to the beginning of the for loop */
- }
- flags = 0;
- type = aic7xxx_probe(slot, base + AHC_HID0, &flags);
- if (type == -1)
- {
- slot++;
- continue;
- }
- temp_p = kmalloc(sizeof(struct aic7xxx_host), GFP_ATOMIC);
- if (temp_p == NULL)
- {
- printk(KERN_WARNING "aic7xxx: Unable to allocate device space.\n");
- slot++;
- continue; /* back to the beginning of the while loop */
- }
- /*
- * Pause the card preserving the IRQ type. Allow the operator
- * to override the IRQ trigger.
- */
- if (aic7xxx_irq_trigger == 1)
- hcntrl = IRQMS; /* Level */
- else if (aic7xxx_irq_trigger == 0)
- hcntrl = 0; /* Edge */
- else
- hcntrl = inb(base + HCNTRL) & IRQMS; /* Default */
- memset(temp_p, 0, sizeof(struct aic7xxx_host));
- temp_p->unpause = hcntrl | INTEN;
- temp_p->pause = hcntrl | PAUSE | INTEN;
- temp_p->base = base;
- temp_p->mbase = 0;
- temp_p->maddr = 0;
- temp_p->pci_bus = 0;
- temp_p->pci_device_fn = slot;
- aic_outb(temp_p, hcntrl | PAUSE, HCNTRL);
- while( (aic_inb(temp_p, HCNTRL) & PAUSE) == 0 ) ;
- if (aic7xxx_chip_reset(temp_p) == -1)
- temp_p->irq = 0;
- else
- temp_p->irq = aic_inb(temp_p, INTDEF) & 0x0F;
- temp_p->flags |= AHC_PAGESCBS;
-
- switch (temp_p->irq)
- {
- case 9:
- case 10:
- case 11:
- case 12:
- case 14:
- case 15:
- break;
-
- default:
- printk(KERN_WARNING "aic7xxx: Host adapter uses unsupported IRQ "
- "level %d, ignoring.\n", temp_p->irq);
- kfree(temp_p);
- slot++;
- continue; /* back to the beginning of the while loop */
- }
-
- /*
- * We are commited now, everything has been checked and this card
- * has been found, now we just set it up
- */
-
- /*
- * Insert our new struct into the list at the end
- */
- if (list_p == NULL)
- {
- list_p = current_p = temp_p;
- }
- else
- {
- current_p = list_p;
- while (current_p->next != NULL)
- current_p = current_p->next;
- current_p->next = temp_p;
- }
-
- switch (type)
- {
- case 0:
- temp_p->board_name_index = 2;
- if (aic7xxx_verbose & VERBOSE_PROBE2)
- printk("aic7xxx: <%s> at EISA %d\n",
- board_names[2], slot);
- /* FALLTHROUGH */
- case 1:
- {
- temp_p->chip = AHC_AIC7770 | AHC_EISA;
- temp_p->features |= AHC_AIC7770_FE;
- temp_p->bios_control = aic_inb(temp_p, HA_274_BIOSCTRL);
-
- /*
- * Get the primary channel information. Right now we don't
- * do anything with this, but someday we will be able to inform
- * the mid-level SCSI code which channel is primary.
- */
- if (temp_p->board_name_index == 0)
- {
- temp_p->board_name_index = 3;
- if (aic7xxx_verbose & VERBOSE_PROBE2)
- printk("aic7xxx: <%s> at EISA %d\n",
- board_names[3], slot);
- }
- if (temp_p->bios_control & CHANNEL_B_PRIMARY)
- {
- temp_p->flags |= AHC_CHANNEL_B_PRIMARY;
- }
-
- if ((temp_p->bios_control & BIOSMODE) == BIOSDISABLED)
- {
- temp_p->flags &= ~AHC_BIOS_ENABLED;
- }
- else
- {
- temp_p->flags &= ~AHC_USEDEFAULTS;
- temp_p->flags |= AHC_BIOS_ENABLED;
- if ( (temp_p->bios_control & 0x20) == 0 )
- {
- temp_p->bios_address = 0xcc000;
- temp_p->bios_address += (0x4000 * (temp_p->bios_control & 0x07));
- }
- else
- {
- temp_p->bios_address = 0xd0000;
- temp_p->bios_address += (0x8000 * (temp_p->bios_control & 0x06));
- }
- }
- temp_p->adapter_control = aic_inb(temp_p, SCSICONF) << 8;
- temp_p->adapter_control |= aic_inb(temp_p, SCSICONF + 1);
- if (temp_p->features & AHC_WIDE)
- {
- temp_p->scsi_id = temp_p->adapter_control & HWSCSIID;
- temp_p->scsi_id_b = temp_p->scsi_id;
- }
- else
- {
- temp_p->scsi_id = (temp_p->adapter_control >> 8) & HSCSIID;
- temp_p->scsi_id_b = temp_p->adapter_control & HSCSIID;
- }
- aic7xxx_load_seeprom(temp_p, &sxfrctl1);
- break;
- }
-
- case 2:
- case 3:
- temp_p->chip = AHC_AIC7770 | AHC_VL;
- temp_p->features |= AHC_AIC7770_FE;
- if (type == 2)
- temp_p->flags |= AHC_BIOS_ENABLED;
- else
- temp_p->flags &= ~AHC_BIOS_ENABLED;
- if (aic_inb(temp_p, SCSICONF) & TERM_ENB)
- sxfrctl1 = STPWEN;
- aic7xxx_load_seeprom(temp_p, &sxfrctl1);
- temp_p->board_name_index = 4;
- if (aic7xxx_verbose & VERBOSE_PROBE2)
- printk("aic7xxx: <%s> at VLB %d\n",
- board_names[2], slot);
- switch( aic_inb(temp_p, STATUS_2840) & BIOS_SEL )
- {
- case 0x00:
- temp_p->bios_address = 0xe0000;
- break;
- case 0x20:
- temp_p->bios_address = 0xc8000;
- break;
- case 0x40:
- temp_p->bios_address = 0xd0000;
- break;
- case 0x60:
- temp_p->bios_address = 0xd8000;
- break;
- default:
- break; /* can't get here */
- }
- break;
-
- default: /* Won't get here. */
- break;
- }
- if (aic7xxx_verbose & VERBOSE_PROBE2)
- {
- printk(KERN_INFO "aic7xxx: BIOS %sabled, IO Port 0x%lx, IRQ %d (%s)\n",
- (temp_p->flags & AHC_USEDEFAULTS) ? "dis" : "en", temp_p->base,
- temp_p->irq,
- (temp_p->pause & IRQMS) ? "level sensitive" : "edge triggered");
- printk(KERN_INFO "aic7xxx: Extended translation %sabled.\n",
- (temp_p->flags & AHC_EXTEND_TRANS_A) ? "en" : "dis");
- }
-
- /*
- * Set the FIFO threshold and the bus off time.
- */
- hostconf = aic_inb(temp_p, HOSTCONF);
- aic_outb(temp_p, hostconf & DFTHRSH, BUSSPD);
- aic_outb(temp_p, (hostconf << 2) & BOFF, BUSTIME);
- slot++;
- found++;
- }
-
-#endif /* defined(__i386__) || defined(__alpha__) */
-
-#ifdef CONFIG_PCI
- /*
- * PCI-bus probe.
- */
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,92)
- if (pci_present())
-#else
- if (pcibios_present())
-#endif
- {
- struct
+ struct
{
unsigned short vendor_id;
unsigned short device_id;
AHC_AIC7896_FE, 25,
32, C56_66 },
{PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_1480A, AHC_AIC7860,
- AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
+ AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_NO_STPWR,
AHC_AIC7860_FE, 26,
32, C46 },
{PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892A, AHC_AIC7892,
if (aic7xxx_verbose & VERBOSE_PROBE2)
printk("aic7xxx: <%s> at PCI %d/%d\n",
board_names[aic_pdevs[i].board_name_index],
- PCI_SLOT(temp_p->pdev->devfn),
- PCI_FUNC(temp_p->pdev->devfn));
+ PCI_SLOT(pdev->devfn),
+ PCI_FUNC(pdev->devfn));
pci_read_config_word(pdev, PCI_COMMAND, &command);
if (aic7xxx_verbose & VERBOSE_PROBE2)
{
if ( temp_p == NULL )
continue;
if (aic7xxx_verbose & VERBOSE_PROBE2)
- printk("aic7xxx: <%s> at PCI %d/%d\n",
+ printk("aic7xxx: <%s> at PCI %d/%d/%d\n",
board_names[aic_pdevs[i].board_name_index],
+ temp_p->pci_bus,
PCI_SLOT(temp_p->pci_device_fn),
PCI_FUNC(temp_p->pci_device_fn));
pcibios_read_config_word(pci_bus, pci_devfn, PCI_COMMAND, &command);
#endif /* AIC7XXX_STRICT_PCI_SETUP */
#endif /* LINUX_VERSION_CODE > KERNEL_VERSION(2,1,92) */
+ if(check_region(temp_p->base, MAXREG - MINREG))
+ {
+ printk("aic7xxx: <%s> at PCI %d/%d/%d\n",
+ board_names[aic_pdevs[i].board_name_index],
+ temp_p->pci_bus,
+ PCI_SLOT(temp_p->pci_device_fn),
+ PCI_FUNC(temp_p->pci_device_fn));
+ printk("aic7xxx: I/O ports already in use, ignoring.\n");
+ kfree(temp_p);
+ temp_p = NULL;
+ continue;
+ }
+
temp_p->unpause = INTEN;
temp_p->pause = temp_p->unpause | PAUSE;
if ( ((temp_p->base == 0) &&
(temp_p->mbase == 0)) ||
(temp_p->irq == 0) )
{
- printk("aic7xxx: <%s> at PCI %d/%d\n",
+ printk("aic7xxx: <%s> at PCI %d/%d/%d\n",
board_names[aic_pdevs[i].board_name_index],
+ temp_p->pci_bus,
PCI_SLOT(temp_p->pci_device_fn),
PCI_FUNC(temp_p->pci_device_fn));
printk("aic7xxx: Controller disabled by BIOS, ignoring.\n");
/*
* OK.....we failed our test....go back to programmed I/O
*/
- printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d\n",
+ printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n",
board_names[aic_pdevs[i].board_name_index],
+ temp_p->pci_bus,
PCI_SLOT(temp_p->pci_device_fn),
PCI_FUNC(temp_p->pci_device_fn));
printk(KERN_INFO "aic7xxx: MMAPed I/O failed, reverting to "
}
#endif
+ /*
+ * Lock out other contenders for our i/o space.
+ */
+ request_region(temp_p->base, MAXREG - MINREG, "aic7xxx");
+
/*
* We HAVE to make sure the first pause_sequencer() and all other
* subsequent I/O that isn't PCI config space I/O takes place
/*
* Get current termination setting
*/
- sxfrctl1 = aic_inb(temp_p, SXFRCTL1) & STPWEN;
+ sxfrctl1 = aic_inb(temp_p, SXFRCTL1);
if (aic7xxx_chip_reset(temp_p) == -1)
{
+ release_region(temp_p->base, MAXREG - MINREG);
kfree(temp_p);
temp_p = NULL;
continue;
}
+ /*
+ * Very quickly put the term setting back into the register since
+ * the chip reset may cause odd things to happen. This is to keep
+ * LVD busses with lots of drives from draining the power out of
+ * the diffsense line before we get around to running the
+ * configure_termination() function. Also restore the STPWLEVEL
+ * bit of DEVCONFIG
+ */
+ aic_outb(temp_p, sxfrctl1, SXFRCTL1);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,92)
+ pcibios_write_config_dword(temp_p->pci_bus, temp_p->pci_device_fn,
+ DEVCONFIG, devconfig);
+#else
+ pci_write_config_dword(temp_p->pdev, DEVCONFIG, devconfig);
+#endif
+ sxfrctl1 &= STPWEN;
/*
* We need to set the CHNL? assignments before loading the SEEPROM
case AHC_AIC7896: /* 7896/7 */
case AHC_AIC7899: /* 7899 */
#if LINUX_VERSION_CODE > KERNEL_VERSION(2,1,92)
- if (PCI_FUNC(temp_p->pdev->devfn) != 0)
+ if (PCI_FUNC(pdev->devfn) != 0)
{
temp_p->flags |= AHC_CHNLB;
}
}
else if (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2)
{
- printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d\n",
+ printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n",
board_names[aic_pdevs[i].board_name_index],
+ temp_p->pci_bus,
PCI_SLOT(temp_p->pci_device_fn),
PCI_FUNC(temp_p->pci_device_fn));
printk("aic7xxx: external SCB RAM detected, "
}
else if (devconfig & RAMPSM)
{
- printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d\n",
+ printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n",
board_names[aic_pdevs[i].board_name_index],
+ temp_p->pci_bus,
PCI_SLOT(temp_p->pci_device_fn),
PCI_FUNC(temp_p->pci_device_fn));
printk("aic7xxx: external SCB RAM detected, "
} /* for PCI_DEVICES */
} /* PCI BIOS present */
#endif CONFIG_PCI
+
+#if defined(__i386__) || defined(__alpha__)
+ /*
+ * EISA/VL-bus card signature probe.
+ */
+ slot = MINSLOT;
+ while ( (slot <= MAXSLOT) &&
+ !(aic7xxx_no_probe) )
+ {
+ base = SLOTBASE(slot) + MINREG;
+
+ if (check_region(base, MAXREG - MINREG))
+ {
+ /*
+ * Some other driver has staked a
+ * claim to this i/o region already.
+ */
+ slot++;
+ continue; /* back to the beginning of the for loop */
+ }
+ flags = 0;
+ type = aic7xxx_probe(slot, base + AHC_HID0, &flags);
+ if (type == -1)
+ {
+ slot++;
+ continue;
+ }
+ temp_p = kmalloc(sizeof(struct aic7xxx_host), GFP_ATOMIC);
+ if (temp_p == NULL)
+ {
+ printk(KERN_WARNING "aic7xxx: Unable to allocate device space.\n");
+ slot++;
+ continue; /* back to the beginning of the while loop */
+ }
+ /*
+ * Lock out other contenders for our i/o space.
+ */
+ request_region(base, MAXREG - MINREG, "aic7xxx");
+
+ /*
+ * Pause the card preserving the IRQ type. Allow the operator
+ * to override the IRQ trigger.
+ */
+ if (aic7xxx_irq_trigger == 1)
+ hcntrl = IRQMS; /* Level */
+ else if (aic7xxx_irq_trigger == 0)
+ hcntrl = 0; /* Edge */
+ else
+ hcntrl = inb(base + HCNTRL) & IRQMS; /* Default */
+ memset(temp_p, 0, sizeof(struct aic7xxx_host));
+ temp_p->unpause = hcntrl | INTEN;
+ temp_p->pause = hcntrl | PAUSE | INTEN;
+ temp_p->base = base;
+ temp_p->mbase = 0;
+ temp_p->maddr = 0;
+ temp_p->pci_bus = 0;
+ temp_p->pci_device_fn = slot;
+ aic_outb(temp_p, hcntrl | PAUSE, HCNTRL);
+ while( (aic_inb(temp_p, HCNTRL) & PAUSE) == 0 ) ;
+ if (aic7xxx_chip_reset(temp_p) == -1)
+ temp_p->irq = 0;
+ else
+ temp_p->irq = aic_inb(temp_p, INTDEF) & 0x0F;
+ temp_p->flags |= AHC_PAGESCBS;
+
+ switch (temp_p->irq)
+ {
+ case 9:
+ case 10:
+ case 11:
+ case 12:
+ case 14:
+ case 15:
+ break;
+
+ default:
+ printk(KERN_WARNING "aic7xxx: Host adapter uses unsupported IRQ "
+ "level %d, ignoring.\n", temp_p->irq);
+ kfree(temp_p);
+ release_region(base, MAXREG - MINREG);
+ slot++;
+ continue; /* back to the beginning of the while loop */
+ }
+
+ /*
+ * We are commited now, everything has been checked and this card
+ * has been found, now we just set it up
+ */
+
+ /*
+ * Insert our new struct into the list at the end
+ */
+ if (list_p == NULL)
+ {
+ list_p = current_p = temp_p;
+ }
+ else
+ {
+ current_p = list_p;
+ while (current_p->next != NULL)
+ current_p = current_p->next;
+ current_p->next = temp_p;
+ }
+
+ switch (type)
+ {
+ case 0:
+ temp_p->board_name_index = 2;
+ if (aic7xxx_verbose & VERBOSE_PROBE2)
+ printk("aic7xxx: <%s> at EISA %d\n",
+ board_names[2], slot);
+ /* FALLTHROUGH */
+ case 1:
+ {
+ temp_p->chip = AHC_AIC7770 | AHC_EISA;
+ temp_p->features |= AHC_AIC7770_FE;
+ temp_p->bios_control = aic_inb(temp_p, HA_274_BIOSCTRL);
+
+ /*
+ * Get the primary channel information. Right now we don't
+ * do anything with this, but someday we will be able to inform
+ * the mid-level SCSI code which channel is primary.
+ */
+ if (temp_p->board_name_index == 0)
+ {
+ temp_p->board_name_index = 3;
+ if (aic7xxx_verbose & VERBOSE_PROBE2)
+ printk("aic7xxx: <%s> at EISA %d\n",
+ board_names[3], slot);
+ }
+ if (temp_p->bios_control & CHANNEL_B_PRIMARY)
+ {
+ temp_p->flags |= AHC_CHANNEL_B_PRIMARY;
+ }
+
+ if ((temp_p->bios_control & BIOSMODE) == BIOSDISABLED)
+ {
+ temp_p->flags &= ~AHC_BIOS_ENABLED;
+ }
+ else
+ {
+ temp_p->flags &= ~AHC_USEDEFAULTS;
+ temp_p->flags |= AHC_BIOS_ENABLED;
+ if ( (temp_p->bios_control & 0x20) == 0 )
+ {
+ temp_p->bios_address = 0xcc000;
+ temp_p->bios_address += (0x4000 * (temp_p->bios_control & 0x07));
+ }
+ else
+ {
+ temp_p->bios_address = 0xd0000;
+ temp_p->bios_address += (0x8000 * (temp_p->bios_control & 0x06));
+ }
+ }
+ temp_p->adapter_control = aic_inb(temp_p, SCSICONF) << 8;
+ temp_p->adapter_control |= aic_inb(temp_p, SCSICONF + 1);
+ if (temp_p->features & AHC_WIDE)
+ {
+ temp_p->scsi_id = temp_p->adapter_control & HWSCSIID;
+ temp_p->scsi_id_b = temp_p->scsi_id;
+ }
+ else
+ {
+ temp_p->scsi_id = (temp_p->adapter_control >> 8) & HSCSIID;
+ temp_p->scsi_id_b = temp_p->adapter_control & HSCSIID;
+ }
+ aic7xxx_load_seeprom(temp_p, &sxfrctl1);
+ break;
+ }
+
+ case 2:
+ case 3:
+ temp_p->chip = AHC_AIC7770 | AHC_VL;
+ temp_p->features |= AHC_AIC7770_FE;
+ if (type == 2)
+ temp_p->flags |= AHC_BIOS_ENABLED;
+ else
+ temp_p->flags &= ~AHC_BIOS_ENABLED;
+ if (aic_inb(temp_p, SCSICONF) & TERM_ENB)
+ sxfrctl1 = STPWEN;
+ aic7xxx_load_seeprom(temp_p, &sxfrctl1);
+ temp_p->board_name_index = 4;
+ if (aic7xxx_verbose & VERBOSE_PROBE2)
+ printk("aic7xxx: <%s> at VLB %d\n",
+ board_names[2], slot);
+ switch( aic_inb(temp_p, STATUS_2840) & BIOS_SEL )
+ {
+ case 0x00:
+ temp_p->bios_address = 0xe0000;
+ break;
+ case 0x20:
+ temp_p->bios_address = 0xc8000;
+ break;
+ case 0x40:
+ temp_p->bios_address = 0xd0000;
+ break;
+ case 0x60:
+ temp_p->bios_address = 0xd8000;
+ break;
+ default:
+ break; /* can't get here */
+ }
+ break;
+
+ default: /* Won't get here. */
+ break;
+ }
+ if (aic7xxx_verbose & VERBOSE_PROBE2)
+ {
+ printk(KERN_INFO "aic7xxx: BIOS %sabled, IO Port 0x%lx, IRQ %d (%s)\n",
+ (temp_p->flags & AHC_USEDEFAULTS) ? "dis" : "en", temp_p->base,
+ temp_p->irq,
+ (temp_p->pause & IRQMS) ? "level sensitive" : "edge triggered");
+ printk(KERN_INFO "aic7xxx: Extended translation %sabled.\n",
+ (temp_p->flags & AHC_EXTEND_TRANS_A) ? "en" : "dis");
+ }
+
+ /*
+ * Set the FIFO threshold and the bus off time.
+ */
+ hostconf = aic_inb(temp_p, HOSTCONF);
+ aic_outb(temp_p, hostconf & DFTHRSH, BUSSPD);
+ aic_outb(temp_p, (hostconf << 2) & BOFF, BUSTIME);
+ slot++;
+ found++;
+ }
+
+#endif /* defined(__i386__) || defined(__alpha__) */
+
/*
* Now, we re-order the probed devices by BIOS address and BUS class.
* In general, we follow this algorithm to make the adapters show up
* instead of slowing down if those exist. That's hard to do with simple
* checksums though.
*/
- if(aic7xxx_verbose & VERBOSE_NEGOTIATION)
+ if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
{
printk(INFO_LEAD "reducing SCSI transfer speed due to Domain "
"validation failure.\n", p->host_no, CTL_OF_CMD(cmd));
}
else
{
- if(aic7xxx_verbose & VERBOSE_NEGOTIATION)
+ if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
{
printk(INFO_LEAD "Performing Domain validation.\n",
p->host_no, CTL_OF_CMD(cmd));
}
else
{
- if( (aic7xxx_verbose & VERBOSE_NEGOTIATION) &&
+ if( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
(p->needdv & (1<<tindex)) )
{
printk(INFO_LEAD "Successfully completed Domain validation.\n",
* little-endian format.
*/
hscb->SCSI_cmd_length = cmd->cmd_len;
- hscb->SCSI_cmd_pointer = cpu_to_le32(VIRT_TO_BUS(cmd->cmnd));
+ memcpy(scb->cmnd, cmd->cmnd, cmd->cmd_len);
+ hscb->SCSI_cmd_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, scb->cmnd));
if (cmd->use_sg)
{
* differences and the kernel SG list uses virtual addresses where
* we need physical addresses.
*/
- int i;
+ int i, use_sg;
sg = (struct scatterlist *)cmd->request_buffer;
scb->sg_length = 0;
+ use_sg = pci_map_sg(p->pdev, sg, cmd->use_sg);
/*
* Copy the segments into the SG array. NOTE!!! - We used to
* have the first entry both in the data_pointer area and the first
* entry in both places, but now we download the address of
* scb->sg_list[1] instead of 0 to the sg pointer in the hscb.
*/
- for (i = 0; i < cmd->use_sg; i++)
+ for (i = 0; i < use_sg; i++)
{
- scb->sg_list[i].address = cpu_to_le32(VIRT_TO_BUS(sg[i].address));
- scb->sg_list[i].length = cpu_to_le32(sg[i].length);
- scb->sg_length += sg[i].length;
+ unsigned int len = sg_dma_len(sg+i);
+ scb->sg_list[i].address = cpu_to_le32(sg_dma_address(sg+i));
+ scb->sg_list[i].length = cpu_to_le32(len);
+ scb->sg_length += len;
}
/* Copy the first SG into the data pointer area. */
hscb->data_pointer = scb->sg_list[0].address;
hscb->data_count = scb->sg_list[0].length;
- scb->sg_count = cmd->use_sg;
- hscb->SG_segment_count = cmd->use_sg;
- hscb->SG_list_pointer = cpu_to_le32(VIRT_TO_BUS(&scb->sg_list[1]));
+ scb->sg_count = i;
+ hscb->SG_segment_count = i;
+ hscb->SG_list_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, &scb->sg_list[1]));
}
else
{
if (cmd->request_bufflen)
{
- scb->sg_count = 1;
- scb->sg_list[0].address = cpu_to_le32(VIRT_TO_BUS(cmd->request_buffer));
+ unsigned int address = pci_map_single(p->pdev, cmd->request_buffer,
+ cmd->request_bufflen);
+ scb->sg_list[0].address = cpu_to_le32(address);
scb->sg_list[0].length = cpu_to_le32(cmd->request_bufflen);
+ scb->sg_count = 1;
scb->sg_length = cmd->request_bufflen;
hscb->SG_segment_count = 1;
- hscb->SG_list_pointer = cpu_to_le32(VIRT_TO_BUS(&scb->sg_list[0]));
+ hscb->SG_list_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, &scb->sg_list[0]));
hscb->data_count = scb->sg_list[0].length;
hscb->data_pointer = scb->sg_list[0].address;
}
break;
case AHC_PCI:
default:
- printk("PCI %d/%d.\n", PCI_SLOT(p->pci_device_fn),
+ printk("PCI %d/%d/%d.\n", p->pci_bus, PCI_SLOT(p->pci_device_fn),
PCI_FUNC(p->pci_device_fn));
break;
}
mask NO_IDENT 0x20|SEQINT /* no IDENTIFY after reconnect*/
mask NO_MATCH 0x30|SEQINT /* no cmd match for reconnect */
mask EXTENDED_MSG 0x40|SEQINT /* Extended message received */
- mask ABORT_REQUESTED 0x50|SEQINT /* Reconect of aborted SCB */
+ mask WIDE_RESIDUE 0x50|SEQINT /* need kernel to back up */
+ /* the SG array for us */
mask REJECT_MSG 0x60|SEQINT /* Reject message received */
mask BAD_STATUS 0x70|SEQINT /* Bad status from target */
mask RESIDUAL 0x80|SEQINT /* Residual byte count != 0 */
}
data_phase_inbounds:
/* If we are the last SG block, tell the hardware. */
-if ((p->features & AHC_ULTRA2) == 0) {
cmp SG_COUNT,0x01 jne data_phase_wideodd;
- and DMAPARAMS, ~WIDEODD;
-}
+ if ((p->features & AHC_ULTRA2) == 0) {
+ and DMAPARAMS, ~WIDEODD;
+ } else {
+ mvi SG_CACHEPTR, LAST_SEG;
+ }
data_phase_wideodd:
if ((p->features & AHC_ULTRA2) != 0) {
mov SINDEX, ALLONES;
test SSTAT0, SDONE jnz data_phase_dma_done;
test SSTAT1,PHASEMIS jz data_phase_dma_loop; /* ie. underrun */
data_phase_dma_phasemis:
- test SSTAT0,SDONE jnz . + 2;
+ test SSTAT0,SDONE jnz data_phase_dma_done;
clr SINDEX; /* Remember the phasemiss */
} else {
mov DMAPARAMS call dma;
test SSTAT1, REQINIT jz .;
test SSTAT1,PHASEMIS jz data_phase_loop;
+/* This drops the last SG segment down to the shadow layer for us */
if ((p->features & AHC_ULTRA2) != 0) {
mov DFCNTRL, DMAPARAMS;
- test SSTAT0, SDONE jnz .;
+ test SSTAT0, SDONE jnz .;
}
data_phase_finish:
mvi DFCNTRL, (PRELOADEN|SCSIEN|HDMAEN|DIRECTION);
test SSTAT0, SDONE jnz .;
p_command_dma_loop:
- test SSTAT0, DMADONE jnz p_command_ultra2_dma_done;
+ test SSTAT0, SDONE jnz p_command_ultra2_dma_done;
test SSTAT1,PHASEMIS jz p_command_dma_loop; /* ie. underrun */
p_command_ultra2_dma_done:
and DFCNTRL, ~HDMAEN;
cmp A,MSG_EXTENDED je mesgin_extended;
cmp A,MSG_MESSAGE_REJECT je mesgin_reject;
cmp A,MSG_NOOP je mesgin_done;
+ cmp A,MSG_IGN_WIDE_RESIDUE je mesgin_wide_residue;
rej_mesgin:
/*
mvi INTSTAT, REJECT_MSG;
jmp mesgin_done;
+/*
+ * Wide Residue. We handle the simple cases, but pass of the one hard case
+ * to the kernel (when the residue byte happened to cause us to advance our
+ * sg element array, so we know have to back that advance out).
+ */
+mesgin_wide_residue:
+ mvi ARG_1 call inb_next; /* ACK the wide_residue and get */
+ /* the size byte */
+/*
+ * See if we'll ignore this wide residue (because it's an overrun byte)
+ */
+ if ((p->features & AHC_ULTRA2) != 0) {
+ test SSTAT2, WIDE_RES jnz mesgin_done;
+ } else {
+ test SCB_RESID_SGCNT,0xff jnz wide_residue_int;
+ test SCB_RESID_DCNT[0],0xff jnz wide_residue_int;
+ test SCB_RESID_DCNT[1],0xff jnz wide_residue_int;
+ test SCB_RESID_DCNT[2],0xff jnz wide_residue_int;
+ jmp mesgin_done;
+ }
+wide_residue_int:
+/*
+ * In order for this to be reliable, we have to do all sorts of horrible
+ * magic in terms of resetting the datafifo and reloading the shadow layer
+ * with the correct new values (so that a subsequent save data pointers
+ * message will do the right thing). We let the kernel do that work.
+ */
+ mvi INTSTAT,WIDE_RESIDUE;
+ jmp mesgin_done;
+
/*
* [ ADD MORE MESSAGE HANDLING HERE ]
*/
* before continuing.
*/
test SSTAT1, REQINIT jz inb_next_wait;
- test SSTAT1, SCSIPERR jnz inb_next_wait;
+ test SSTAT1, SCSIPERR jnz .;
and LASTPHASE, PHASE_MASK, SCSISIGI;
cmp LASTPHASE, P_MESGIN jne mesgin_phasemis;
inb_first:
size += sprintf(BLS, " SCSI Adapter: %s\n",
board_names[p->board_name_index]);
if (p->flags & AHC_TWIN)
- size += sprintf(BLS, " Twin Channel\n");
+ size += sprintf(BLS, " Twin Channel Controller ");
else
{
char *channel = "";
ultra = "Ultra-2 LVD/SE ";
else if (p->features & AHC_ULTRA)
ultra = "Ultra ";
- size += sprintf(BLS, " %s%sController%s\n",
+ size += sprintf(BLS, " %s%sController%s ",
ultra, wide, channel);
}
+ switch(p->chip & ~AHC_CHIPID_MASK)
+ {
+ case AHC_VL:
+ size += sprintf(BLS, "at VLB slot %d\n", p->pci_device_fn);
+ break;
+ case AHC_EISA:
+ size += sprintf(BLS, "at EISA slot %d\n", p->pci_device_fn);
+ break;
+ default:
+ size += sprintf(BLS, "at PCI %d/%d/%d\n", p->pci_bus,
+ PCI_SLOT(p->pci_device_fn), PCI_FUNC(p->pci_device_fn));
+ break;
+ }
if( !(p->maddr) )
{
size += sprintf(BLS, " Programmed I/O Base: %lx\n", p->base);
{
size += sprintf(BLS, " BIOS Memory Address: 0x%08x\n", p->bios_address);
}
- if( p->chip & AHC_PCI )
- {
- size += sprintf(BLS, " PCI Bus 0x%02x Device 0x%02x\n", p->pci_bus,
- p->pci_device_fn);
- }
size += sprintf(BLS, " Adapter SEEPROM Config: %s\n",
(p->flags & AHC_SEEPROM_FOUND) ? "SEEPROM found and used." :
((p->flags & AHC_USEDEFAULTS) ? "SEEPROM not found, using defaults." :
#define BRDRW 0x04
#define BRDRW_ULTRA2 0x02
#define BRDCTL1 0x02
-#define BRDSTB_ULTRA2 0x01
#define BRDCTL0 0x01
+#define BRDSTB_ULTRA2 0x01
#define SEECTL 0x1e
#define EXTARBACK 0x80
#define RESIDUAL 0x81
#define BAD_STATUS 0x71
#define REJECT_MSG 0x61
-#define ABORT_REQUESTED 0x51
+#define WIDE_RESIDUE 0x51
#define EXTENDED_MSG 0x41
#define NO_MATCH 0x31
#define NO_IDENT 0x21
#define TARGCRCENDEN 0x08
#define TARGCRCCNTEN 0x04
+#define QOUTCNT 0x9e
+
#define SCSIPHASE 0x9e
#define SP_STATUS 0x20
#define SP_COMMAND 0x10
#define SP_DATA_IN 0x02
#define SP_DATA_OUT 0x01
-#define QOUTCNT 0x9e
-
#define SFUNCT 0x9f
#define ALT_MODE 0x80
#define RD_DFTHRSH_63 0x03
#define RD_DFTHRSH_50 0x02
#define RD_DFTHRSH_25 0x01
-#define WR_DFTHRSH_MIN 0x00
#define RD_DFTHRSH_MIN 0x00
+#define WR_DFTHRSH_MIN 0x00
#define SG_CACHEPTR 0xfc
#define SG_USER_DATA 0xfc
#define LAST_SEG_DONE 0x01
+#define CMD_GROUP_CODE_SHIFT 0x05
+#define BUS_8_BIT 0x00
+#define QOUTFIFO_OFFSET 0x01
+#define CCSGRAM_MAXSEGS 0x10
#define CMD_GROUP2_BYTE_DELTA 0xfa
#define MAX_OFFSET_8BIT 0x0f
#define BUS_16_BIT 0x01
#define QINFIFO_OFFSET 0x02
#define CMD_GROUP5_BYTE_DELTA 0x0b
-#define CMD_GROUP_CODE_SHIFT 0x05
#define MAX_OFFSET_ULTRA2 0x7f
#define MAX_OFFSET_16BIT 0x08
-#define BUS_8_BIT 0x00
-#define QOUTFIFO_OFFSET 0x01
#define UNTAGGEDSCB_OFFSET 0x00
-#define CCSGRAM_MAXSEGS 0x10
#define SCB_LIST_NULL 0xff
#define SG_SIZEOF 0x08
#define CMD_GROUP4_BYTE_DELTA 0x04
0x00, 0x4d, 0x12, 0x70,
0x01, 0x4e, 0x9c, 0x18,
0xbf, 0x60, 0xc0, 0x08,
- 0x00, 0x6a, 0xa8, 0x5c,
+ 0x00, 0x6a, 0xbe, 0x5c,
0xff, 0x4e, 0xc8, 0x18,
- 0x02, 0x6a, 0xbe, 0x5b,
+ 0x02, 0x6a, 0xd4, 0x5b,
0xff, 0x52, 0x20, 0x09,
0x0d, 0x6a, 0x6a, 0x00,
- 0x00, 0x52, 0x34, 0x5c,
+ 0x00, 0x52, 0x4a, 0x5c,
0x03, 0xb0, 0x52, 0x31,
0xff, 0xb0, 0x52, 0x09,
0xff, 0xb1, 0x54, 0x09,
0x10, 0x03, 0xfc, 0x78,
0xff, 0x50, 0xc8, 0x08,
0x88, 0x6a, 0xcc, 0x00,
- 0x49, 0x6a, 0x24, 0x5c,
+ 0x49, 0x6a, 0x3a, 0x5c,
0x01, 0x6a, 0x26, 0x01,
0xff, 0x6a, 0xca, 0x08,
0x08, 0x01, 0x02, 0x00,
0xff, 0x65, 0xca, 0x18,
0xff, 0x65, 0xd8, 0x68,
0x0a, 0x93, 0x26, 0x01,
- 0x00, 0x65, 0x9a, 0x5c,
+ 0x00, 0x65, 0xb0, 0x5c,
0x40, 0x51, 0xf0, 0x78,
0xe4, 0x6a, 0x06, 0x00,
0x08, 0x01, 0x02, 0x00,
- 0x04, 0x6a, 0x56, 0x5b,
+ 0x04, 0x6a, 0x6c, 0x5b,
0x01, 0x50, 0xa0, 0x18,
0x00, 0x50, 0xf6, 0xe0,
0xff, 0x6a, 0xa0, 0x08,
0x08, 0x6a, 0x66, 0x58,
0x80, 0x6a, 0x68, 0x00,
0x80, 0x36, 0x6c, 0x00,
- 0x00, 0x65, 0x08, 0x5c,
+ 0x00, 0x65, 0x1e, 0x5c,
0xff, 0x3d, 0xc8, 0x08,
0xbf, 0x64, 0x5a, 0x79,
- 0x80, 0x64, 0x20, 0x72,
- 0xa0, 0x64, 0x50, 0x72,
- 0xc0, 0x64, 0x48, 0x72,
- 0xe0, 0x64, 0x90, 0x72,
+ 0x80, 0x64, 0x22, 0x72,
+ 0xa0, 0x64, 0x52, 0x72,
+ 0xc0, 0x64, 0x4a, 0x72,
+ 0xe0, 0x64, 0x92, 0x72,
0x01, 0x6a, 0x22, 0x01,
0x00, 0x65, 0x22, 0x41,
0xf7, 0x11, 0x22, 0x08,
0x03, 0xa9, 0x18, 0x31,
0x03, 0xa9, 0x10, 0x30,
0x08, 0x6a, 0xcc, 0x00,
- 0xa9, 0x6a, 0x1e, 0x5c,
+ 0xa9, 0x6a, 0x34, 0x5c,
0x00, 0x65, 0x7a, 0x41,
0xa8, 0x6a, 0x6a, 0x00,
0x79, 0x6a, 0x6a, 0x00,
0x40, 0x3d, 0x62, 0x69,
0x04, 0x35, 0x6a, 0x00,
- 0x00, 0x65, 0x78, 0x5b,
+ 0x00, 0x65, 0x8e, 0x5b,
0x80, 0x6a, 0xd4, 0x01,
0x10, 0x36, 0x4e, 0x69,
0x10, 0x36, 0x6c, 0x00,
0x03, 0x8c, 0x10, 0x30,
0x05, 0xa3, 0x70, 0x30,
0x88, 0x6a, 0xcc, 0x00,
- 0xac, 0x6a, 0x16, 0x5c,
- 0x00, 0x65, 0x10, 0x5c,
+ 0xac, 0x6a, 0x2c, 0x5c,
+ 0x00, 0x65, 0x26, 0x5c,
0x38, 0x6a, 0xcc, 0x00,
- 0xa3, 0x6a, 0x1a, 0x5c,
+ 0xa3, 0x6a, 0x30, 0x5c,
0xff, 0x38, 0x8a, 0x69,
0x80, 0x02, 0x04, 0x00,
0xe7, 0x35, 0x6a, 0x08,
0xff, 0x6a, 0x10, 0x00,
0xff, 0x6a, 0x12, 0x00,
0xff, 0x6a, 0x14, 0x00,
- 0x01, 0x38, 0x8e, 0x61,
+ 0x01, 0x38, 0x90, 0x61,
0xbf, 0x35, 0x6a, 0x08,
+ 0x02, 0x6a, 0xf8, 0x01,
0xff, 0x69, 0xca, 0x08,
0xff, 0x35, 0x26, 0x09,
- 0x04, 0x0b, 0x92, 0x69,
- 0x04, 0x0b, 0x9e, 0x69,
- 0x10, 0x0c, 0x94, 0x79,
- 0x04, 0x0b, 0x9c, 0x69,
+ 0x04, 0x0b, 0x94, 0x69,
+ 0x04, 0x0b, 0xa0, 0x69,
+ 0x10, 0x0c, 0x96, 0x79,
+ 0x04, 0x0b, 0xa0, 0x69,
0xff, 0x6a, 0xca, 0x08,
- 0x00, 0x35, 0x60, 0x5b,
- 0x80, 0x02, 0xf2, 0x69,
- 0xff, 0x65, 0xe2, 0x79,
+ 0x00, 0x35, 0x76, 0x5b,
+ 0x80, 0x02, 0xf4, 0x69,
+ 0xff, 0x65, 0xe4, 0x79,
0xff, 0x38, 0x70, 0x18,
- 0xff, 0x38, 0xe2, 0x79,
- 0x80, 0xea, 0xbe, 0x61,
+ 0xff, 0x38, 0xe4, 0x79,
+ 0x80, 0xea, 0xc0, 0x61,
0xef, 0x38, 0xc8, 0x18,
0x80, 0x6a, 0xc8, 0x00,
- 0x00, 0x65, 0xb0, 0x49,
+ 0x00, 0x65, 0xb2, 0x49,
0x33, 0x38, 0xc8, 0x28,
0xff, 0x64, 0xd0, 0x09,
0x04, 0x39, 0xc0, 0x31,
0x09, 0x6a, 0xd6, 0x01,
- 0x80, 0xeb, 0xb6, 0x79,
+ 0x80, 0xeb, 0xb8, 0x79,
0xf7, 0xeb, 0xd6, 0x09,
- 0x08, 0xeb, 0xba, 0x69,
+ 0x08, 0xeb, 0xbc, 0x69,
0x01, 0x6a, 0xd6, 0x01,
0x08, 0xe9, 0x10, 0x31,
0x03, 0x8c, 0x10, 0x30,
0x88, 0x6a, 0xcc, 0x00,
- 0x39, 0x6a, 0x1c, 0x5c,
+ 0x39, 0x6a, 0x32, 0x5c,
0x08, 0x6a, 0x18, 0x01,
0xff, 0x6a, 0x1a, 0x09,
0xff, 0x6a, 0x1c, 0x09,
0x0d, 0x93, 0x26, 0x01,
- 0x00, 0x65, 0x9a, 0x5c,
- 0x88, 0x6a, 0x8a, 0x5c,
- 0x00, 0x65, 0x10, 0x5c,
+ 0x00, 0x65, 0xb0, 0x5c,
+ 0x88, 0x6a, 0xa0, 0x5c,
+ 0x00, 0x65, 0x26, 0x5c,
0xff, 0x6a, 0xc8, 0x08,
0x08, 0x39, 0x72, 0x18,
0x00, 0x3a, 0x74, 0x20,
- 0x01, 0x0c, 0xda, 0x79,
+ 0x01, 0x0c, 0xdc, 0x79,
0x10, 0x0c, 0x7a, 0x79,
0xff, 0x35, 0x26, 0x09,
- 0x04, 0x0b, 0xe0, 0x69,
- 0x00, 0x65, 0xfa, 0x59,
+ 0x04, 0x0b, 0xe2, 0x69,
+ 0x00, 0x65, 0xfc, 0x59,
0x03, 0x08, 0x52, 0x31,
0xff, 0x38, 0x50, 0x09,
0xff, 0x08, 0x52, 0x09,
0xff, 0x0a, 0x56, 0x09,
0xff, 0x38, 0x50, 0x09,
0x00, 0x65, 0x22, 0x41,
- 0x00, 0x65, 0xfa, 0x59,
+ 0x00, 0x65, 0xfc, 0x59,
0x7f, 0x02, 0x04, 0x08,
0xe1, 0x6a, 0x22, 0x01,
0x00, 0x65, 0x22, 0x41,
- 0x04, 0x93, 0x10, 0x6a,
+ 0x04, 0x93, 0x12, 0x6a,
0xdf, 0x93, 0x26, 0x09,
- 0x20, 0x93, 0xfe, 0x69,
+ 0x20, 0x93, 0x00, 0x6a,
0x02, 0x93, 0x26, 0x01,
- 0x01, 0x94, 0x00, 0x7a,
- 0x01, 0x94, 0x00, 0x7a,
- 0x01, 0x94, 0x00, 0x7a,
- 0x01, 0x94, 0x00, 0x7a,
- 0x01, 0x94, 0x00, 0x7a,
- 0x01, 0x94, 0x00, 0x7a,
- 0x10, 0x94, 0x0e, 0x6a,
+ 0x01, 0x94, 0x02, 0x7a,
+ 0x01, 0x94, 0x02, 0x7a,
+ 0x01, 0x94, 0x02, 0x7a,
+ 0x01, 0x94, 0x02, 0x7a,
+ 0x01, 0x94, 0x02, 0x7a,
+ 0x01, 0x94, 0x02, 0x7a,
+ 0x10, 0x94, 0x10, 0x6a,
0xf7, 0x93, 0x26, 0x09,
- 0x08, 0x93, 0x12, 0x6a,
+ 0x08, 0x93, 0x14, 0x6a,
0xdf, 0x93, 0x26, 0x09,
- 0x20, 0x93, 0x16, 0x6a,
+ 0x20, 0x93, 0x18, 0x6a,
0x03, 0x08, 0x52, 0x31,
0xff, 0x38, 0x50, 0x09,
0x12, 0x01, 0x02, 0x00,
0xff, 0x6a, 0xd4, 0x0c,
- 0x00, 0x65, 0x78, 0x5b,
+ 0x00, 0x65, 0x8e, 0x5b,
0x05, 0xb4, 0x10, 0x31,
0x02, 0x6a, 0x1a, 0x31,
0x03, 0x8c, 0x10, 0x30,
0x88, 0x6a, 0xcc, 0x00,
- 0xb4, 0x6a, 0x1a, 0x5c,
+ 0xb4, 0x6a, 0x30, 0x5c,
0xff, 0x6a, 0x1a, 0x09,
0xff, 0x6a, 0x1c, 0x09,
- 0x00, 0x65, 0x10, 0x5c,
- 0x3d, 0x6a, 0x60, 0x5b,
+ 0x00, 0x65, 0x26, 0x5c,
+ 0x3d, 0x6a, 0x76, 0x5b,
0xac, 0x6a, 0x26, 0x01,
- 0x04, 0x0b, 0x36, 0x6a,
- 0x01, 0x0b, 0x3c, 0x6a,
- 0x10, 0x0c, 0x38, 0x7a,
+ 0x04, 0x0b, 0x38, 0x6a,
+ 0x04, 0x0b, 0x3e, 0x6a,
+ 0x10, 0x0c, 0x3a, 0x7a,
0xf7, 0x93, 0x26, 0x09,
- 0x08, 0x93, 0x3e, 0x6a,
+ 0x08, 0x93, 0x40, 0x6a,
0xdf, 0x93, 0x26, 0x09,
- 0x20, 0x93, 0x42, 0x6a,
+ 0x20, 0x93, 0x44, 0x6a,
0x12, 0x01, 0x02, 0x00,
0x00, 0x65, 0x22, 0x41,
- 0x00, 0x65, 0x78, 0x5b,
+ 0x00, 0x65, 0x8e, 0x5b,
0xff, 0x06, 0x44, 0x09,
0x00, 0x65, 0x22, 0x41,
0x10, 0x3d, 0x06, 0x00,
0xff, 0x34, 0xca, 0x08,
- 0x80, 0x65, 0x74, 0x62,
+ 0x80, 0x65, 0x76, 0x62,
0x0f, 0xa1, 0xca, 0x08,
0x07, 0xa1, 0xca, 0x08,
0x40, 0xa0, 0xc8, 0x08,
0x00, 0x65, 0xca, 0x00,
0x80, 0x65, 0xca, 0x00,
- 0x80, 0xa0, 0x64, 0x7a,
+ 0x80, 0xa0, 0x66, 0x7a,
0xff, 0x65, 0x0c, 0x08,
- 0x00, 0x65, 0x76, 0x42,
- 0x20, 0xa0, 0x7c, 0x7a,
+ 0x00, 0x65, 0x78, 0x42,
+ 0x20, 0xa0, 0x7e, 0x7a,
0xff, 0x65, 0x0c, 0x08,
- 0x00, 0x65, 0x08, 0x5c,
- 0xa0, 0x3d, 0x84, 0x62,
+ 0x00, 0x65, 0x1e, 0x5c,
+ 0xa0, 0x3d, 0x86, 0x62,
0x23, 0xa0, 0x0c, 0x08,
- 0x00, 0x65, 0x08, 0x5c,
- 0xa0, 0x3d, 0x84, 0x62,
- 0x00, 0xb9, 0x7c, 0x42,
- 0xff, 0x65, 0x7c, 0x62,
+ 0x00, 0x65, 0x1e, 0x5c,
+ 0xa0, 0x3d, 0x86, 0x62,
+ 0x00, 0xb9, 0x7e, 0x42,
+ 0xff, 0x65, 0x7e, 0x62,
0xa1, 0x6a, 0x22, 0x01,
0xff, 0x6a, 0xd4, 0x08,
- 0x10, 0x51, 0x84, 0x72,
+ 0x10, 0x51, 0x86, 0x72,
0x40, 0x6a, 0x18, 0x00,
0xff, 0x65, 0x0c, 0x08,
- 0x00, 0x65, 0x08, 0x5c,
- 0xa0, 0x3d, 0x4e, 0x72,
+ 0x00, 0x65, 0x1e, 0x5c,
+ 0xa0, 0x3d, 0x50, 0x72,
0x40, 0x6a, 0x18, 0x00,
0xff, 0x34, 0xa6, 0x08,
- 0x80, 0x34, 0x8c, 0x62,
+ 0x80, 0x34, 0x8e, 0x62,
0x7f, 0xa0, 0x40, 0x09,
0x08, 0x6a, 0x68, 0x00,
0x00, 0x65, 0x22, 0x41,
- 0x64, 0x6a, 0x50, 0x5b,
- 0x80, 0x64, 0x00, 0x6b,
- 0x04, 0x64, 0xe2, 0x72,
- 0x02, 0x64, 0xe8, 0x72,
- 0x00, 0x6a, 0xaa, 0x72,
- 0x03, 0x64, 0xfc, 0x72,
- 0x01, 0x64, 0xde, 0x72,
- 0x07, 0x64, 0x3e, 0x73,
- 0x08, 0x64, 0xa6, 0x72,
+ 0x64, 0x6a, 0x66, 0x5b,
+ 0x80, 0x64, 0x04, 0x6b,
+ 0x04, 0x64, 0xe6, 0x72,
+ 0x02, 0x64, 0xec, 0x72,
+ 0x00, 0x6a, 0xae, 0x72,
+ 0x03, 0x64, 0x00, 0x73,
+ 0x01, 0x64, 0xe2, 0x72,
+ 0x07, 0x64, 0x42, 0x73,
+ 0x08, 0x64, 0xaa, 0x72,
+ 0x23, 0x64, 0x46, 0x73,
0x11, 0x6a, 0x22, 0x01,
- 0x07, 0x6a, 0x42, 0x5b,
+ 0x07, 0x6a, 0x58, 0x5b,
0xff, 0x06, 0xd4, 0x08,
0x00, 0x65, 0x22, 0x41,
- 0xff, 0xa8, 0xae, 0x6a,
- 0xff, 0xa2, 0xc6, 0x7a,
+ 0xff, 0xa8, 0xb2, 0x6a,
+ 0xff, 0xa2, 0xca, 0x7a,
0x01, 0x6a, 0x6a, 0x00,
- 0x00, 0xb9, 0x34, 0x5c,
- 0xff, 0xa2, 0xc6, 0x7a,
+ 0x00, 0xb9, 0x4a, 0x5c,
+ 0xff, 0xa2, 0xca, 0x7a,
0x71, 0x6a, 0x22, 0x01,
0xff, 0x6a, 0xd4, 0x08,
- 0x40, 0x51, 0xc6, 0x62,
+ 0x40, 0x51, 0xca, 0x62,
0x0d, 0x6a, 0x6a, 0x00,
- 0x00, 0xb9, 0x34, 0x5c,
+ 0x00, 0xb9, 0x4a, 0x5c,
0xff, 0x3e, 0x74, 0x09,
0xff, 0x90, 0x7c, 0x08,
0x00, 0x65, 0x50, 0x58,
0x00, 0x65, 0x34, 0x41,
- 0x20, 0xa0, 0xce, 0x6a,
+ 0x20, 0xa0, 0xd2, 0x6a,
0xff, 0x37, 0xc8, 0x08,
- 0x00, 0x6a, 0xde, 0x5b,
- 0xff, 0x6a, 0xf4, 0x5b,
+ 0x00, 0x6a, 0xf4, 0x5b,
+ 0xff, 0x6a, 0x0a, 0x5c,
0xff, 0xf8, 0xc8, 0x08,
0xff, 0x4f, 0xc8, 0x08,
- 0x01, 0x6a, 0xde, 0x5b,
- 0x00, 0xb9, 0xf4, 0x5b,
+ 0x01, 0x6a, 0xf4, 0x5b,
+ 0x00, 0xb9, 0x0a, 0x5c,
0x01, 0x4f, 0x9e, 0x18,
0x02, 0x6a, 0x22, 0x01,
- 0x00, 0x65, 0xa2, 0x5c,
+ 0x00, 0x65, 0xb8, 0x5c,
0x00, 0x65, 0x34, 0x41,
0x41, 0x6a, 0x22, 0x01,
0x00, 0x65, 0x22, 0x41,
0x04, 0xa0, 0x40, 0x01,
- 0x00, 0x65, 0xba, 0x5c,
+ 0x00, 0x65, 0xd0, 0x5c,
0x00, 0x65, 0x34, 0x41,
- 0x10, 0x36, 0xa6, 0x7a,
+ 0x10, 0x36, 0xaa, 0x7a,
0x05, 0x38, 0x46, 0x31,
0x04, 0x14, 0x58, 0x31,
0x03, 0xa9, 0x60, 0x31,
0xa3, 0x6a, 0xcc, 0x00,
- 0x38, 0x6a, 0x1a, 0x5c,
+ 0x38, 0x6a, 0x30, 0x5c,
0xac, 0x6a, 0xcc, 0x00,
- 0x14, 0x6a, 0x1c, 0x5c,
- 0xa9, 0x6a, 0x1e, 0x5c,
- 0x00, 0x65, 0xa6, 0x42,
+ 0x14, 0x6a, 0x32, 0x5c,
+ 0xa9, 0x6a, 0x34, 0x5c,
+ 0x00, 0x65, 0xaa, 0x42,
0xef, 0x36, 0x6c, 0x08,
- 0x00, 0x65, 0xa6, 0x42,
+ 0x00, 0x65, 0xaa, 0x42,
0x0f, 0x64, 0xc8, 0x08,
0x07, 0x64, 0xc8, 0x08,
0x00, 0x37, 0x6e, 0x00,
0xff, 0x6a, 0xa4, 0x00,
- 0x00, 0x65, 0xae, 0x5b,
- 0xff, 0x51, 0x12, 0x73,
- 0x20, 0x36, 0x1c, 0x7b,
- 0x00, 0x90, 0x9c, 0x5b,
- 0x00, 0x65, 0x1e, 0x43,
+ 0x00, 0x65, 0xc4, 0x5b,
+ 0xff, 0x51, 0x16, 0x73,
+ 0x20, 0x36, 0x20, 0x7b,
+ 0x00, 0x90, 0xb2, 0x5b,
+ 0x00, 0x65, 0x22, 0x43,
0xff, 0x06, 0xd4, 0x08,
- 0x00, 0x65, 0x08, 0x5c,
- 0xe0, 0x3d, 0x38, 0x63,
- 0x20, 0x12, 0x38, 0x63,
- 0x51, 0x6a, 0x46, 0x5b,
- 0x00, 0x65, 0x96, 0x5b,
+ 0x00, 0x65, 0x1e, 0x5c,
+ 0xe0, 0x3d, 0x3c, 0x63,
+ 0x20, 0x12, 0x3c, 0x63,
+ 0x51, 0x6a, 0x5c, 0x5b,
+ 0x00, 0x65, 0xac, 0x5b,
0xff, 0x37, 0xc8, 0x08,
- 0x00, 0xa1, 0x30, 0x63,
- 0x04, 0xa0, 0x30, 0x7b,
+ 0x00, 0xa1, 0x34, 0x63,
+ 0x04, 0xa0, 0x34, 0x7b,
0xfb, 0xa0, 0x40, 0x09,
0x80, 0x36, 0x6c, 0x00,
- 0x80, 0xa0, 0xa6, 0x7a,
+ 0x80, 0xa0, 0xaa, 0x7a,
0x7f, 0xa0, 0x40, 0x09,
- 0xff, 0x6a, 0x42, 0x5b,
- 0x00, 0x65, 0xa6, 0x42,
- 0x04, 0xa0, 0x36, 0x7b,
- 0x00, 0x65, 0xba, 0x5c,
- 0x00, 0x65, 0x38, 0x43,
- 0x00, 0x65, 0xa2, 0x5c,
+ 0xff, 0x6a, 0x58, 0x5b,
+ 0x00, 0x65, 0xaa, 0x42,
+ 0x04, 0xa0, 0x3a, 0x7b,
+ 0x00, 0x65, 0xd0, 0x5c,
+ 0x00, 0x65, 0x3c, 0x43,
+ 0x00, 0x65, 0xb8, 0x5c,
0x31, 0x6a, 0x22, 0x01,
- 0x0c, 0x6a, 0x42, 0x5b,
- 0x00, 0x65, 0xa6, 0x42,
+ 0x0c, 0x6a, 0x58, 0x5b,
+ 0x00, 0x65, 0xaa, 0x42,
0x61, 0x6a, 0x22, 0x01,
- 0x00, 0x65, 0xa6, 0x42,
+ 0x00, 0x65, 0xaa, 0x42,
+ 0x51, 0x6a, 0x5c, 0x5b,
+ 0x20, 0x0d, 0xaa, 0x6a,
+ 0xff, 0xa8, 0x54, 0x6b,
+ 0xff, 0xa9, 0x54, 0x6b,
+ 0xff, 0xaa, 0x54, 0x6b,
+ 0xff, 0xab, 0x54, 0x6b,
+ 0x00, 0x65, 0xaa, 0x42,
+ 0x51, 0x6a, 0x22, 0x01,
+ 0x00, 0x65, 0xaa, 0x42,
0x10, 0x3d, 0x06, 0x00,
0xff, 0x65, 0x68, 0x0c,
0xff, 0x06, 0xd4, 0x08,
- 0x01, 0x0c, 0x48, 0x7b,
- 0x04, 0x0c, 0x48, 0x6b,
+ 0x01, 0x0c, 0x5e, 0x7b,
+ 0x04, 0x0c, 0x60, 0x6b,
0xe0, 0x03, 0x7a, 0x08,
- 0xe0, 0x3d, 0x5c, 0x63,
+ 0xe0, 0x3d, 0x72, 0x63,
0xff, 0x65, 0xcc, 0x08,
0xff, 0x12, 0xda, 0x0c,
0xff, 0x06, 0xd4, 0x0c,
0xff, 0x65, 0x0c, 0x08,
- 0x02, 0x0b, 0x58, 0x7b,
+ 0x02, 0x0b, 0x6e, 0x7b,
0xff, 0x6a, 0xd4, 0x0c,
0xd1, 0x6a, 0x22, 0x01,
0x00, 0x65, 0x22, 0x41,
0xff, 0x65, 0x26, 0x09,
- 0x01, 0x0b, 0x70, 0x6b,
- 0x10, 0x0c, 0x62, 0x7b,
- 0x04, 0x0b, 0x6a, 0x6b,
+ 0x01, 0x0b, 0x86, 0x6b,
+ 0x10, 0x0c, 0x78, 0x7b,
+ 0x04, 0x0b, 0x80, 0x6b,
0xff, 0x6a, 0xca, 0x08,
- 0x04, 0x93, 0x6e, 0x6b,
- 0x01, 0x94, 0x6c, 0x7b,
- 0x10, 0x94, 0x6e, 0x6b,
+ 0x04, 0x93, 0x84, 0x6b,
+ 0x01, 0x94, 0x82, 0x7b,
+ 0x10, 0x94, 0x84, 0x6b,
0xc7, 0x93, 0x26, 0x09,
0xff, 0x99, 0xd4, 0x08,
- 0x38, 0x93, 0x72, 0x6b,
+ 0x38, 0x93, 0x88, 0x6b,
0xff, 0x6a, 0xd4, 0x0c,
- 0x80, 0x36, 0x76, 0x6b,
+ 0x80, 0x36, 0x8c, 0x6b,
0x21, 0x6a, 0x22, 0x05,
0xff, 0x65, 0x20, 0x09,
- 0xff, 0x51, 0x84, 0x63,
+ 0xff, 0x51, 0x9a, 0x63,
0xff, 0x37, 0xc8, 0x08,
- 0xa1, 0x6a, 0x90, 0x43,
+ 0xa1, 0x6a, 0xa6, 0x43,
0xff, 0x51, 0xc8, 0x08,
- 0xb9, 0x6a, 0x90, 0x43,
+ 0xb9, 0x6a, 0xa6, 0x43,
0xff, 0x90, 0xa4, 0x08,
- 0xff, 0xba, 0x94, 0x73,
+ 0xff, 0xba, 0xaa, 0x73,
0xff, 0xba, 0x20, 0x09,
0xff, 0x65, 0xca, 0x18,
- 0x00, 0x6c, 0x88, 0x63,
+ 0x00, 0x6c, 0x9e, 0x63,
0xff, 0x90, 0xca, 0x0c,
0xff, 0x6a, 0xca, 0x04,
- 0x20, 0x36, 0xa8, 0x7b,
- 0x00, 0x90, 0x7c, 0x5b,
- 0xff, 0x65, 0xa8, 0x73,
- 0xff, 0x52, 0xa6, 0x73,
+ 0x20, 0x36, 0xbe, 0x7b,
+ 0x00, 0x90, 0x92, 0x5b,
+ 0xff, 0x65, 0xbe, 0x73,
+ 0xff, 0x52, 0xbc, 0x73,
0xff, 0xba, 0xcc, 0x08,
0xff, 0x52, 0x20, 0x09,
0xff, 0x66, 0x74, 0x09,
0xff, 0x65, 0x20, 0x0d,
0xff, 0xba, 0x7e, 0x0c,
- 0x00, 0x6a, 0xa8, 0x5c,
+ 0x00, 0x6a, 0xbe, 0x5c,
0x0d, 0x6a, 0x6a, 0x00,
- 0x00, 0x51, 0x34, 0x44,
- 0xff, 0x3f, 0x02, 0x74,
+ 0x00, 0x51, 0x4a, 0x44,
+ 0xff, 0x3f, 0x18, 0x74,
0xff, 0x6a, 0xa2, 0x00,
- 0x00, 0x3f, 0x7c, 0x5b,
- 0xff, 0x65, 0x02, 0x74,
+ 0x00, 0x3f, 0x92, 0x5b,
+ 0xff, 0x65, 0x18, 0x74,
0x20, 0x36, 0x6c, 0x00,
- 0x20, 0xa0, 0xbc, 0x6b,
+ 0x20, 0xa0, 0xd2, 0x6b,
0xff, 0xb9, 0xa2, 0x0c,
0xff, 0x6a, 0xa2, 0x04,
0xff, 0x65, 0xa4, 0x08,
0xe0, 0x6a, 0xcc, 0x00,
- 0x45, 0x6a, 0x28, 0x5c,
+ 0x45, 0x6a, 0x3e, 0x5c,
0x01, 0x6a, 0xd0, 0x01,
0x09, 0x6a, 0xd6, 0x01,
- 0x80, 0xeb, 0xc8, 0x7b,
+ 0x80, 0xeb, 0xde, 0x7b,
0x01, 0x6a, 0xd6, 0x01,
0x01, 0xe9, 0xa4, 0x34,
0x88, 0x6a, 0xcc, 0x00,
- 0x45, 0x6a, 0x28, 0x5c,
+ 0x45, 0x6a, 0x3e, 0x5c,
0x01, 0x6a, 0x18, 0x01,
0xff, 0x6a, 0x1a, 0x09,
0xff, 0x6a, 0x1c, 0x09,
0x0d, 0x6a, 0x26, 0x01,
- 0x00, 0x65, 0x9a, 0x5c,
+ 0x00, 0x65, 0xb0, 0x5c,
0xff, 0x99, 0xa4, 0x0c,
0xff, 0x65, 0xa4, 0x08,
0xe0, 0x6a, 0xcc, 0x00,
- 0x45, 0x6a, 0x28, 0x5c,
+ 0x45, 0x6a, 0x3e, 0x5c,
0x01, 0x6a, 0xd0, 0x01,
0x01, 0x6a, 0xdc, 0x05,
0x88, 0x6a, 0xcc, 0x00,
- 0x45, 0x6a, 0x28, 0x5c,
+ 0x45, 0x6a, 0x3e, 0x5c,
0x01, 0x6a, 0x18, 0x01,
0xff, 0x6a, 0x1a, 0x09,
0xff, 0x6a, 0x1c, 0x09,
0x01, 0x6a, 0x26, 0x05,
0x01, 0x65, 0xd8, 0x31,
0x09, 0xee, 0xdc, 0x01,
- 0x80, 0xee, 0xf8, 0x7b,
+ 0x80, 0xee, 0x0e, 0x7c,
0xff, 0x6a, 0xdc, 0x0d,
0xff, 0x65, 0x32, 0x09,
0x0a, 0x93, 0x26, 0x01,
- 0x00, 0x65, 0x9a, 0x44,
+ 0x00, 0x65, 0xb0, 0x44,
0xff, 0x37, 0xc8, 0x08,
- 0x00, 0x6a, 0xbe, 0x5b,
+ 0x00, 0x6a, 0xd4, 0x5b,
0xff, 0x52, 0xa2, 0x0c,
- 0x01, 0x0c, 0x08, 0x7c,
- 0x04, 0x0c, 0x08, 0x6c,
+ 0x01, 0x0c, 0x1e, 0x7c,
+ 0x04, 0x0c, 0x1e, 0x6c,
0xe0, 0x03, 0x06, 0x08,
0xe0, 0x03, 0x7a, 0x0c,
0xff, 0x8c, 0x10, 0x08,
0x00, 0x6c, 0xda, 0x24,
0xff, 0x65, 0xc8, 0x08,
0xe0, 0x6a, 0xcc, 0x00,
- 0x41, 0x6a, 0x24, 0x5c,
+ 0x41, 0x6a, 0x3a, 0x5c,
0xff, 0x90, 0xe2, 0x09,
0x20, 0x6a, 0xd0, 0x01,
- 0x04, 0x35, 0x46, 0x7c,
+ 0x04, 0x35, 0x5c, 0x7c,
0x1d, 0x6a, 0xdc, 0x01,
- 0xdc, 0xee, 0x42, 0x64,
- 0x00, 0x65, 0x52, 0x44,
+ 0xdc, 0xee, 0x58, 0x64,
+ 0x00, 0x65, 0x68, 0x44,
0x01, 0x6a, 0xdc, 0x01,
0x20, 0xa0, 0xd8, 0x31,
0x09, 0xee, 0xdc, 0x01,
- 0x80, 0xee, 0x4c, 0x7c,
+ 0x80, 0xee, 0x62, 0x7c,
0x19, 0x6a, 0xdc, 0x01,
- 0xd8, 0xee, 0x50, 0x64,
+ 0xd8, 0xee, 0x66, 0x64,
0xff, 0x6a, 0xdc, 0x09,
- 0x18, 0xee, 0x54, 0x6c,
+ 0x18, 0xee, 0x6a, 0x6c,
0xff, 0x6a, 0xd4, 0x0c,
0x88, 0x6a, 0xcc, 0x00,
- 0x41, 0x6a, 0x24, 0x5c,
+ 0x41, 0x6a, 0x3a, 0x5c,
0x20, 0x6a, 0x18, 0x01,
0xff, 0x6a, 0x1a, 0x09,
0xff, 0x6a, 0x1c, 0x09,
0xff, 0x35, 0x26, 0x09,
- 0x04, 0x35, 0x7e, 0x6c,
+ 0x04, 0x35, 0x94, 0x6c,
0xa0, 0x6a, 0xca, 0x00,
0x20, 0x65, 0xc8, 0x18,
0xff, 0x6c, 0x32, 0x09,
0xff, 0x6c, 0x32, 0x09,
0xff, 0x6c, 0x32, 0x09,
0xff, 0x6c, 0x32, 0x09,
- 0x00, 0x65, 0x6a, 0x64,
+ 0x00, 0x65, 0x80, 0x64,
0x0a, 0x93, 0x26, 0x01,
- 0x00, 0x65, 0x9a, 0x5c,
- 0x04, 0x35, 0x76, 0x7b,
- 0xa0, 0x6a, 0x8a, 0x5c,
- 0x00, 0x65, 0x8c, 0x5c,
- 0x00, 0x65, 0x8c, 0x5c,
- 0x00, 0x65, 0x8c, 0x44,
+ 0x00, 0x65, 0xb0, 0x5c,
+ 0x04, 0x35, 0x8c, 0x7b,
+ 0xa0, 0x6a, 0xa0, 0x5c,
+ 0x00, 0x65, 0xa2, 0x5c,
+ 0x00, 0x65, 0xa2, 0x5c,
+ 0x00, 0x65, 0xa2, 0x44,
0xff, 0x65, 0xcc, 0x08,
0xff, 0x99, 0xda, 0x08,
0xff, 0x99, 0xda, 0x08,
0xff, 0x99, 0xda, 0x08,
0xff, 0x99, 0xda, 0x08,
0xff, 0x99, 0xda, 0x0c,
- 0x08, 0x94, 0x9a, 0x7c,
+ 0x08, 0x94, 0xb0, 0x7c,
0xf7, 0x93, 0x26, 0x09,
- 0x08, 0x93, 0x9e, 0x6c,
+ 0x08, 0x93, 0xb4, 0x6c,
0xff, 0x6a, 0xd4, 0x0c,
0xff, 0x40, 0x74, 0x09,
0xff, 0x90, 0x80, 0x08,
0xff, 0x6a, 0x72, 0x05,
- 0xff, 0x40, 0xb6, 0x64,
- 0xff, 0x3f, 0xae, 0x64,
+ 0xff, 0x40, 0xcc, 0x64,
+ 0xff, 0x3f, 0xc4, 0x64,
0xff, 0x6a, 0xca, 0x04,
0xff, 0x3f, 0x20, 0x09,
0x01, 0x6a, 0x6a, 0x00,
- 0x00, 0xb9, 0x34, 0x5c,
+ 0x00, 0xb9, 0x4a, 0x5c,
0xff, 0xba, 0x7e, 0x0c,
0xff, 0x40, 0x20, 0x09,
0xff, 0xba, 0x80, 0x0c,
{ aic7xxx_patch2_func, 192, 2, 3 },
{ aic7xxx_patch8_func, 192, 1, 1 },
{ aic7xxx_patch0_func, 194, 3, 1 },
- { aic7xxx_patch10_func, 197, 2, 1 },
- { aic7xxx_patch8_func, 199, 7, 2 },
- { aic7xxx_patch0_func, 206, 1, 1 },
- { aic7xxx_patch2_func, 211, 14, 3 },
- { aic7xxx_patch10_func, 224, 1, 1 },
- { aic7xxx_patch0_func, 225, 9, 1 },
- { aic7xxx_patch8_func, 239, 2, 1 },
- { aic7xxx_patch8_func, 241, 1, 1 },
- { aic7xxx_patch10_func, 242, 6, 3 },
- { aic7xxx_patch2_func, 242, 2, 2 },
- { aic7xxx_patch0_func, 244, 4, 1 },
- { aic7xxx_patch8_func, 249, 1, 1 },
- { aic7xxx_patch8_func, 253, 19, 1 },
- { aic7xxx_patch2_func, 273, 3, 3 },
- { aic7xxx_patch10_func, 275, 1, 1 },
- { aic7xxx_patch0_func, 276, 5, 1 },
- { aic7xxx_patch10_func, 281, 1, 2 },
- { aic7xxx_patch0_func, 282, 9, 1 },
- { aic7xxx_patch11_func, 298, 1, 2 },
- { aic7xxx_patch0_func, 299, 1, 1 },
- { aic7xxx_patch5_func, 359, 1, 2 },
- { aic7xxx_patch0_func, 360, 1, 1 },
- { aic7xxx_patch3_func, 363, 1, 1 },
- { aic7xxx_patch2_func, 373, 3, 2 },
- { aic7xxx_patch0_func, 376, 5, 1 },
- { aic7xxx_patch11_func, 384, 1, 2 },
- { aic7xxx_patch0_func, 385, 1, 1 },
- { aic7xxx_patch6_func, 390, 1, 1 },
- { aic7xxx_patch1_func, 427, 3, 1 },
- { aic7xxx_patch10_func, 432, 11, 1 },
- { aic7xxx_patch2_func, 480, 7, 2 },
- { aic7xxx_patch0_func, 487, 8, 1 },
- { aic7xxx_patch2_func, 496, 4, 2 },
- { aic7xxx_patch0_func, 500, 6, 1 },
- { aic7xxx_patch2_func, 506, 4, 2 },
- { aic7xxx_patch0_func, 510, 3, 1 },
- { aic7xxx_patch12_func, 520, 10, 1 },
- { aic7xxx_patch2_func, 539, 17, 4 },
- { aic7xxx_patch13_func, 547, 4, 2 },
- { aic7xxx_patch0_func, 551, 2, 1 },
- { aic7xxx_patch0_func, 556, 33, 1 },
- { aic7xxx_patch12_func, 589, 4, 1 },
- { aic7xxx_patch6_func, 593, 2, 1 },
- { aic7xxx_patch6_func, 596, 9, 1 },
+ { aic7xxx_patch10_func, 198, 1, 2 },
+ { aic7xxx_patch0_func, 199, 1, 1 },
+ { aic7xxx_patch8_func, 200, 7, 2 },
+ { aic7xxx_patch0_func, 207, 1, 1 },
+ { aic7xxx_patch2_func, 212, 14, 3 },
+ { aic7xxx_patch10_func, 225, 1, 1 },
+ { aic7xxx_patch0_func, 226, 9, 1 },
+ { aic7xxx_patch8_func, 240, 2, 1 },
+ { aic7xxx_patch8_func, 242, 1, 1 },
+ { aic7xxx_patch10_func, 243, 6, 3 },
+ { aic7xxx_patch2_func, 243, 2, 2 },
+ { aic7xxx_patch0_func, 245, 4, 1 },
+ { aic7xxx_patch8_func, 250, 1, 1 },
+ { aic7xxx_patch8_func, 254, 19, 1 },
+ { aic7xxx_patch2_func, 274, 3, 3 },
+ { aic7xxx_patch10_func, 276, 1, 1 },
+ { aic7xxx_patch0_func, 277, 5, 1 },
+ { aic7xxx_patch10_func, 282, 1, 2 },
+ { aic7xxx_patch0_func, 283, 9, 1 },
+ { aic7xxx_patch11_func, 299, 1, 2 },
+ { aic7xxx_patch0_func, 300, 1, 1 },
+ { aic7xxx_patch5_func, 361, 1, 2 },
+ { aic7xxx_patch0_func, 362, 1, 1 },
+ { aic7xxx_patch3_func, 365, 1, 1 },
+ { aic7xxx_patch2_func, 375, 3, 2 },
+ { aic7xxx_patch0_func, 378, 5, 1 },
+ { aic7xxx_patch11_func, 386, 1, 2 },
+ { aic7xxx_patch0_func, 387, 1, 1 },
+ { aic7xxx_patch6_func, 392, 1, 1 },
+ { aic7xxx_patch8_func, 420, 1, 2 },
+ { aic7xxx_patch0_func, 421, 5, 1 },
+ { aic7xxx_patch1_func, 438, 3, 1 },
+ { aic7xxx_patch10_func, 443, 11, 1 },
+ { aic7xxx_patch2_func, 491, 7, 2 },
+ { aic7xxx_patch0_func, 498, 8, 1 },
+ { aic7xxx_patch2_func, 507, 4, 2 },
+ { aic7xxx_patch0_func, 511, 6, 1 },
+ { aic7xxx_patch2_func, 517, 4, 2 },
+ { aic7xxx_patch0_func, 521, 3, 1 },
+ { aic7xxx_patch12_func, 531, 10, 1 },
+ { aic7xxx_patch2_func, 550, 17, 4 },
+ { aic7xxx_patch13_func, 558, 4, 2 },
+ { aic7xxx_patch0_func, 562, 2, 1 },
+ { aic7xxx_patch0_func, 567, 33, 1 },
+ { aic7xxx_patch12_func, 600, 4, 1 },
+ { aic7xxx_patch6_func, 604, 2, 1 },
+ { aic7xxx_patch6_func, 607, 9, 1 },
};
*/
static void clean_inode(struct inode *inode)
{
+ static struct address_space_operations empty_aops = {};
memset(&inode->u, 0, sizeof(inode->u));
inode->i_sock = 0;
inode->i_op = NULL;
memset(&inode->i_dquot, 0, sizeof(inode->i_dquot));
inode->i_pipe = NULL;
inode->i_bdev = NULL;
+ inode->i_data.a_ops = &empty_aops;
+ inode->i_data.host = (void*)inode;
inode->i_mapping = &inode->i_data;
- inode->i_mapping->host = (void*)inode;
}
/*
-/* $Id: inode.c,v 1.4 2000/02/09 22:35:50 davem Exp $
+/* $Id: inode.c,v 1.5 2000/02/10 21:16:06 davem Exp $
* openpromfs.c: /proc/openprom handling routines
*
* Copyright (C) 1996-1999 Jakub Jelinek (jakub@redhat.com)
#define pgd_offset_k(address) pgd_offset(&init_mm, address)
/* to find an entry in a page-table-directory. */
-#define __pgd_offset(address) ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
+#define __pgd_offset(address) ((address >> PGDIR_SHIFT) & PTRS_PER_PGD)
#define pgd_offset(mm, address) ((mm)->pgd+__pgd_offset(address))
/* Find an entry in the second-level page table.. */
#define AOFF_task_it_virt_incr 0x000000c4
#define ASIZ_task_it_virt_incr 0x00000004
#define AOFF_task_real_timer 0x000000c8
-#define ASIZ_task_real_timer 0x00000014
-#define AOFF_task_times 0x000000dc
+#define ASIZ_task_real_timer 0x00000018
+#define AOFF_task_times 0x000000e0
#define ASIZ_task_times 0x00000010
-#define AOFF_task_start_time 0x000000ec
+#define AOFF_task_start_time 0x000000f0
#define ASIZ_task_start_time 0x00000004
-#define AOFF_task_per_cpu_utime 0x000000f0
+#define AOFF_task_per_cpu_utime 0x000000f4
#define ASIZ_task_per_cpu_utime 0x00000004
-#define AOFF_task_min_flt 0x000000f8
+#define AOFF_task_min_flt 0x000000fc
#define ASIZ_task_min_flt 0x00000004
-#define AOFF_task_maj_flt 0x000000fc
+#define AOFF_task_maj_flt 0x00000100
#define ASIZ_task_maj_flt 0x00000004
-#define AOFF_task_nswap 0x00000100
+#define AOFF_task_nswap 0x00000104
#define ASIZ_task_nswap 0x00000004
-#define AOFF_task_cmin_flt 0x00000104
+#define AOFF_task_cmin_flt 0x00000108
#define ASIZ_task_cmin_flt 0x00000004
-#define AOFF_task_cmaj_flt 0x00000108
+#define AOFF_task_cmaj_flt 0x0000010c
#define ASIZ_task_cmaj_flt 0x00000004
-#define AOFF_task_cnswap 0x0000010c
+#define AOFF_task_cnswap 0x00000110
#define ASIZ_task_cnswap 0x00000004
-#define AOFF_task_uid 0x00000114
+#define AOFF_task_uid 0x00000118
#define ASIZ_task_uid 0x00000004
-#define AOFF_task_euid 0x00000118
+#define AOFF_task_euid 0x0000011c
#define ASIZ_task_euid 0x00000004
-#define AOFF_task_suid 0x0000011c
+#define AOFF_task_suid 0x00000120
#define ASIZ_task_suid 0x00000004
-#define AOFF_task_fsuid 0x00000120
+#define AOFF_task_fsuid 0x00000124
#define ASIZ_task_fsuid 0x00000004
-#define AOFF_task_gid 0x00000124
+#define AOFF_task_gid 0x00000128
#define ASIZ_task_gid 0x00000004
-#define AOFF_task_egid 0x00000128
+#define AOFF_task_egid 0x0000012c
#define ASIZ_task_egid 0x00000004
-#define AOFF_task_sgid 0x0000012c
+#define AOFF_task_sgid 0x00000130
#define ASIZ_task_sgid 0x00000004
-#define AOFF_task_fsgid 0x00000130
+#define AOFF_task_fsgid 0x00000134
#define ASIZ_task_fsgid 0x00000004
-#define AOFF_task_ngroups 0x00000134
+#define AOFF_task_ngroups 0x00000138
#define ASIZ_task_ngroups 0x00000004
-#define AOFF_task_groups 0x00000138
+#define AOFF_task_groups 0x0000013c
#define ASIZ_task_groups 0x00000080
-#define AOFF_task_cap_effective 0x000001b8
+#define AOFF_task_cap_effective 0x000001bc
#define ASIZ_task_cap_effective 0x00000004
-#define AOFF_task_cap_inheritable 0x000001bc
+#define AOFF_task_cap_inheritable 0x000001c0
#define ASIZ_task_cap_inheritable 0x00000004
-#define AOFF_task_cap_permitted 0x000001c0
+#define AOFF_task_cap_permitted 0x000001c4
#define ASIZ_task_cap_permitted 0x00000004
-#define AOFF_task_user 0x000001c4
+#define AOFF_task_user 0x000001c8
#define ASIZ_task_user 0x00000004
-#define AOFF_task_rlim 0x000001c8
+#define AOFF_task_rlim 0x000001cc
#define ASIZ_task_rlim 0x00000050
-#define AOFF_task_used_math 0x00000218
+#define AOFF_task_used_math 0x0000021c
#define ASIZ_task_used_math 0x00000002
-#define AOFF_task_comm 0x0000021a
+#define AOFF_task_comm 0x0000021e
#define ASIZ_task_comm 0x00000010
-#define AOFF_task_link_count 0x0000022c
+#define AOFF_task_link_count 0x00000230
#define ASIZ_task_link_count 0x00000004
-#define AOFF_task_tty 0x00000230
+#define AOFF_task_tty 0x00000234
#define ASIZ_task_tty 0x00000004
-#define AOFF_task_semundo 0x00000234
+#define AOFF_task_semundo 0x00000238
#define ASIZ_task_semundo 0x00000004
-#define AOFF_task_semsleeping 0x00000238
+#define AOFF_task_semsleeping 0x0000023c
#define ASIZ_task_semsleeping 0x00000004
#define AOFF_task_thread 0x00000240
#define ASIZ_task_thread 0x00000380
#define AOFF_task_it_virt_incr 0x000000cc
#define ASIZ_task_it_virt_incr 0x00000004
#define AOFF_task_real_timer 0x000000d0
-#define ASIZ_task_real_timer 0x00000014
-#define AOFF_task_times 0x000000e4
+#define ASIZ_task_real_timer 0x00000018
+#define AOFF_task_times 0x000000e8
#define ASIZ_task_times 0x00000010
-#define AOFF_task_start_time 0x000000f4
+#define AOFF_task_start_time 0x000000f8
#define ASIZ_task_start_time 0x00000004
-#define AOFF_task_per_cpu_utime 0x000000f8
+#define AOFF_task_per_cpu_utime 0x000000fc
#define ASIZ_task_per_cpu_utime 0x00000080
-#define AOFF_task_min_flt 0x000001f8
+#define AOFF_task_min_flt 0x000001fc
#define ASIZ_task_min_flt 0x00000004
-#define AOFF_task_maj_flt 0x000001fc
+#define AOFF_task_maj_flt 0x00000200
#define ASIZ_task_maj_flt 0x00000004
-#define AOFF_task_nswap 0x00000200
+#define AOFF_task_nswap 0x00000204
#define ASIZ_task_nswap 0x00000004
-#define AOFF_task_cmin_flt 0x00000204
+#define AOFF_task_cmin_flt 0x00000208
#define ASIZ_task_cmin_flt 0x00000004
-#define AOFF_task_cmaj_flt 0x00000208
+#define AOFF_task_cmaj_flt 0x0000020c
#define ASIZ_task_cmaj_flt 0x00000004
-#define AOFF_task_cnswap 0x0000020c
+#define AOFF_task_cnswap 0x00000210
#define ASIZ_task_cnswap 0x00000004
-#define AOFF_task_uid 0x00000214
+#define AOFF_task_uid 0x00000218
#define ASIZ_task_uid 0x00000004
-#define AOFF_task_euid 0x00000218
+#define AOFF_task_euid 0x0000021c
#define ASIZ_task_euid 0x00000004
-#define AOFF_task_suid 0x0000021c
+#define AOFF_task_suid 0x00000220
#define ASIZ_task_suid 0x00000004
-#define AOFF_task_fsuid 0x00000220
+#define AOFF_task_fsuid 0x00000224
#define ASIZ_task_fsuid 0x00000004
-#define AOFF_task_gid 0x00000224
+#define AOFF_task_gid 0x00000228
#define ASIZ_task_gid 0x00000004
-#define AOFF_task_egid 0x00000228
+#define AOFF_task_egid 0x0000022c
#define ASIZ_task_egid 0x00000004
-#define AOFF_task_sgid 0x0000022c
+#define AOFF_task_sgid 0x00000230
#define ASIZ_task_sgid 0x00000004
-#define AOFF_task_fsgid 0x00000230
+#define AOFF_task_fsgid 0x00000234
#define ASIZ_task_fsgid 0x00000004
-#define AOFF_task_ngroups 0x00000234
+#define AOFF_task_ngroups 0x00000238
#define ASIZ_task_ngroups 0x00000004
-#define AOFF_task_groups 0x00000238
+#define AOFF_task_groups 0x0000023c
#define ASIZ_task_groups 0x00000080
-#define AOFF_task_cap_effective 0x000002b8
+#define AOFF_task_cap_effective 0x000002bc
#define ASIZ_task_cap_effective 0x00000004
-#define AOFF_task_cap_inheritable 0x000002bc
+#define AOFF_task_cap_inheritable 0x000002c0
#define ASIZ_task_cap_inheritable 0x00000004
-#define AOFF_task_cap_permitted 0x000002c0
+#define AOFF_task_cap_permitted 0x000002c4
#define ASIZ_task_cap_permitted 0x00000004
-#define AOFF_task_user 0x000002c4
+#define AOFF_task_user 0x000002c8
#define ASIZ_task_user 0x00000004
-#define AOFF_task_rlim 0x000002c8
+#define AOFF_task_rlim 0x000002cc
#define ASIZ_task_rlim 0x00000050
-#define AOFF_task_used_math 0x00000318
+#define AOFF_task_used_math 0x0000031c
#define ASIZ_task_used_math 0x00000002
-#define AOFF_task_comm 0x0000031a
+#define AOFF_task_comm 0x0000031e
#define ASIZ_task_comm 0x00000010
-#define AOFF_task_link_count 0x0000032c
+#define AOFF_task_link_count 0x00000330
#define ASIZ_task_link_count 0x00000004
-#define AOFF_task_tty 0x00000330
+#define AOFF_task_tty 0x00000334
#define ASIZ_task_tty 0x00000004
-#define AOFF_task_semundo 0x00000334
+#define AOFF_task_semundo 0x00000338
#define ASIZ_task_semundo 0x00000004
-#define AOFF_task_semsleeping 0x00000338
+#define AOFF_task_semsleeping 0x0000033c
#define ASIZ_task_semsleeping 0x00000004
#define AOFF_task_thread 0x00000340
#define ASIZ_task_thread 0x00000380
#define AOFF_task_it_virt_incr 0x00000158
#define ASIZ_task_it_virt_incr 0x00000008
#define AOFF_task_real_timer 0x00000160
-#define ASIZ_task_real_timer 0x00000028
-#define AOFF_task_times 0x00000188
+#define ASIZ_task_real_timer 0x00000030
+#define AOFF_task_times 0x00000190
#define ASIZ_task_times 0x00000020
-#define AOFF_task_start_time 0x000001a8
+#define AOFF_task_start_time 0x000001b0
#define ASIZ_task_start_time 0x00000008
-#define AOFF_task_per_cpu_utime 0x000001b0
+#define AOFF_task_per_cpu_utime 0x000001b8
#define ASIZ_task_per_cpu_utime 0x00000008
-#define AOFF_task_min_flt 0x000001c0
+#define AOFF_task_min_flt 0x000001c8
#define ASIZ_task_min_flt 0x00000008
-#define AOFF_task_maj_flt 0x000001c8
+#define AOFF_task_maj_flt 0x000001d0
#define ASIZ_task_maj_flt 0x00000008
-#define AOFF_task_nswap 0x000001d0
+#define AOFF_task_nswap 0x000001d8
#define ASIZ_task_nswap 0x00000008
-#define AOFF_task_cmin_flt 0x000001d8
+#define AOFF_task_cmin_flt 0x000001e0
#define ASIZ_task_cmin_flt 0x00000008
-#define AOFF_task_cmaj_flt 0x000001e0
+#define AOFF_task_cmaj_flt 0x000001e8
#define ASIZ_task_cmaj_flt 0x00000008
-#define AOFF_task_cnswap 0x000001e8
+#define AOFF_task_cnswap 0x000001f0
#define ASIZ_task_cnswap 0x00000008
-#define AOFF_task_uid 0x000001f4
+#define AOFF_task_uid 0x000001fc
#define ASIZ_task_uid 0x00000004
-#define AOFF_task_euid 0x000001f8
+#define AOFF_task_euid 0x00000200
#define ASIZ_task_euid 0x00000004
-#define AOFF_task_suid 0x000001fc
+#define AOFF_task_suid 0x00000204
#define ASIZ_task_suid 0x00000004
-#define AOFF_task_fsuid 0x00000200
+#define AOFF_task_fsuid 0x00000208
#define ASIZ_task_fsuid 0x00000004
-#define AOFF_task_gid 0x00000204
+#define AOFF_task_gid 0x0000020c
#define ASIZ_task_gid 0x00000004
-#define AOFF_task_egid 0x00000208
+#define AOFF_task_egid 0x00000210
#define ASIZ_task_egid 0x00000004
-#define AOFF_task_sgid 0x0000020c
+#define AOFF_task_sgid 0x00000214
#define ASIZ_task_sgid 0x00000004
-#define AOFF_task_fsgid 0x00000210
+#define AOFF_task_fsgid 0x00000218
#define ASIZ_task_fsgid 0x00000004
-#define AOFF_task_ngroups 0x00000214
+#define AOFF_task_ngroups 0x0000021c
#define ASIZ_task_ngroups 0x00000004
-#define AOFF_task_groups 0x00000218
+#define AOFF_task_groups 0x00000220
#define ASIZ_task_groups 0x00000080
-#define AOFF_task_cap_effective 0x00000298
+#define AOFF_task_cap_effective 0x000002a0
#define ASIZ_task_cap_effective 0x00000004
-#define AOFF_task_cap_inheritable 0x0000029c
+#define AOFF_task_cap_inheritable 0x000002a4
#define ASIZ_task_cap_inheritable 0x00000004
-#define AOFF_task_cap_permitted 0x000002a0
+#define AOFF_task_cap_permitted 0x000002a8
#define ASIZ_task_cap_permitted 0x00000004
-#define AOFF_task_user 0x000002a8
+#define AOFF_task_user 0x000002b0
#define ASIZ_task_user 0x00000008
-#define AOFF_task_rlim 0x000002b0
+#define AOFF_task_rlim 0x000002b8
#define ASIZ_task_rlim 0x000000a0
-#define AOFF_task_used_math 0x00000350
+#define AOFF_task_used_math 0x00000358
#define ASIZ_task_used_math 0x00000002
-#define AOFF_task_comm 0x00000352
+#define AOFF_task_comm 0x0000035a
#define ASIZ_task_comm 0x00000010
-#define AOFF_task_link_count 0x00000364
+#define AOFF_task_link_count 0x0000036c
#define ASIZ_task_link_count 0x00000004
-#define AOFF_task_tty 0x00000368
+#define AOFF_task_tty 0x00000370
#define ASIZ_task_tty 0x00000008
-#define AOFF_task_semundo 0x00000370
+#define AOFF_task_semundo 0x00000378
#define ASIZ_task_semundo 0x00000008
-#define AOFF_task_semsleeping 0x00000378
+#define AOFF_task_semsleeping 0x00000380
#define ASIZ_task_semsleeping 0x00000008
-#define AOFF_task_thread 0x00000380
+#define AOFF_task_thread 0x00000390
#define ASIZ_task_thread 0x00000450
-#define AOFF_task_fs 0x000007d0
+#define AOFF_task_fs 0x000007e0
#define ASIZ_task_fs 0x00000008
-#define AOFF_task_files 0x000007d8
+#define AOFF_task_files 0x000007e8
#define ASIZ_task_files 0x00000008
-#define AOFF_task_sigmask_lock 0x000007e0
+#define AOFF_task_sigmask_lock 0x000007f0
#define ASIZ_task_sigmask_lock 0x00000000
-#define AOFF_task_sig 0x000007e0
+#define AOFF_task_sig 0x000007f0
#define ASIZ_task_sig 0x00000008
-#define AOFF_task_signal 0x000007e8
+#define AOFF_task_signal 0x000007f8
#define ASIZ_task_signal 0x00000008
-#define AOFF_task_blocked 0x000007f0
+#define AOFF_task_blocked 0x00000800
#define ASIZ_task_blocked 0x00000008
-#define AOFF_task_sigqueue 0x000007f8
+#define AOFF_task_sigqueue 0x00000808
#define ASIZ_task_sigqueue 0x00000008
-#define AOFF_task_sigqueue_tail 0x00000800
+#define AOFF_task_sigqueue_tail 0x00000810
#define ASIZ_task_sigqueue_tail 0x00000008
-#define AOFF_task_sas_ss_sp 0x00000808
+#define AOFF_task_sas_ss_sp 0x00000818
#define ASIZ_task_sas_ss_sp 0x00000008
-#define AOFF_task_sas_ss_size 0x00000810
+#define AOFF_task_sas_ss_size 0x00000820
#define ASIZ_task_sas_ss_size 0x00000008
-#define AOFF_task_parent_exec_id 0x00000818
+#define AOFF_task_parent_exec_id 0x00000828
#define ASIZ_task_parent_exec_id 0x00000004
-#define AOFF_task_self_exec_id 0x0000081c
+#define AOFF_task_self_exec_id 0x0000082c
#define ASIZ_task_self_exec_id 0x00000004
-#define AOFF_task_exit_sem 0x00000820
+#define AOFF_task_exit_sem 0x00000830
#define ASIZ_task_exit_sem 0x00000030
-#define ASIZ_task 0x00000850
+#define ASIZ_task 0x00000860
#define AOFF_mm_mmap 0x00000000
#define ASIZ_mm_mmap 0x00000008
#define AOFF_mm_mmap_avl 0x00000008
#define AOFF_task_it_virt_incr 0x00000160
#define ASIZ_task_it_virt_incr 0x00000008
#define AOFF_task_real_timer 0x00000168
-#define ASIZ_task_real_timer 0x00000028
-#define AOFF_task_times 0x00000190
+#define ASIZ_task_real_timer 0x00000030
+#define AOFF_task_times 0x00000198
#define ASIZ_task_times 0x00000020
-#define AOFF_task_start_time 0x000001b0
+#define AOFF_task_start_time 0x000001b8
#define ASIZ_task_start_time 0x00000008
-#define AOFF_task_per_cpu_utime 0x000001b8
+#define AOFF_task_per_cpu_utime 0x000001c0
#define ASIZ_task_per_cpu_utime 0x00000100
-#define AOFF_task_min_flt 0x000003b8
+#define AOFF_task_min_flt 0x000003c0
#define ASIZ_task_min_flt 0x00000008
-#define AOFF_task_maj_flt 0x000003c0
+#define AOFF_task_maj_flt 0x000003c8
#define ASIZ_task_maj_flt 0x00000008
-#define AOFF_task_nswap 0x000003c8
+#define AOFF_task_nswap 0x000003d0
#define ASIZ_task_nswap 0x00000008
-#define AOFF_task_cmin_flt 0x000003d0
+#define AOFF_task_cmin_flt 0x000003d8
#define ASIZ_task_cmin_flt 0x00000008
-#define AOFF_task_cmaj_flt 0x000003d8
+#define AOFF_task_cmaj_flt 0x000003e0
#define ASIZ_task_cmaj_flt 0x00000008
-#define AOFF_task_cnswap 0x000003e0
+#define AOFF_task_cnswap 0x000003e8
#define ASIZ_task_cnswap 0x00000008
-#define AOFF_task_uid 0x000003ec
+#define AOFF_task_uid 0x000003f4
#define ASIZ_task_uid 0x00000004
-#define AOFF_task_euid 0x000003f0
+#define AOFF_task_euid 0x000003f8
#define ASIZ_task_euid 0x00000004
-#define AOFF_task_suid 0x000003f4
+#define AOFF_task_suid 0x000003fc
#define ASIZ_task_suid 0x00000004
-#define AOFF_task_fsuid 0x000003f8
+#define AOFF_task_fsuid 0x00000400
#define ASIZ_task_fsuid 0x00000004
-#define AOFF_task_gid 0x000003fc
+#define AOFF_task_gid 0x00000404
#define ASIZ_task_gid 0x00000004
-#define AOFF_task_egid 0x00000400
+#define AOFF_task_egid 0x00000408
#define ASIZ_task_egid 0x00000004
-#define AOFF_task_sgid 0x00000404
+#define AOFF_task_sgid 0x0000040c
#define ASIZ_task_sgid 0x00000004
-#define AOFF_task_fsgid 0x00000408
+#define AOFF_task_fsgid 0x00000410
#define ASIZ_task_fsgid 0x00000004
-#define AOFF_task_ngroups 0x0000040c
+#define AOFF_task_ngroups 0x00000414
#define ASIZ_task_ngroups 0x00000004
-#define AOFF_task_groups 0x00000410
+#define AOFF_task_groups 0x00000418
#define ASIZ_task_groups 0x00000080
-#define AOFF_task_cap_effective 0x00000490
+#define AOFF_task_cap_effective 0x00000498
#define ASIZ_task_cap_effective 0x00000004
-#define AOFF_task_cap_inheritable 0x00000494
+#define AOFF_task_cap_inheritable 0x0000049c
#define ASIZ_task_cap_inheritable 0x00000004
-#define AOFF_task_cap_permitted 0x00000498
+#define AOFF_task_cap_permitted 0x000004a0
#define ASIZ_task_cap_permitted 0x00000004
-#define AOFF_task_user 0x000004a0
+#define AOFF_task_user 0x000004a8
#define ASIZ_task_user 0x00000008
-#define AOFF_task_rlim 0x000004a8
+#define AOFF_task_rlim 0x000004b0
#define ASIZ_task_rlim 0x000000a0
-#define AOFF_task_used_math 0x00000548
+#define AOFF_task_used_math 0x00000550
#define ASIZ_task_used_math 0x00000002
-#define AOFF_task_comm 0x0000054a
+#define AOFF_task_comm 0x00000552
#define ASIZ_task_comm 0x00000010
-#define AOFF_task_link_count 0x0000055c
+#define AOFF_task_link_count 0x00000564
#define ASIZ_task_link_count 0x00000004
-#define AOFF_task_tty 0x00000560
+#define AOFF_task_tty 0x00000568
#define ASIZ_task_tty 0x00000008
-#define AOFF_task_semundo 0x00000568
+#define AOFF_task_semundo 0x00000570
#define ASIZ_task_semundo 0x00000008
-#define AOFF_task_semsleeping 0x00000570
+#define AOFF_task_semsleeping 0x00000578
#define ASIZ_task_semsleeping 0x00000008
#define AOFF_task_thread 0x00000580
#define ASIZ_task_thread 0x00000450
#define AOFF_task_it_virt_incr 0x00000168
#define ASIZ_task_it_virt_incr 0x00000008
#define AOFF_task_real_timer 0x00000170
-#define ASIZ_task_real_timer 0x00000028
-#define AOFF_task_times 0x00000198
+#define ASIZ_task_real_timer 0x00000030
+#define AOFF_task_times 0x000001a0
#define ASIZ_task_times 0x00000020
-#define AOFF_task_start_time 0x000001b8
+#define AOFF_task_start_time 0x000001c0
#define ASIZ_task_start_time 0x00000008
-#define AOFF_task_per_cpu_utime 0x000001c0
+#define AOFF_task_per_cpu_utime 0x000001c8
#define ASIZ_task_per_cpu_utime 0x00000100
-#define AOFF_task_min_flt 0x000003c0
+#define AOFF_task_min_flt 0x000003c8
#define ASIZ_task_min_flt 0x00000008
-#define AOFF_task_maj_flt 0x000003c8
+#define AOFF_task_maj_flt 0x000003d0
#define ASIZ_task_maj_flt 0x00000008
-#define AOFF_task_nswap 0x000003d0
+#define AOFF_task_nswap 0x000003d8
#define ASIZ_task_nswap 0x00000008
-#define AOFF_task_cmin_flt 0x000003d8
+#define AOFF_task_cmin_flt 0x000003e0
#define ASIZ_task_cmin_flt 0x00000008
-#define AOFF_task_cmaj_flt 0x000003e0
+#define AOFF_task_cmaj_flt 0x000003e8
#define ASIZ_task_cmaj_flt 0x00000008
-#define AOFF_task_cnswap 0x000003e8
+#define AOFF_task_cnswap 0x000003f0
#define ASIZ_task_cnswap 0x00000008
-#define AOFF_task_uid 0x000003f4
+#define AOFF_task_uid 0x000003fc
#define ASIZ_task_uid 0x00000004
-#define AOFF_task_euid 0x000003f8
+#define AOFF_task_euid 0x00000400
#define ASIZ_task_euid 0x00000004
-#define AOFF_task_suid 0x000003fc
+#define AOFF_task_suid 0x00000404
#define ASIZ_task_suid 0x00000004
-#define AOFF_task_fsuid 0x00000400
+#define AOFF_task_fsuid 0x00000408
#define ASIZ_task_fsuid 0x00000004
-#define AOFF_task_gid 0x00000404
+#define AOFF_task_gid 0x0000040c
#define ASIZ_task_gid 0x00000004
-#define AOFF_task_egid 0x00000408
+#define AOFF_task_egid 0x00000410
#define ASIZ_task_egid 0x00000004
-#define AOFF_task_sgid 0x0000040c
+#define AOFF_task_sgid 0x00000414
#define ASIZ_task_sgid 0x00000004
-#define AOFF_task_fsgid 0x00000410
+#define AOFF_task_fsgid 0x00000418
#define ASIZ_task_fsgid 0x00000004
-#define AOFF_task_ngroups 0x00000414
+#define AOFF_task_ngroups 0x0000041c
#define ASIZ_task_ngroups 0x00000004
-#define AOFF_task_groups 0x00000418
+#define AOFF_task_groups 0x00000420
#define ASIZ_task_groups 0x00000080
-#define AOFF_task_cap_effective 0x00000498
+#define AOFF_task_cap_effective 0x000004a0
#define ASIZ_task_cap_effective 0x00000004
-#define AOFF_task_cap_inheritable 0x0000049c
+#define AOFF_task_cap_inheritable 0x000004a4
#define ASIZ_task_cap_inheritable 0x00000004
-#define AOFF_task_cap_permitted 0x000004a0
+#define AOFF_task_cap_permitted 0x000004a8
#define ASIZ_task_cap_permitted 0x00000004
-#define AOFF_task_user 0x000004a8
+#define AOFF_task_user 0x000004b0
#define ASIZ_task_user 0x00000008
-#define AOFF_task_rlim 0x000004b0
+#define AOFF_task_rlim 0x000004b8
#define ASIZ_task_rlim 0x000000a0
-#define AOFF_task_used_math 0x00000550
+#define AOFF_task_used_math 0x00000558
#define ASIZ_task_used_math 0x00000002
-#define AOFF_task_comm 0x00000552
+#define AOFF_task_comm 0x0000055a
#define ASIZ_task_comm 0x00000010
-#define AOFF_task_link_count 0x00000564
+#define AOFF_task_link_count 0x0000056c
#define ASIZ_task_link_count 0x00000004
-#define AOFF_task_tty 0x00000568
+#define AOFF_task_tty 0x00000570
#define ASIZ_task_tty 0x00000008
-#define AOFF_task_semundo 0x00000570
+#define AOFF_task_semundo 0x00000578
#define ASIZ_task_semundo 0x00000008
-#define AOFF_task_semsleeping 0x00000578
+#define AOFF_task_semsleeping 0x00000580
#define ASIZ_task_semsleeping 0x00000008
-#define AOFF_task_thread 0x00000580
+#define AOFF_task_thread 0x00000590
#define ASIZ_task_thread 0x00000450
-#define AOFF_task_fs 0x000009d0
+#define AOFF_task_fs 0x000009e0
#define ASIZ_task_fs 0x00000008
-#define AOFF_task_files 0x000009d8
+#define AOFF_task_files 0x000009e8
#define ASIZ_task_files 0x00000008
-#define AOFF_task_sigmask_lock 0x000009e0
+#define AOFF_task_sigmask_lock 0x000009f0
#define ASIZ_task_sigmask_lock 0x0000000c
-#define AOFF_task_sig 0x000009f0
+#define AOFF_task_sig 0x00000a00
#define ASIZ_task_sig 0x00000008
-#define AOFF_task_signal 0x000009f8
+#define AOFF_task_signal 0x00000a08
#define ASIZ_task_signal 0x00000008
-#define AOFF_task_blocked 0x00000a00
+#define AOFF_task_blocked 0x00000a10
#define ASIZ_task_blocked 0x00000008
-#define AOFF_task_sigqueue 0x00000a08
+#define AOFF_task_sigqueue 0x00000a18
#define ASIZ_task_sigqueue 0x00000008
-#define AOFF_task_sigqueue_tail 0x00000a10
+#define AOFF_task_sigqueue_tail 0x00000a20
#define ASIZ_task_sigqueue_tail 0x00000008
-#define AOFF_task_sas_ss_sp 0x00000a18
+#define AOFF_task_sas_ss_sp 0x00000a28
#define ASIZ_task_sas_ss_sp 0x00000008
-#define AOFF_task_sas_ss_size 0x00000a20
+#define AOFF_task_sas_ss_size 0x00000a30
#define ASIZ_task_sas_ss_size 0x00000008
-#define AOFF_task_parent_exec_id 0x00000a28
+#define AOFF_task_parent_exec_id 0x00000a38
#define ASIZ_task_parent_exec_id 0x00000004
-#define AOFF_task_self_exec_id 0x00000a2c
+#define AOFF_task_self_exec_id 0x00000a3c
#define ASIZ_task_self_exec_id 0x00000004
-#define AOFF_task_exit_sem 0x00000a30
+#define AOFF_task_exit_sem 0x00000a40
#define ASIZ_task_exit_sem 0x00000040
-#define ASIZ_task 0x00000a70
+#define ASIZ_task 0x00000a80
#define AOFF_mm_mmap 0x00000000
#define ASIZ_mm_mmap 0x00000008
#define AOFF_mm_mmap_avl 0x00000008
struct inet_skb_parm
{
struct ip_options opt; /* Compiled IP options */
- u16 redirport; /* Redirect port */
unsigned char flags;
#define IPSKB_MASQUERADED 1
DPRINTK("clip_pop(vcc %p)\n",vcc);
CLIP_VCC(vcc)->old_pop(vcc,skb);
/* skb->dev == NULL in outbound ARP packets */
- if (atm_may_send(vcc,0) && skb->dev) {
- skb->dev->tbusy = 0;
- mark_bh(NET_BH);
- }
+ if (atm_may_send(vcc,0) && skb->dev)
+ netif_wake_queue(skb->dev);
}
((u16 *) here)[3] = skb->protocol;
}
atomic_add(skb->truesize,&vcc->tx_inuse);
- dev->tbusy = !atm_may_send(vcc,0);
+ if (!atm_may_send(vcc,0))
+ netif_stop_queue(dev);
ATM_SKB(skb)->iovcnt = 0;
ATM_SKB(skb)->atm_options = vcc->atm_options;
entry->vccs->last_use = jiffies;
projects / history.git / commitdiff