#define EE_DATA_READ 0x80 /* EEPROM chip data out, in reg. 17. */
/* Delay between EEPROM clock transitions. */
-#define eeprom_delay() do {} while (0);
+#define eeprom_delay() do { } while (0)
/* The EEPROM commands include the alway-set leading bit. */
#define EE_WRITE_CMD (5 << 6)
struct pci_dev *pdev)
{
struct pcnet32_private *lp;
- struct resource *res;
dma_addr_t lp_dma_addr;
int i, media;
int fdx, mii, fset, dxsuflo, ltint;
}
dev->base_addr = ioaddr;
- res = request_region(ioaddr, PCNET32_TOTAL_SIZE, chipname);
- if (!res)
+ if (request_region(ioaddr, PCNET32_TOTAL_SIZE, chipname) == NULL)
return -EBUSY;
/* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */
if ((lp = pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL) {
- release_resource(res);
+ release_region(ioaddr, PCNET32_TOTAL_SIZE);
return -ENOMEM;
}
if (!a) {
printk(KERN_ERR PFX "No access methods\n");
pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
- release_resource(res);
+ release_region(ioaddr, PCNET32_TOTAL_SIZE);
return -ENODEV;
}
lp->a = *a;
else {
printk(", failed to detect IRQ line.\n");
pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr);
- release_resource(res);
+ release_region(ioaddr, PCNET32_TOTAL_SIZE);
return -ENODEV;
}
}
return -ENODEV;
}
- if (check_region(dev->base_addr, hw->io_extent)) {
+ if (!request_region(dev->base_addr, hw->io_extent, dev->name)) {
return -EAGAIN;
}
- request_region(dev->base_addr, hw->io_extent, dev->name);
-
hw->board.chanA.ctrlio=dev->base_addr + 5;
hw->board.chanA.dataio=dev->base_addr + 7;
return -EBUSY;
i = wd_probe1(dev, base_addr);
if (i != 0)
- release_resource(r);
+ release_region(base_addr, WD_IO_EXTENT);
else
r->name = dev->name;
return i;
r->name = dev->name;
return 0;
}
- release_resource(r);
+ release_region(ioaddr, WD_IO_EXTENT);
}
return -ENODEV;