VERSION = 1
PATCHLEVEL = 2
-SUBLEVEL = 3
+SUBLEVEL = 4
ARCH = i386
cd /usr/include
rm -rf linux
rm -rf asm
- ln -s /usr/src/linux/include/linux .
- ln -s /usr/src/linux/include/asm-i386 .
+ ln -s /usr/src/linux/include/linux linux
+ ln -s /usr/src/linux/include/asm-i386 asm
- make sure you have no stale .o files and dependencies lying around:
must *not* configure your kernel for AZTECH support. But you need to have
the ISO9660-filesystem included! So rebuild your kernel, if necessary.
-Now edit the base adress of your AZTECH interface card in
+Now edit the base address of your AZTECH interface card in
/usr/src/linux/include/linux/aztcd.h to the appropriate value. Then change
to /usr/src/linux and do a
make modules
* NR_REQUEST is the number of entries in the request-queue.
* NOTE that writes may use only the low 2/3 of these: reads
* take precedence.
- *
- * 32 seems to be a reasonable number: enough to get some benefit
- * from the elevator-mechanism, but not so much as to lock a lot of
- * buffers when they are in the queue. 64 seems to be too many (easily
- * long pauses in reading when heavy writing/syncing is going on)
*/
#define NR_REQUEST 64
static void setup_DMA(void)
{
#ifdef CONFIG_FLOPPY_SANITY
+ if (raw_cmd.length == 0){
+ int i;
+
+ printk("zero dma transfer size:");
+ for(i=0; i< raw_cmd.cmd_count; i++)
+ printk("%x,", raw_cmd.cmd[i]);
+ printk("\n");
+ cont->done(0);
+ FDCS->reset = 1;
+ return;
+ }
if ((!CURRENT ||
CURRENT->buffer != current_addr ||
raw_cmd.length > 512 * CURRENT->nr_sectors) &&
* This means we should be able to read a sector even if there
* are other bad sectors on this track.
*/
- if ((indirect - sector_t) * 2 > (direct - sector_t) * 3 &&
- *errors < DP->max_errors.read_track &&
- /*!TESTF( FD_NEED_TWADDLE) &&*/
- ( ( !probing || (DP->read_track &
- (1 <<DRS->probed_format))))){
+ if (!direct ||
+ (indirect * 2 > direct * 3 &&
+ *errors < DP->max_errors.read_track &&
+ /*!TESTF( FD_NEED_TWADDLE) &&*/
+ ((!probing || (DP->read_track&(1<<DRS->probed_format)))))){
max_size = CURRENT->nr_sectors;
} else {
current_addr = CURRENT->buffer;
raw_cmd.length = current_count_sectors << 9;
+ if (raw_cmd.length == 0){
+ DPRINT("zero dma transfer attempted from make_raw_request\n");
+ DPRINT3("indirect=%d direct=%d sector_t=%d",
+ indirect, direct, sector_t);
+ return 0;
+ }
return 2;
}
}
printk("bytes=%ld\n", raw_cmd.length >> 9 );
printk("sectors=%ld\n", current_count_sectors);
}
+ if (raw_cmd.length == 0){
+ DPRINT("zero dma transfer attempted from make_raw_request\n");
+ return 0;
+ }
#endif
return 2;
}
if (raw_cmd.flags & (FD_RAW_WRITE | FD_RAW_READ)){
if(count > max_buffer_sectors * 1024 )
return -ENOMEM;
+ if(count == 0){
+ printk("attempt to do a 0 byte dma transfer\n");
+ return -EINVAL;
+ }
buffer_track = -1;
}
if ( raw_cmd.flags & FD_RAW_WRITE ){
int target;
target = DEVICE_NR(inode->i_rdev);
+ if (target >= NR_HD)
+ return -ENODEV;
while (busy[target])
sleep_on(&busy_wait);
access_count[target]++;
*/
int * hardsect_size[MAX_BLKDEV] = { NULL, NULL, };
+/*
+ * "plug" the device if there are no outstanding requests: this will
+ * force the transfer to start only after we have put all the requests
+ * on the list.
+ */
+static void plug_device(struct blk_dev_struct * dev, struct request * plug)
+{
+ unsigned long flags;
+
+ plug->dev = -1;
+ plug->cmd = -1;
+ plug->next = NULL;
+ save_flags(flags);
+ cli();
+ if (!dev->current_request)
+ dev->current_request = plug;
+ restore_flags(flags);
+}
+
+/*
+ * remove the plug and let it rip..
+ */
+static void unplug_device(struct blk_dev_struct * dev)
+{
+ struct request * req;
+ unsigned long flags;
+
+ save_flags(flags);
+ cli();
+ req = dev->current_request;
+ if (req && req->dev == -1 && req->cmd == -1) {
+ dev->current_request = req->next;
+ (dev->request_fn)();
+ }
+ restore_flags(flags);
+}
+
/*
* look for a free request in the first N entries.
* NOTE: interrupts must be disabled on the way in, and will still
{
register struct request *req;
- while ((req = get_request(n, dev)) == NULL)
+ while ((req = get_request(n, dev)) == NULL) {
+ unplug_device(MAJOR(dev)+blk_dev);
sleep_on(&wait_for_request);
+ }
return req;
}
unlock_buffer(bh);
return;
}
+ unplug_device(major+blk_dev);
sleep_on(&wait_for_request);
sti();
goto repeat;
{
unsigned int major;
struct request plug;
- int plugged;
int correct_size;
struct blk_dev_struct * dev;
int i;
from starting until we have shoved all of the blocks into the
queue, and then we let it rip. */
- plugged = 0;
- cli();
- if (!dev->current_request && nr > 1) {
- dev->current_request = &plug;
- plug.dev = -1;
- plug.next = NULL;
- plugged = 1;
- }
- sti();
+ if (nr > 1)
+ plug_device(dev, &plug);
for (i = 0; i < nr; i++) {
if (bh[i]) {
bh[i]->b_req = 1;
kstat.pgpgout++;
}
}
- if (plugged) {
- cli();
- dev->current_request = plug.next;
- (dev->request_fn)();
- sti();
- }
+ unplug_device(dev);
return;
sorry:
About the jumpers: On my PC130 there is one more jumper, located near the
cable-connector and it's for changing to star or bus topology;
closed: star - open: bus
- On the PC500 are some more jumper-pins, one block labled with RX,PDN,TXI
+ On the PC500 are some more jumper-pins, one block labeled with RX,PDN,TXI
and another with ALE,LA17,LA18,LA19 these are undocumented..
[...more parts deleted...]
values, as of v0.14, are only from 0x200 through 0x3F0. (If your card
has additional ones, which is possible, please tell me.) This should not
be the same as any other device on your system. Supposedly MS Windows
- prefers values of 0x300 or more, eating netconnections on my system
+ prefers values of 0x300 or more, eating net connections on my system
otherwise.
- Avery's favourite: 0x300.
The eight switches in group S2 are used to set the node ID.
Each node attached to the network must have an unique node ID which
-must be diffrent from 0.
+must be different from 0.
Switch 1 serves as the least significant bit (LSB).
The node ID is the sum of the values of all switches set to "1"
----------------------------
The first three switches in switch group S1 are used to select one
-of eight possible I/O Base addresses using the followig table
+of eight possible I/O Base addresses using the following table
Switch | Hex I/O
-------|--------
0 0 0 | 260
0 0 1 | 290
- 0 1 0 | 2E0 (Manufactor's default)
+ 0 1 0 | 2E0 (Manufacturer's default)
0 1 1 | 2F0
1 0 0 | 300
1 0 1 | 350
0 1 0 1 0 | CD000 | CE000
0 1 0 1 1 | CD800 | CE000
| |
- 0 1 1 0 0 | D0000 | D2000 (Manufactor's default)
+ 0 1 1 0 0 | D0000 | D2000 (Manufacturer's default)
0 1 1 0 1 | D0800 | D2000
0 1 1 1 0 | D1000 | D2000
0 1 1 1 1 | D1800 | D2000
Refer to the COM9026 Data Sheet for alternate configurations.
To select a hardware interrupt level set one (only one!) of the jumpers
-IRQ2, IRQ3, IRQ4, IRQ5, IRQ7. The Manufactor's default is IRQ2.
+IRQ2, IRQ3, IRQ4, IRQ5, IRQ7. The manufacturer's default is IRQ2.
Configuring the PC130E for Star or Bus Topology
-------|------------------- ---------|-------------------
on | normal activity flash/on | data transfer
blink | reconfiguration off | no data transfer;
- off | defectiv board or | incorect memory or
+ off | defective board or | incorrect memory or
| node ID is zero | I/O address
The eight switches in group SW3 are used to set the node ID. Each node
attached to the network must have an unique node ID which must be
-diffrent from 0.
+different from 0.
Switch 1 serves as the least significant bit (LSB).
The node ID is the sum of the values of all switches set to "1"
----------------------------
The first six switches in switch group SW1 are used to select one
-of 32 possible I/O Base addresses using the followig table
+of 32 possible I/O Base addresses using the following table
Switch | Hex I/O
6 5 4 3 2 1 | Address
0 1 1 0 1 1 | 2B0
0 1 1 1 0 0 | 2C0
0 1 1 1 0 1 | 2D0
- 0 1 1 1 1 0 | 2E0 (Manufactor's default)
+ 0 1 1 1 1 0 | 2E0 (Manufacturer's default)
0 1 1 1 1 1 | 2F0
1 1 0 0 0 0 | 300
1 1 0 0 0 1 | 310
-------|------------------- ---------|-------------------
on | normal activity flash/on | data transfer
blink | reconfiguration off | no data transfer;
- off | defectiv board or | incorect memory or
+ off | defective board or | incorrect memory or
| node ID is zero | I/O address
DIP Switches:
- The dipswitches accessible on the accessible end of the card while
+ The dip switches accessible on the accessible end of the card while
it is installed, is used to set the arcnet address. There are 8
switches. Use an address from 1 to 254.
-------------------
The eight switches in SW2 are used to set the node ID. Each node attached
-to the network must have an unique node ID which must be diffrent from 0.
+to the network must have an unique node ID which must be different from 0.
Switch 1 (ID0) serves as the least significant bit (LSB).
The node ID is the sum of the values of all switches set to "1"
----------------------------
The last three switches in switch block SW1 are used to select one
-of eight possible I/O Base addresses using the followig table
+of eight possible I/O Base addresses using the following table
Switch | Hex I/O
------------|--------
ON ON ON | 260
OFF ON ON | 290
- ON OFF ON | 2E0 (Manufactor's default)
+ ON OFF ON | 2E0 (Manufacturer's default)
OFF OFF ON | 2F0
ON ON OFF | 300
OFF ON OFF | 350
ON ON ON ON ON | C0000 | C2000
ON ON OFF ON ON | C4000 | C6000
ON ON ON OFF ON | CC000 | CE000
- ON ON OFF OFF ON | D0000 | D2000 (Manufactor's default)
+ ON ON OFF OFF ON | D0000 | D2000 (Manufacturer's default)
ON ON ON ON OFF | D4000 | D6000
ON ON OFF ON OFF | D8000 | DA000
ON ON ON OFF OFF | DC000 | DE000
Note: Since the switches 1 and 2 are always set to ON it may be possible
that they can be used to add an offset of 2K, 4K or 6K to the base
address, but this feature is not documented in the manual and I
- haven't testet it yet.
+ haven't tested it yet.
Setting the Interrupt Line
-------------------
The eight switches in SW2 are used to set the node ID. Each node attached
-to the network must have an unique node ID which must be diffrent from 0.
+to the network must have an unique node ID which must be different from 0.
Switch 1 (ID0) serves as the least significant bit (LSB).
The node ID is the sum of the values of all switches set to "1"
----------------------------
The first six switches in switch block SW1 are used to select the I/O Base
-address using the followig table:
+address using the following table:
Switch | Hex I/O
1 2 3 4 5 6 | Address
------------------------|--------
OFF ON ON OFF OFF ON | 260
OFF ON OFF ON ON OFF | 290
- OFF ON OFF OFF OFF ON | 2E0 (Manufactor's default)
+ OFF ON OFF OFF OFF ON | 2E0 (Manufacturer's default)
OFF ON OFF OFF OFF OFF | 2F0
OFF OFF ON ON ON ON | 300
OFF OFF ON OFF ON OFF | 350
13 | 2 (=9) Default!
Note: - Do not use JP11=IRQ6, it may conflict with your Floppy Disk
- Controler
+ Controller
- Use JP3=IRQ14 only, if you don't have an IDE-, MFM-, or RLL-
- Hard Disk, it may conflict with their controlers
+ Hard Disk, it may conflict with their controllers
Setting the Timeout Parameters
===================
I have named this ARCnet card "NONAME", since there is no name of any
-manufactor on the Installation manual nor on the shipping box. The only
-hint to the existence of a manufactor at all is written into cupper,
+manufacturer on the Installation manual nor on the shipping box. The only
+hint to the existence of a manufacturer at all is written into copper,
it is "Made in Taiwan"
This description has been written by Juergen Seifert <seifert@htwm.de>
ROM ROM Enable Select
CN RG62 Coax Connector
STAR| BUS | T/P Three fields for placing a sign (colored circle)
- indicating the topologie of the card
+ indicating the topology of the card
Setting one of the switches to Off means "1", On means "0".
The eight switches in group SW1 are used to set the node ID.
Each node attached to the network must have an unique node ID which
-must be diffrent from 0.
+must be different from 0.
Switch 8 serves as the least significant bit (LSB).
The node ID is the sum of the values of all switches set to "1"
----------------------------
The first three switches in switch group SW2 are used to select one
-of eight possible I/O Base addresses using the followig table
+of eight possible I/O Base addresses using the following table
Switch | Hex I/O
1 2 3 | Address
------------|--------
ON ON ON | 260
ON ON OFF | 290
- ON OFF ON | 2E0 (Manufactor's default)
+ ON OFF ON | 2E0 (Manufacturer's default)
ON OFF OFF | 2F0
OFF ON ON | 300
OFF ON OFF | 350
0 1 0 1 0 | CD000 | CE000
0 1 0 1 1 | CD800 | CE000
| |
- 0 1 1 0 0 | D0000 | D2000 (Manufactor's default)
+ 0 1 1 0 0 | D0000 | D2000 (Manufacturer's default)
0 1 1 0 1 | D0800 | D2000
0 1 1 1 0 | D1000 | D2000
0 1 1 1 1 | D1800 | D2000
-------------------------------------
To select a hardware interrupt level set one (only one!) of the jumpers
-IRQ2, IRQ3, IRQ4, IRQ5 or IRQ7. The Manufactor's default is IRQ2.
+IRQ2, IRQ3, IRQ4, IRQ5 or IRQ7. The manufacturer's default is IRQ2.
Setting the Timeouts
--------------------
The two jumpers labeled ET1 and ET2 are used to determine the timeout
-parameters (respons and reconfiguration time). Every node in a network
+parameters (response and reconfiguration time). Every node in a network
must be set to the same timeout values.
ET1 ET2 | Response Time (us) | Reconfiguration Time (ms)
of a 16-Bit Coax / Twisted Pair Card. This description is incomplete,
because there are missing two pages in the manual booklet. (The table
of contents reports pages ... 2-9, 2-11, 2-12, 3-1, ... but inside
-the booklet there is a diffrent way of counting ... 2-9, 2-10, A-1,
+the booklet there is a different way of counting ... 2-9, 2-10, A-1,
(empty page), 3-1, ..., 3-18, A-1 (again), A-2)
Also the picture of the board layout is not as good as the picture of
8-Bit card, because there isn't any letter like "SW1" written to the
The eight switches in group SW2 are used to set the node ID.
Each node attached to the network must have an unique node ID which
-must be diffrent from 0.
+must be different from 0.
Switch 8 serves as the least significant bit (LSB).
The node ID is the sum of the values of all switches set to "1"
----------------------------
The first three switches in switch group SW1 are used to select one
-of eight possible I/O Base addresses using the followig table
+of eight possible I/O Base addresses using the following table
Switch | Hex I/O
3 2 1 | Address
------------|--------
ON ON ON | 260
ON ON OFF | 290
- ON OFF ON | 2E0 (Manufactor's default)
+ ON OFF ON | 2E0 (Manufacturer's default)
ON OFF OFF | 2F0
OFF ON ON | 300
OFF ON OFF | 350
0 1 0 1 0 | CD000 | CE000
0 1 0 1 1 | CD800 | CE000
| |
- 0 1 1 0 0 | D0000 | D2000 (Manufactor's default)
+ 0 1 1 0 0 | D0000 | D2000 (Manufacturer's default)
0 1 1 0 1 | D0800 | D2000
0 1 1 1 0 | D1000 | D2000
0 1 1 1 1 | D1800 | D2000
* but WE MUST GET RID OF IT BEFORE SENDING A
* PACKET!!
*/
- u_char saddr; /* Source address - neccesary for IPX protocol */
+ u_char saddr; /* Source address - necessary for IPX protocol */
/* data that IS part of real packet */
u_char protocol_id, /* ARC_P_IP, ARC_P_ARP, or ARC_P_RARP */
-#define rw_bugfix
/* ne.c: A general non-shared-memory NS8390 ethernet driver for linux. */
/*
Written 1992-94 by Donald Becker.
encountering problems that it is still here. If you see
this message you either 1) have a slightly incompatible clone
or 2) have noise/speed problems with your bus. */
+#ifdef CONFIG_NE_SANITY
if (ei_debug > 1) { /* DMA termination address check... */
int addr, tries = 20;
do {
"%#4.4x (expected) vs. %#4.4x (actual).\n",
dev->name, ring_offset + xfer_count, addr);
}
+#endif
ei_status.dmaing &= ~0x01;
return ring_offset + count;
}
SLOW_DOWN_IO;
#endif /* rw_bugfix */
- /* Now the normal output. */
+ /*
+ Now the normal output. I believe that if we don't lock this, a
+ race condition will munge the remote byte count values, and then
+ the ne2k will hang the machine by holding I/O CH RDY because it
+ expects more data. Hopefully fixes the lockups. -- Paul Gortmaker.
+ */
+
+ cli();
outb_p(count & 0xff, nic_base + EN0_RCNTLO);
outb_p(count >> 8, nic_base + EN0_RCNTHI);
outb_p(0x00, nic_base + EN0_RSARLO);
} else {
outsb(NE_BASE + NE_DATAPORT, buf, count);
}
+ sti();
+#ifdef CONFIG_NE_SANITY
/* This was for the ALPHA version only, but enough people have
encountering problems that it is still here. */
if (ei_debug > 1) { /* DMA termination address check... */
goto retry;
}
}
+#endif
ei_status.dmaing &= ~0x02;
return;
}
save_flags (processor_flags);
cli();
if (SCpnt->request.dev == dev) sleep_on( &(STp->waiting) );
- restore_flags(flags);
+ restore_flags(processor_flags);
if ((STp->buffer)->last_result_fatal != 0) {
#ifdef DEBUG
========================================
- Zero the partial block following the end of the file when a file
is truncated.
- - Dates updated in the copyrigth.
+ - Dates updated in the copyright.
- More checks when the filesystem is mounted: the count of blocks,
fragments, and inodes per group is checked against the block size.
- The buffers used by the error routines are now static variables, to
/*
* If the file is not being truncated to a block boundary, the
* contents of the partial block following the end of the file must be
- * zero'ed in case it ever become accessible again because of
+ * zeroed in case it ever becomes accessible again because of
* subsequent file growth.
*/
offset = inode->i_size % inode->i_sb->s_blocksize;
/* The code page info pointed to by the spare block consists of an index
- block and blocks containing character maps. The following is pretty
- sketchy, but Linux doesn't use code pages so it doesn't matter. */
+ block and blocks containing uppercasing tables. I don't know what
+ these are for (CHKDSK, maybe?) -- OS/2 does not seem to use them
+ itself. Linux doesn't use them either. */
/* block pointed to by spareblock->code_page_dir */
unsigned short ix; /* index */
unsigned short code_page_number; /* code page number */
unsigned short zero1;
- unsigned char map[128]; /* map for chars 80..ff */
+ unsigned char map[128]; /* upcase table for chars 80..ff */
unsigned short zero2;
} code_page[3];
unsigned char incognita[78];
time_t creation_date; /* ctime */
unsigned ea_size; /* total EA length, bytes */
unsigned char zero1;
- unsigned char locality; /* 0=unk 1=seq 2=random 3=both */
+ unsigned char ix; /* code page index (of filename), see
+ struct code_page_data */
unsigned char namelen, name[1]; /* file name */
/* dnode_secno down; btree down pointer, if present,
follows name on next word boundary, or maybe it
necessary case folding this is impossible.)
There is a map from Latin-1 into code page 850 for every printing
- character in Latin-1. Most, maybe all, OS/2 installations have code
- page 850 available, and surely all (on PC hardware) have 437 available.
+ character in Latin-1. The NLS documentation of OS/2 shows that
+ everybody has 850 available unless they don't have Western latin
+ chars available at all (so fitting them to Linux without Unicode
+ is a doomed exercise).
It is not clear exactly how HPFS.IFS handles the situation when
multiple code pages are in use. Experiments show that
This means, I think, that HPFS.IFS operates in the current code
page, without regard to the uppercasing information recorded in
the tables on the disk. It does record the uppercasing rules
- it used, perhaps for alien operating systems such as us, but it
- does not appear to use them itself.
+ it used, perhaps for CHKDSK, but it does not appear to use them
+ itself.
So: Linux, a Latin-1 system, will operate in code page 850. We
recode between 850 and Latin-1 when dealing with the names actually
};
#endif
+#define A_GRAVE 0300
+#define THORN 0336
+#define MULTIPLY 0327
+#define a_grave 0340
+#define thorn 0376
+#define divide 0367
+
static inline unsigned latin1_upcase (unsigned c)
{
- if (c - (unsigned char) 'a' <= (unsigned char) 'z' - (unsigned char) 'a'
- || (c - (unsigned char) '`' <= (unsigned char) '~' - (unsigned char) '`'
- && c != (unsigned char) 'w'))
- return c - (unsigned char) 'a' + (unsigned char) 'A';
+ if (c - 'a' <= 'z' - 'a'
+ || (c - a_grave <= thorn - a_grave
+ && c != divide))
+ return c - 'a' + 'A';
else
return c;
}
static inline unsigned latin1_downcase (unsigned c)
{
- if (c - (unsigned char) 'A' <= (unsigned char) 'Z' - (unsigned char) 'A'
- || (c - (unsigned char) '@' <= (unsigned char) '^' - (unsigned char) '@'
- && c != (unsigned char) 'W'))
- return c + (unsigned char) 'a' - (unsigned char) 'A';
+ if (c - 'A' <= 'Z' - 'A'
+ || (c - A_GRAVE <= THORN - A_GRAVE
+ && c != MULTIPLY))
+ return c + 'a' - 'A';
else
return c;
}
case 0:
mode |= S_IFREG;
break;
- case S_IFREG: case S_IFCHR: case S_IFBLK: case S_IFIFO:
+ case S_IFREG: case S_IFCHR: case S_IFBLK: case S_IFIFO: case S_IFSOCK:
break;
default:
return -EINVAL;
a = avenrun[0] + (FIXED_1/200);
b = avenrun[1] + (FIXED_1/200);
c = avenrun[2] + (FIXED_1/200);
- return sprintf(buffer,"%d.%02d %d.%02d %d.%02d\n",
+ return sprintf(buffer,"%d.%02d %d.%02d %d.%02d %d/%d\n",
LOAD_INT(a), LOAD_FRAC(a),
LOAD_INT(b), LOAD_FRAC(b),
- LOAD_INT(c), LOAD_FRAC(c));
+ LOAD_INT(c), LOAD_FRAC(c),
+ nr_running, nr_tasks);
}
static int get_kstat(char * buffer)
#define PCI_VENDOR_ID_ADAPTEC 0x9004
#define PCI_DEVICE_ID_ADAPTEC_2940 0x7178
+#define PCI_DEVICE_ID_ADAPTEC_294x 0x7078
#define PCI_VENDOR_ID_DPT 0x1044
#define PCI_DEVICE_ID_DPT 0xa400
#define PCI_DEVICE_ID_UMC_UM8881F 0x8881
#define PCI_DEVICE_ID_UMC_UM8891A 0x0891
#define PCI_DEVICE_ID_UMC_UM8886F 0x8886
-#define PCI_DEVICE_ID_UMC_UM8673F 0x0101
+#define PCI_DEVICE_ID_UMC_UM8673F 0x886a
#define PCI_VENDOR_ID_DEC 0x1011
#define PCI_DEVICE_ID_DEC_TULIP 0x0002
#define PCI_DEVICE_ID_WEITEK_P9100 0x9100
#define PCI_VENDOR_ID_CIRRUS 0x1013
+#define PCI_DEVICE_ID_CIRRUS_5430 0x00A0
#define PCI_DEVICE_ID_CIRRUS_5434_4 0x00A4
#define PCI_DEVICE_ID_CIRRUS_5434_8 0x00A8
#define PCI_DEVICE_ID_CIRRUS_6729 0x1100
#define PCI_VENDOR_ID_BUSLOGIC 0x104B
#define PCI_DEVICE_ID_BUSLOGIC_946C 0x1040
+#define PCI_DEVICE_ID_BUSLOGIC_946C_2 0x0140
#define PCI_VENDOR_ID_N9 0x105D
#define PCI_DEVICE_ID_N9_I128 0x2309
#define PCI_DEVICE_ID_AI_M1435 0x1435
#define PCI_VENDOR_ID_AL 0x10b9
+#define PCI_DEVICE_ID_AL_M1445 0x1445
#define PCI_DEVICE_ID_AL_M1449 0x1449
#define PCI_DEVICE_ID_AL_M1451 0x1451
#define PCI_DEVICE_ID_AL_M4803 0x5215
#define PCI_VENDOR_ID_VISION 0x1098
#define PCI_DEVICE_ID_VISION_QD8500 0x0001
+#define PCI_DEVICE_ID_VISION_QD8580 0x0002
#define PCI_VENDOR_ID_AMD 0x1022
#define PCI_DEVICE_ID_AMD_LANCE 0x2000
#define PCI_VENDOR_ID_CT 0x102c
#define PCI_DEVICE_ID_CT_65545 0x00d8
+#define PCI_VENDOR_ID_FUTUR 0x1036
+#define PCI_DEVICE_ID_FUTUR_18C30 0x0000
+
+#define PCI_VENDOR_ID_WINBOND 0x10ad
+#define PCI_DEVICE_ID_WINBOND_83769 0x0001
+
+#define PCI_VENDOR_ID_3COM 0x10b7
+#define PCI_DEVICE_ID_3COM_3C590 0x5900
+#define PCI_DEVICE_ID_3COM_3C595TX 0x5950
+#define PCI_DEVICE_ID_3COM_3C595T4 0x5951
+#define PCI_DEVICE_ID_3COM_3C595MII 0x5952
+
struct pci_vendor_type {
unsigned short vendor_id;
char *vendor_name;
};
-#define PCI_VENDOR_NUM 36
+#define PCI_VENDOR_NUM 39
#define PCI_VENDOR_TYPE { \
{PCI_VENDOR_ID_NCR, "NCR"}, \
{PCI_VENDOR_ID_ADAPTEC, "Adaptec"}, \
{PCI_VENDOR_ID_EF, "Efficient Networks"}, \
{PCI_VENDOR_ID_HER, "Hercules"}, \
{PCI_VENDOR_ID_ATRONICS, "Atronics"}, \
- {PCI_VENDOR_ID_CT, "Chips & Technologies"} \
+ {PCI_VENDOR_ID_CT, "Chips & Technologies"}, \
+ {PCI_VENDOR_ID_FUTUR, "Future Domain"},\
+ {PCI_VENDOR_ID_WINBOND, "Winbond"}, \
+ {PCI_VENDOR_ID_3COM, "3Com"} \
}
char *device_name;
};
-#define PCI_DEVICE_NUM 71
+#define PCI_DEVICE_NUM 82
#define PCI_DEVICE_TYPE { \
{0xff, PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, "53c810"}, \
{0xff, PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C815, "53c815"}, \
{0xff, PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C820, "53c820"}, \
{0xff, PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C825, "53c825"}, \
{0xff, PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_2940, "2940"}, \
+ {0xff, PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_294x, "294x"}, \
{0xff, PCI_VENDOR_ID_DPT, PCI_DEVICE_ID_DPT, "SmartCache/Raid"}, \
{0xff, PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_864_1, "Vision 864-P"}, \
{0xff, PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_864_2, "Vision 864-P"}, \
{0xff, PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_M64, "Mach 64"}, \
{0xff, PCI_VENDOR_ID_WEITEK, PCI_DEVICE_ID_WEITEK_P9000, "P9000"}, \
{0xff, PCI_VENDOR_ID_WEITEK, PCI_DEVICE_ID_WEITEK_P9100, "P9100"}, \
+ {0xff, PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5430, "GD 5430"}, \
{0xff, PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5434_4, "GD 5434"}, \
{0xff, PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5434_8, "GD 5434"}, \
{0xff, PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6729, "CL 6729"}, \
{0xff, PCI_VENDOR_ID_BUSLOGIC,PCI_DEVICE_ID_BUSLOGIC_946C, "946C"}, \
+ {0xff, PCI_VENDOR_ID_BUSLOGIC,PCI_DEVICE_ID_BUSLOGIC_946C_2, "946C"}, \
{0xff, PCI_VENDOR_ID_N9, PCI_DEVICE_ID_N9_I128, "Imagine 128"}, \
{0xff, PCI_VENDOR_ID_AI, PCI_DEVICE_ID_AI_M1435, "M1435"}, \
+ {0xff, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1445, "M1445"}, \
{0xff, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1449, "M1449"}, \
{0xff, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1451, "M1451"}, \
{0xff, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M4803, "MS4803"}, \
{0xff, PCI_VENDOR_ID_TSENG, PCI_DEVICE_ID_TSENG_W32P_c, "ET4000W32P rev C"}, \
{0xff, PCI_VENDOR_ID_TSENG, PCI_DEVICE_ID_TSENG_W32P_d, "ET4000W32P rev D"}, \
{0xff, PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_CMD_640, "640A"}, \
- {0xff, PCI_VENDOR_ID_VISION, PCI_DEVICE_ID_VISION_QD8500, "QD-8500PCI"}, \
+ {0xff, PCI_VENDOR_ID_VISION, PCI_DEVICE_ID_VISION_QD8500, "QD-8500"}, \
+ {0xff, PCI_VENDOR_ID_VISION, PCI_DEVICE_ID_VISION_QD8580, "QD-8580"}, \
{0xff, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, "79C970"}, \
{0xff, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SCSI, "53C974"}, \
{0xff, PCI_VENDOR_ID_VLSI, PCI_DEVICE_ID_VLSI_82C593, "82C593-FC1"}, \
{0xff, PCI_VENDOR_ID_EF, PCI_DEVICE_ID_EF_ATM, "155P-MF1"}, \
{0xff, PCI_VENDOR_ID_HER, PCI_DEVICE_ID_HER_STING, "Stingray"}, \
{0xff, PCI_VENDOR_ID_ATRONICS, PCI_DEVICE_ID_ATRONICS_2015, "IDE-2015PL"}, \
- {0xff, PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_65545, "65545"} \
+ {0xff, PCI_VENDOR_ID_CT, PCI_DEVICE_ID_CT_65545, "65545"}, \
+ {0xff, PCI_VENDOR_ID_FUTUR, PCI_DEVICE_ID_FUTUR_18C30, "TMC-18C30"}, \
+ {0xff, PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83769, "W83769F"}, \
+ {0xff, PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C590, "3C590 10bT"}, \
+ {0xff, PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C595TX, "3C595 100bTX"}, \
+ {0xff, PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C595T4, "3C595 100bT4"}, \
+ {0xff, PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C595MII, "3C595 100b-MII"} \
}
/* An item of this structure has the following meaning */
#define CT_TO_SECS(x) ((x) / HZ)
#define CT_TO_USECS(x) (((x) % HZ) * 1000000/HZ)
+extern int nr_running, nr_tasks;
+
#define FIRST_TASK task[0]
#define LAST_TASK task[NR_TASKS-1]
}
for (i=1 ; i<NR_TASKS ; i++)
if (task[i] == p) {
+ nr_tasks--;
task[i] = NULL;
REMOVE_LINKS(p);
if (STACK_MAGIC != *(unsigned long *)p->kernel_stack_page)
#include <asm/segment.h>
#include <asm/system.h>
+int nr_tasks=1;
+int nr_running=1;
long last_pid=0;
static int find_empty_process(void)
p->mm->swappable = 0; /* don't try to swap it out before it's set up */
task[nr] = p;
SET_LINKS(p);
+ nr_tasks++;
/* copy all the process information */
copy_thread(nr, clone_flags, usp, p, regs);
bad_fork_cleanup:
task[nr] = NULL;
REMOVE_LINKS(p);
+ nr_tasks--;
bad_fork_free:
free_page(new_stack);
free_page((long) p);
#include <linux/net.h>
#include <linux/netdevice.h>
#include <linux/ip.h>
+#include <linux/tcp.h>
#include "../net/inet/protocol.h"
#include "../net/inet/arp.h"
+#include "../drivers/net/slhc.h"
#endif
#ifdef CONFIG_PCI
#include <linux/pci.h>
#ifdef CONFIG_INET
X(inet_add_protocol),
X(inet_del_protocol),
+ X(slhc_init),
+ X(slhc_free),
+ X(slhc_remember),
+ X(slhc_compress),
+ X(slhc_uncompress),
#endif
/* Device callback registration */
X(register_netdevice_notifier),
itimer_next = ~0;
sti();
need_resched = 0;
+ nr_running = 0;
p = &init_task;
for (;;) {
if ((p = p->next_task) == &init_task)
for (;;) {
if ((p = p->next_task) == &init_task)
goto confuse_gcc2;
- if (p->state == TASK_RUNNING && p->counter > c)
- c = p->counter, next = p;
+ if (p->state == TASK_RUNNING) {
+ nr_running++;
+ if (p->counter > c)
+ c = p->counter, next = p;
+ }
}
confuse_gcc2:
if (!c) {
panic("task[0] (swapper) doesn't support exec()\n");
page_dir = pgd_offset(tsk, 0);
if (!page_dir || page_dir == swapper_pg_dir) {
- printk("Trying to clear kernel page-directory: not good\n");
+ printk("%s trying to clear kernel page-directory: not good\n", tsk->comm);
return;
}
if (pgd_inuse(page_dir)) {
}
page_dir = pgd_offset(tsk, 0);
if (!page_dir || page_dir == swapper_pg_dir) {
- printk("Trying to free kernel page-directory: not good\n");
+ printk("%s trying to free kernel page-directory: not good\n", tsk->comm);
return;
}
SET_PAGE_DIR(tsk, swapper_pg_dir);
int loop, counter;
struct task_struct *p;
- counter = 2*NR_TASKS >> priority;
+ counter = 2*nr_tasks >> priority;
for(; counter >= 0; counter--) {
/*
* Check that swap_task is suitable for swapping. If not, look for
*/
len = dev->hard_header_len + sizeof(struct iphdr) + sizeof(struct icmphdr) +
- sizeof(struct iphdr) + 8; /* amount of header to return */
+ sizeof(struct iphdr) + 32; /* amount of header to return */
skb = (struct sk_buff *) alloc_skb(len, GFP_ATOMIC);
if (skb == NULL)
* Bjorn Ekwall : Removed ip_csum (from slhc.c too)
* Bjorn Ekwall : Moved ip_fast_csum to ip.h (inline!)
* Stefan Becker : Send out ICMP HOST REDIRECT
+ * Alan Cox : Only send ICMP_REDIRECT if src/dest are the same net.
*
*
* To Fix:
* arrived upon. We now generate an ICMP HOST REDIRECT giving the route
* we calculated.
*/
-#ifdef IP_NO_ICMP_REDIRECT
+#ifdef CONFIG_IP_NO_ICMP_REDIRECT
if (dev == dev2)
return;
#else
- if (dev == dev2)
+ if (dev == dev2 && (iph->saddr&dev->pa_mask) == (iph->daddr & dev->pa_mask))
icmp_send(skb, ICMP_REDIRECT, ICMP_REDIR_HOST, raddr, dev);
#endif
/* Hopefully, most cases */
if (in_offset == out_offset) {
+ skb->len += out_offset;
+ skb->arp = skb->free = 1;
return skb;
}
skb->h.raw = &(skb->data[out_offset]);
memmove(skb->h.raw, oldraw, skb->len);
skb->len += out_offset;
+ skb->arp = skb->free = 1;
return skb;
}
}
}
+ if (ipx->ipx_dest.net == 0L)
+ ipx->ipx_dest.net = intrfc->if_netnum;
+ if (ipx->ipx_source.net == 0L)
+ ipx->ipx_source.net = intrfc->if_netnum;
+
if (intrfc->if_netnum != ipx->ipx_dest.net) {
/* We only route point-to-point packets. */
if ((skb->pkt_type != PACKET_BROADCAST) &&
{
ipx_socket *sk=(ipx_socket *)sock->data;
struct sockaddr_ipx *sipx=(struct sockaddr_ipx *)sip;
- struct ipx_packet *ipx = NULL;
- /* FILL ME IN */
+ struct ipx_packet *ipx = NULL;
int copied = 0;
+ int truesize;
struct sk_buff *skb;
int er;
return er;
ipx = (ipx_packet *)(skb->h.raw);
- copied=ntohs(ipx->ipx_pktsize) - sizeof(ipx_packet);
+ truesize=ntohs(ipx->ipx_pktsize) - sizeof(ipx_packet);
+ copied = (truesize > size) ? size : truesize;
skb_copy_datagram(skb,sizeof(struct ipx_packet),ubuf,copied);
if(sipx)
sipx->sipx_type = ipx->ipx_type;
}
skb_free_datagram(skb);
- return(copied);
+ return(truesize);
}
static int ipx_write(struct socket *sock, char *ubuf, int size, int noblock)
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