only select this option if you have hardware that actually has a
64-bit processor and if your application will actually benefit from
64-bit processing, otherwise say N. You must say Y for kernels for
- SGI IP27 (Origin 200 and 2000). If in doubt say N.
+ SGI IP27 (Origin 200 and 2000) and SGI IP32 (O2). If in doubt say N.
config 64BIT
def_bool MIPS64
the MIPS architecture, check out the Linux/MIPS FAQ on the WWW at
<http://www.linux-mips.org/>.
-config BAGET_MIPS
- bool "Support for BAGET MIPS series (EXPERIMENTAL)"
- depends on MIPS32 && EXPERIMENTAL
- help
- This enables support for the Baget, a Russian embedded system. For
- more details about the Baget see the Linux/MIPS FAQ on
- <http://www.linux-mips.org/>.
-
config MACH_VR41XX
bool "Support for NEC VR41XX-based machines"
depends on MIPS32
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select SWAP_IO_SPACE
config MIPS_COBALT
bool "Support for Cobalt Server (EXPERIMENTAL)"
select IRQ_CPU
select MIPS_GT96100
select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
help
This is an evaluation board based on the Galileo GT-96100 LAN/WAN
communications controllers containing a MIPS R5000 compatible core
bool "LASAT sysctl interface"
depends on LASAT
-config HP_LASERJET
- bool "Support for Hewlett Packard LaserJet board"
- depends on BROKEN
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select IRQ_CPU
-
config MIPS_ITE8172
bool "Support for ITE 8172G board"
select DMA_NONCOHERENT
bool "Support for MIPS Atlas board"
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select SWAP_IO_SPACE
help
This enables support for the QED R5231-based MIPS Atlas evaluation
board.
select HAVE_STD_PC_SERIAL_PORT
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select SWAP_IO_SPACE
help
This enables support for the VR5000-based MIPS Malta evaluation
board.
select IRQ_CPU
select IRQ_CPU_RM7K
select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
select IRQ_CPU_RM7K
select PCI_MARVELL
select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
select IRQ_MV64340
select PCI_MARVELL
select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
help
The Ocelot is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
+config MOMENCO_OCELOT_3
+ bool "Support for Momentum Ocelot-3 board"
+ select DMA_NONCOHERENT
+ select HW_HAS_PCI
+ select IRQ_CPU
+ select IRQ_CPU_RM7K
+ select IRQ_MV64340
+ select PCI_MARVELL
+ select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
+ help
+ The Ocelot-3 is based off Discovery III System Controller and
+ PMC-Sierra Rm79000 core.
+
config MOMENCO_JAGUAR_ATX
bool "Support for Momentum Jaguar board"
select DMA_NONCOHERENT
select LIMITED_DMA
select PCI_MARVELL
select RM7000_CPU_SCACHE
+ select SWAP_IO_SPACE
help
The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by
Momentum Computer <http://www.momenco.com/>.
select HW_HAS_PCI
select IRQ_CPU
select IRQ_CPU_RM7K
+ select SWAP_IO_SPACE
help
Yosemite is an evaluation board for the RM9000x2 processor
manufactured by PMC-Sierra
select DMA_NONCOHERENT
select IP22_CPU_SCACHE
select IRQ_CPU
+ select SWAP_IO_SPACE
help
This are the SGI Indy, Challenge S and Indigo2, as well as certain
OEM variants like the Tandem CMN B006S. To compile a Linux kernel
depends on MIPS64
select DMA_IP27
select HW_HAS_PCI
+ select PCI_DOMAINS
help
This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
workstations. To compile a Linux kernel that runs on these, say Y
bool "Mapped kernel support"
depends on SGI_IP27
help
- Change the way a Linux kernel is loaded unto memory on a MIPS64
+ Change the way a Linux kernel is loaded into memory on a MIPS64
machine. This is required in order to support text replication and
- NUMA. If you need to undersatand it, read the source code.
+ NUMA. If you need to understand it, read the source code.
config REPLICATE_KTEXT
bool "Kernel text replication support"
config SGI_IP32
bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
- depends on EXPERIMENTAL
+ depends on MIPS64 && EXPERIMENTAL
select DMA_NONCOHERENT
select HW_HAS_PCI
select R5000_CPU_SCACHE
depends on SOC_AU1000
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select SWAP_IO_SPACE
config MIPS_PB1100
bool "PB1100 board"
depends on SOC_AU1100
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select SWAP_IO_SPACE
config MIPS_PB1500
bool "PB1500 board"
depends on SOC_AU1500
- select DMA_NONCOHERENT
+ select DMA_COHERENT
select HW_HAS_PCI
config MIPS_PB1550
bool "PB1550 board"
depends on SOC_AU1550
- select DMA_NONCOHERENT
+ select DMA_COHERENT
select HW_HAS_PCI
+ select MIPS_DISABLE_OBSOLETE_IDE
config MIPS_DB1000
bool "DB1000 board"
config MIPS_DB1500
bool "DB1500 board"
depends on SOC_AU1500
- select DMA_NONCOHERENT
+ select DMA_COHERENT
select HW_HAS_PCI
+ select MIPS_DISABLE_OBSOLETE_IDE
config MIPS_DB1550
bool "DB1550 board"
depends on SOC_AU1550
select HW_HAS_PCI
+ select DMA_COHERENT
+ select MIPS_DISABLE_OBSOLETE_IDE
config MIPS_BOSPORUS
bool "Bosporus board"
bool "Support for Broadcom BCM1xxx SOCs (EXPERIMENTAL)"
depends on EXPERIMENTAL
select DMA_COHERENT
+ select SWAP_IO_SPACE
choice
prompt "BCM1xxx SOC-based board"
depends on MIPS32
select DMA_NONCOHERENT
select HW_HAS_PCI
+ select I8259
select ISA
+ select SWAP_IO_SPACE
+ help
+ This Toshiba board is based on the TX4927 processor. Say Y here to
+ support this machine type
+
+config TOSHIBA_FPCIB0
+ bool "FPCIB0 Backplane Support"
+ depends on TOSHIBA_RBTX4927
config RWSEM_GENERIC_SPINLOCK
bool
depends on LASAT
default y
+config MIPS_DISABLE_OBSOLETE_IDE
+ bool
+
config CPU_LITTLE_ENDIAN
bool "Generate little endian code"
- default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || HP_LASERJET || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || NEC_OSPREY || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
- default n if BAGET_MIPS || MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
+ default y if ACER_PICA_61 || CASIO_E55 || DDB5074 || DDB5476 || DDB5477 || MACH_DECSTATION || IBM_WORKPAD || LASAT || MIPS_COBALT || MIPS_ITE8172 || MIPS_IVR || SOC_AU1X00 || NEC_OSPREY || OLIVETTI_M700 || SNI_RM200_PCI || VICTOR_MPC30X || ZAO_CAPCELLA
+ default n if MIPS_EV64120 || MIPS_EV96100 || MOMENCO_OCELOT || MOMENCO_OCELOT_G || SGI_IP22 || SGI_IP27 || SGI_IP32 || TOSHIBA_JMR3927
help
Some MIPS machines can be configured for either little or big endian
byte order. These modes require different kernels. Say Y if your
config SWAP_IO_SPACE
bool
- depends on TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || SIBYTE_SB1xxx_SOC || SGI_IP22 || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_OCELOT || MOMENCO_JAGUAR_ATX || MIPS_MALTA || MIPS_ATLAS || MIPS_EV96100 || MIPS_PB1100 || MIPS_PB1000
- default y
#
# Unfortunately not all GT64120 systems run the chip at the same clock.
config BOOT_ELF32
bool
- depends on MACH_DECSTATION || MIPS_ATLAS || MIPS_MALTA || MOMENCO_JAGUAR_ATX || SIBYTE_SB1xxx_SOC || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI
+ depends on MACH_DECSTATION || MIPS_ATLAS || MIPS_MALTA || MOMENCO_JAGUAR_ATX || MOMENCO_OCELOT_3 || SIBYTE_SB1xxx_SOC || SGI_IP32 || SGI_IP22 || SNI_RM200_PCI
default y
config MIPS_L1_CACHE_SHIFT
(e.g. an accelerated X server) and that are not frame buffer
device-aware may cause unexpected results. If unsure, say N.
-config FB_G364
- bool
- depends on MIPS_MAGNUM_4000 || OLIVETTI_M700
- default y
-
config HAVE_STD_PC_SERIAL_PORT
bool
processors are extremly rare and the support for them is incomplete.
config CPU_NEVADA
- bool "R52xx"
+ bool "RM52xx"
help
- MIPS Technologies R52x0-series ("Nevada") processors.
+ QED / PMC-Sierra RM52xx-series ("Nevada") processors.
config CPU_R8000
bool "R8000"
#
config HIGHMEM
bool "High Memory Support"
- depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(BAGET_MIPS || MACH_DECSTATION || MOMENCO_JAGUAR_ATX)
+ depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX)
config SMP
bool "Multi-Processing support"
information about which PCI hardware does work under Linux and which
doesn't.
+config PCI_DOMAINS
+ bool
+ depends on PCI
+
source "drivers/pci/Kconfig"
#
bool
default y if MIPS32
+config BUILD_ELF64
+ bool "Use 64-bit ELF format for building"
+ depends on MIPS64
+ help
+ A 64-bit kernel is usually built using the 64-bit ELF binary object
+ format as it's one that allows arbitrary 64-bit constructs. For
+ kernels that are loaded within the KSEG compatibility segments the
+ 32-bit ELF format can optionally be used resulting in a somewhat
+ smaller binary, but this option is not explicitly supported by the
+ toolchain and since binutils 2.14 it does not even work at all.
+
+ Say Y to use the 64-bit format or N to use the 32-bit one.
+
+ If unsure say Y.
+
config BINFMT_IRIX
bool "Include IRIX binary compatibility"
- depends on !CPU_LITTLE_ENDIAN && MIPS32
+ depends on !CPU_LITTLE_ENDIAN && MIPS32 && BROKEN
config MIPS32_COMPAT
bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
endmenu
-menu "MIPS initrd options"
- depends on BLK_DEV_INITRD
-
-config EMBEDDED_RAMDISK
- bool "Embed root filesystem ramdisk into the kernel"
-
-config EMBEDDED_RAMDISK_IMAGE
- string "Filename of gziped ramdisk image"
- depends on EMBEDDED_RAMDISK
- default "ramdisk.gz"
- help
- This is the filename of the ramdisk image to be built into the
- kernel. Relative pathnames are relative to arch/mips/ramdisk/.
- The ramdisk image is not part of the kernel distribution; you must
- provide one yourself.
-
-endmenu
-
source "drivers/Kconfig"
source "fs/Kconfig"
source "crypto/Kconfig"
source "lib/Kconfig"
+
+#
+# Use the generic interrupt handling code in kernel/irq/:
+#
+config GENERIC_HARDIRQS
+ bool
+ default y
+
+config GENERIC_IRQ_PROBE
+ bool
+ default y
#
# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
# DECStation modifications by Paul M. Antoine, 1996
-# Copyright (C) 2002, 2003 Maciej W. Rozycki
+# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
#
# This file is included by the global makefile so that you can add your own
# architecture-specific flags and dependencies. Remember to do have actions
# for "archclean" cleaning up for this architecture.
#
+as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
+ -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
+ else echo "$(2)"; fi ;)
+
+cflags-y :=
+
#
# Select the object file format to substitute into the linker script.
#
64bit-tool-prefix = mips64el-linux-
32bit-bfd = elf32-tradlittlemips
64bit-bfd = elf64-tradlittlemips
+32bit-emul = elf32ltsmip
+64bit-emul = elf64ltsmip
else
32bit-tool-prefix = mips-linux-
64bit-tool-prefix = mips64-linux-
32bit-bfd = elf32-tradbigmips
64bit-bfd = elf64-tradbigmips
+32bit-emul = elf32btsmip
+64bit-emul = elf64btsmip
endif
ifdef CONFIG_MIPS32
gcc-abi = 32
-gas-abi = 32
tool-prefix = $(32bit-tool-prefix)
UTS_MACHINE := mips
endif
ifdef CONFIG_MIPS64
gcc-abi = 64
-gas-abi = 32
tool-prefix = $(64bit-tool-prefix)
UTS_MACHINE := mips64
endif
CROSS_COMPILE := $(tool-prefix)
endif
+ifdef CONFIG_BUILD_ELF64
+gas-abi = 64
+ld-emul = $(64bit-emul)
+vmlinux-32 = vmlinux.32
+vmlinux-64 = vmlinux
+else
+gas-abi = 32
+ld-emul = $(32bit-emul)
+vmlinux-32 = vmlinux
+vmlinux-64 = vmlinux.64
+
+cflags-$(CONFIG_MIPS64) += $(call cc-option,-mno-explicit-relocs)
+endif
+
#
# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
# code since it only slows down the whole thing. At some point we might make
# machines may also. Since BFD is incredibly buggy with respect to
# crossformat linking we rely on the elf2ecoff tool for format conversion.
#
-cflags-y := -I $(TOPDIR)/include/asm/gcc
+cflags-y += -I $(TOPDIR)/include/asm/gcc
cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
cflags-y += $(call cc-option, -finline-limit=100000)
LDFLAGS_vmlinux += -G 0 -static -n
$(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
-Wa,--trap
+cflags-$(CONFIG_CPU_TX49XX) += \
+ $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
+ -Wa,--trap
+
cflags-$(CONFIG_CPU_MIPS32) += \
$(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
-Wa,--trap
endif
endif
-#
-# ramdisk/initrd support
-# You need a compressed ramdisk image, named
-# CONFIG_EMBEDDED_RAMDISK_IMAGE. Relative pathnames
-# are relative to arch/mips/ramdisk/.
-#
-core-$(CONFIG_EMBEDDED_RAMDISK) += arch/mips/ramdisk/
-
#
# Firmware support
#
#
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
-load-$(CONFIG_MACH_JAZZ) += 0x80080000
+load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
#
# Common Alchemy Au1x00 stuff
#
libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
-load-$(CONFIG_MIPS_PB1000) += 0x80100000
+load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
#
# AMD Alchemy Pb1100 eval board
#
libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
-load-$(CONFIG_MIPS_PB1100) += 0x80100000
+load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
#
# AMD Alchemy Pb1500 eval board
#
libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
-load-$(CONFIG_MIPS_PB1500) += 0x80100000
+load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
#
# AMD Alchemy Pb1550 eval board
#
libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
-load-$(CONFIG_MIPS_PB1550) += 0x80100000
+load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
#
# AMD Alchemy Db1000 eval board
#
libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
-load-$(CONFIG_MIPS_DB1000) += 0x80100000
+load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
#
# AMD Alchemy Db1100 eval board
#
libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
-load-$(CONFIG_MIPS_DB1100) += 0x80100000
+load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
#
# AMD Alchemy Db1500 eval board
#
libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
-load-$(CONFIG_MIPS_DB1500) += 0x80100000
+load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
+
+#
+# AMD Alchemy Db1550 eval board
+#
+libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
+cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
+load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
#
# AMD Alchemy Bosporus eval board
#
libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
-load-$(CONFIG_MIPS_BOSPORUS) += 0x80100000
+load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
#
# AMD Alchemy Mirage eval board
#
libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
-load-$(CONFIG_MIPS_MIRAGE) += 0x80100000
+load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
#
# 4G-Systems eval board
#
libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
-load-$(CONFIG_MIPS_MTX1) += 0x80100000
+load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
#
# MyCable eval board
#
libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
-load-$(CONFIG_MIPS_XXS1500) += 0x80100000
-
-#
-# Baget/MIPS
-#
-libs-$(CONFIG_BAGET_MIPS) += arch/mips/baget/ arch/mips/baget/prom/
-load-$(CONFIG_BAGET_MIPS) += 0x80001000
+load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
#
# Cobalt Server
#
core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
-load-$(CONFIG_MIPS_COBALT) += 0x80080000
+load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
#
# DECstation family
core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
-load-$(CONFIG_MACH_DECSTATION) += 0x80040000
+load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
CLEAN_FILES += drivers/tc/lk201-map.c
#
core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
-load-$(CONFIG_MIPS_EV64120) += 0x80100000
+load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
#
# Galileo EV96100 Board
#
core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
-load-$(CONFIG_MIPS_EV96100) += 0x80100000
+load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
#
# Globespan IVR eval board with QED 5231 CPU
#
core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
-load-$(CONFIG_MIPS_IVR) += 0x80100000
-
-#
-# HP LaserJet
-#
-core-$(CONFIG_HP_LASERJET) += arch/mips/hp-lj/
-load-$(CONFIG_HP_LASERJET) += 0x80030000
+load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
#
# ITE 8172 eval board with QED 5231 CPU
#
core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
-load-$(CONFIG_MIPS_ITE8172) += 0x80100000
+load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
#
# For all MIPS, Inc. eval boards
core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
-load-$(CONFIG_MIPS_ATLAS) += 0x80100000
+load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
#
# MIPS Malta board
#
core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
-load-$(CONFIG_MIPS_MALTA) += 0x80100000
+load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
#
# MIPS SEAD board
#
core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
-load-$(CONFIG_MIPS_SEAD) += 0x80100000
+load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
#
# Momentum Ocelot board
core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
arch/mips/gt64120/momenco_ocelot/
cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
-load-$(CONFIG_MOMENCO_OCELOT) += 0x80100000
+load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
#
# Momentum Ocelot-G board
# mips_io_port_base.
#
core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
-load-$(CONFIG_MOMENCO_OCELOT_G) += 0x80100000
+load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
#
# Momentum Ocelot-C and -CS boards
# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
# mips_io_port_base.
core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
-load-$(CONFIG_MOMENCO_OCELOT_C) += 0x80100000
+load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
#
# PMC-Sierra Yosemite
#
core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
-load-$(CONFIG_PMC_YOSEMITE) += 0x80100000
+load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
+
+#
+# Momentum Ocelot-3
+#
+core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
+cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
+load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
#
# Momentum Jaguar ATX
core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
#ifdef CONFIG_JAGUAR_DMALOW
-#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0x88000000
+#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
#else
-load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0x80100000
+load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
#endif
#
# NEC DDB Vrc-5074
#
core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
-load-$(CONFIG_DDB5074) += 0x80080000
+load-$(CONFIG_DDB5074) += 0xffffffff80080000
#
# NEC DDB Vrc-5476
#
core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/
-load-$(CONFIG_DDB5476) += 0x80080000
+load-$(CONFIG_DDB5476) += 0xffffffff80080000
#
# NEC DDB Vrc-5477
#
core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
-load-$(CONFIG_DDB5477) += 0x80100000
+load-$(CONFIG_DDB5477) += 0xffffffff80100000
core-$(CONFIG_LASAT) += arch/mips/lasat/
cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
-load-$(CONFIG_LASAT) += 0x80000000
+load-$(CONFIG_LASAT) += 0xffffffff80000000
#
# NEC Osprey (vr4181) board
#
core-$(CONFIG_NEC_OSPREY) += arch/mips/vr4181/common/ \
arch/mips/vr4181/osprey/
-load-$(CONFIG_NEC_OSPREY) += 0x80002000
+load-$(CONFIG_NEC_OSPREY) += 0xffffffff80002000
#
# Common VR41xx
# ZAO Networks Capcella (VR4131)
#
core-$(CONFIG_ZAO_CAPCELLA) += arch/mips/vr41xx/zao-capcella/
-load-$(CONFIG_ZAO_CAPCELLA) += 0x80000000
+load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
#
# Victor MP-C303/304 (VR4122)
#
core-$(CONFIG_VICTOR_MPC30X) += arch/mips/vr41xx/victor-mpc30x/
-load-$(CONFIG_VICTOR_MPC30X) += 0x80001000
+load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
#
# IBM WorkPad z50 (VR4121)
#
core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
-load-$(CONFIG_IBM_WORKPAD) += 0x80004000
+load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
#
# CASIO CASSIPEIA E-55/65 (VR4111)
#
core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
-load-$(CONFIG_CASIO_E55) += 0x80004000
+load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
#
# TANBAC TB0226 Mbase (VR4131)
#
core-$(CONFIG_TANBAC_TB0226) += arch/mips/vr41xx/tanbac-tb0226/
-load-$(CONFIG_TANBAC_TB0226) += 0x80000000
+load-$(CONFIG_TANBAC_TB0226) += 0xffffffff80000000
#
# TANBAC TB0229 VR4131DIMM (VR4131)
#
core-$(CONFIG_TANBAC_TB0229) += arch/mips/vr41xx/tanbac-tb0229/
-load-$(CONFIG_TANBAC_TB0229) += 0x80000000
+load-$(CONFIG_TANBAC_TB0229) += 0xffffffff80000000
#
# SGI IP22 (Indy/Indigo2)
#
-# Set the load address to >= 0x88069000 if you want to leave space for symmon,
-# 0x80002000 for production kernels. Note that the value must be aligned to
-# a multiple of the kernel stack size or the handling of the current variable
-# will break so for 64-bit kernels we have to raise the start address by 8kb.
+# Set the load address to >= 0xffffffff88069000 if you want to leave space for
+# symmon, 0xffffffff80002000 for production kernels. Note that the value must
+# be aligned to a multiple of the kernel stack size or the handling of the
+# current variable will break so for 64-bit kernels we have to raise the start
+# address by 8kb.
#
core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
ifdef CONFIG_MIPS32
-load-$(CONFIG_SGI_IP22) += 0x88002000
+load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
endif
ifdef CONFIG_MIPS64
-load-$(CONFIG_SGI_IP22) += 0x88004000
+load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
endif
#
# SGI-IP27 (Origin200/2000)
#
# Set the load address to >= 0xc000000000300000 if you want to leave space for
-# symmon, 0xc00000000001c000 for production kernels. Note that the value
-# must be 16kb aligned or the handling of the current variable will break.
+# symmon, 0xc00000000001c000 for production kernels. Note that the value must
+# be 16kb aligned or the handling of the current variable will break.
#
ifdef CONFIG_SGI_IP27
core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
-#load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
+ifdef CONFIG_BUILD_ELF64
+ifdef CONFIG_MAPPED_KERNEL
+load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
+OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
+dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
+else
+load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
+OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
+endif
+else
ifdef CONFIG_MAPPED_KERNEL
-load-$(CONFIG_SGI_IP27) += 0xc001c000
+load-$(CONFIG_SGI_IP27) += 0xffffffffc001c000
+OBJCOPYFLAGS := --change-addresses=0xc000000080000000
dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
else
-load-$(CONFIG_SGI_IP27) += 0x8001c000
+load-$(CONFIG_SGI_IP27) += 0xffffffff8001c000
+OBJCOPYFLAGS := --change-addresses=0xa800000080000000
+endif
endif
endif
# SGI-IP32 (O2)
#
# Set the load address to >= 80069000 if you want to leave space for symmon,
-# 0x80002000 for production kernels. Note that the value must be aligned to
+# 0xffffffff80004000 for production kernels. Note that the value must be aligned to
# a multiple of the kernel stack size or the handling of the current variable
-# will break so for 64-bit kernels we have to raise the start address by 8kb.
+# will break.
#
core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
-ifdef CONFIG_MIPS32
-load-$(CONFIG_SGI_IP32) += 0x80002000
-endif
-ifdef CONFIG_MIPS64
-load-$(CONFIG_SGI_IP32) += 0x80004000
-endif
+load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
#
# Sibyte SB1250 SOC
# removed (as happens, even if they have __initcall/module_init)
#
core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
+cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte
core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
+cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte
#
# Sibyte BCM91120x (Carmel) board
# Sibyte SWARM board
#
libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_CARMEL) := 0x80100000
+load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_CRHINE) := 0x80100000
+load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_CRHONE) := 0x80100000
+load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_RHONE) := 0x80100000
+load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_SENTOSA) := 0x80100000
+load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
-load-$(CONFIG_SIBYTE_SWARM) := 0x80100000
+load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
#
# SNI RM200 PCI
#
core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
-load-$(CONFIG_SNI_RM200_PCI) += 0x80600000
+load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
#
# Toshiba JMR-TX3927 board
#
core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
arch/mips/jmr3927/common/
-load-$(CONFIG_TOSHIBA_JMR3927) += 0x80050000
+load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
#
# Toshiba RBTX4927 board or
#
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
-load-$(CONFIG_TOSHIBA_RBTX4927) += 0x80020000
+load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
cflags-y += -Iinclude/asm-mips/mach-generic
drivers-$(CONFIG_PCI) += arch/mips/pci/
-ifdef CONFIG_MIPS32
-build-bfd = $(32bit-bfd)
-cflags-y += $(32bit-isa-y)
-endif
-ifdef CONFIG_MIPS64
-build-bfd = $(64bit-bfd)
-cflags-y += $(64bit-isa-y)
-endif
-
ifdef CONFIG_MIPS32
ifdef CONFIG_CPU_LITTLE_ENDIAN
JIFFIES = jiffies_64
JIFFIES = jiffies_64
endif
-#
-# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
-# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
-# convert to ECOFF using elf2ecoff.
-#
-# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
-# ELF files from 32-bit files by conversion.
-#
-#AS += -64
-#LDFLAGS += -m elf64bmip
+AFLAGS += $(cflags-y)
+CFLAGS += $(cflags-y)
+
+LDFLAGS += -m $(ld-emul)
+
+OBJCOPYFLAGS += --remove-section=.reginfo
#
# Choosing incompatible machines durings configuration will result in
#
CPPFLAGS_vmlinux.lds := \
+ $(CFLAGS) \
-D"LOADADDR=$(load-y)" \
-D"JIFFIES=$(JIFFIES)" \
-D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
-AFLAGS += $(cflags-y)
-CFLAGS += $(cflags-y)
-
-LDFLAGS += --oformat $(32bit-bfd)
-
head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
libs-y += arch/mips/lib/
core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
-ifdef CONFIG_BAGET_MIPS
-
-BAGETBOOT = $(MAKE) -C arch/$(ARCH)/baget
-
-balo: vmlinux
- $(BAGETBOOT) balo
-
-endif
-
ifdef CONFIG_LASAT
rom.bin rom.sw: vmlinux
$(call descend,arch/mips/lasat/image,$@)
endif
-ifdef CONFIG_MAPPED_KERNEL
-vmlinux.64: vmlinux
- $(OBJCOPY) -O $(64bit-bfd) --remove-section=.reginfo \
- --change-addresses=0xc000000080000000 $< $@
-else
+#
+# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
+# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
+# convert to ECOFF using elf2ecoff.
+#
+vmlinux.32: vmlinux
+ $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
+
+#
+# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
+# ELF files from 32-bit files by conversion.
+#
vmlinux.64: vmlinux
- $(OBJCOPY) -O $(64bit-bfd) --remove-section=.reginfo \
- --change-addresses=0xa800000080000000 $< $@
-endif
+ $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
-makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot $(1)
+makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
-ifdef CONFIG_SGI_IP27
-all: vmlinux.64
+ifdef CONFIG_BOOT_ELF32
+all: $(vmlinux-32)
+endif
+
+ifdef CONFIG_BOOT_ELF64
+all: $(vmlinux-64)
endif
ifdef CONFIG_SNI_RM200_PCI
all: vmlinux.ecoff
endif
-vmlinux.ecoff vmlinux.rm200: vmlinux
+vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
+@$(call makeboot,$@)
-vmlinux.srec: vmlinux
+vmlinux.srec: $(vmlinux-32)
+@$(call makeboot,$@)
CLEAN_FILES += vmlinux.ecoff \
archclean:
@$(MAKE) $(clean)=arch/mips/boot
- @$(MAKE) $(clean)=arch/mips/baget
@$(MAKE) $(clean)=arch/mips/lasat
# Generate <asm/offset.h
include/asm-$(ARCH)/offset.h \
include/asm-$(ARCH)/reg.h.tmp \
include/asm-$(ARCH)/reg.h \
+ vmlinux.32 \
vmlinux.64 \
vmlinux.ecoff
MACH_SGI_IP28,
PROM_FLAG_ARCS
}, { "SGI-IP32",
- "SGI IP32",
+ "SGI O2",
MACH_GROUP_SGI,
MACH_SGI_IP32,
PROM_FLAG_ARCS
DISPLAY_STATUS * __init ArcGetDisplayStatus(ULONG FileID)
{
- return ARC_CALL1(GetDisplayStatus, FileID);
+ return (DISPLAY_STATUS *) ARC_CALL1(GetDisplayStatus, FileID);
}
#
obj-y += prom.o int-handler.o irq.o puts.o time.o reset.o \
- au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o cputable.o
+ au1xxx_irqmap.o clocks.o platform.o power.o setup.o \
+ sleeper.o cputable.o dma.o dbdma.o
obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
obj-$(CONFIG_KGDB) += dbg_io.o
obj-$(CONFIG_PCI) += pci.o
-
-ifdef CONFIG_SOC_AU1550
-obj-y += dbdma.o
-else
-obj-y += dma.o
-endif
#elif defined(CONFIG_SOC_AU1500)
- { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_PCI_INTA, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_PCI_INTB, INTC_INT_LOW_LEVEL, 0 },
- { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_PCI_INTC, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_PCI_INTD, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
- { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1500_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
#elif defined(CONFIG_SOC_AU1100)
- { AU1000_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
- { 2/*AU1000_SD_INT*/, INTC_INT_HIGH_LEVEL, 0},
- { AU1000_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1100_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1100_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1100_SD_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1100_UART3_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_SSI0_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_SSI1_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_DMA_INT_BASE, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
{ AU1000_USB_HOST_INT, INTC_INT_LOW_LEVEL, 0 },
{ AU1000_ACSYNC_INT, INTC_INT_RISE_EDGE, 0 },
- { AU1000_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1100_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
/*{ AU1000_GPIO215_208_INT, INTC_INT_HIGH_LEVEL, 0},*/
- /*{ AU1000_LCD_INT, INTC_INT_HIGH_LEVEL, 0 },*/
+ { AU1100_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1000_AC97C_INT, INTC_INT_RISE_EDGE, 0 },
#elif defined(CONFIG_SOC_AU1550)
{ AU1550_MAC0_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
{ AU1550_MAC1_DMA_INT, INTC_INT_HIGH_LEVEL, 0},
+#elif defined(CONFIG_SOC_AU1200)
+
+ { AU1200_UART0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_SWT_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1200_SD_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_DDMA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_MAE_BE_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1200_UART1_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_MAE_FE_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1200_PSC0_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_TOY_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1200_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1200_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1200_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
+ { AU1200_RTC_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1200_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1200_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1200_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
+ { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
+ { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
+ { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
+ { AU1200_MAE_BOTH_INT, INTC_INT_HIGH_LEVEL, 0},
+
#else
#error "Error: Unknown Alchemy SOC"
#endif
{ 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 },
{ 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 },
{ 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 },
+ { 0xffffffff, 0x04030200, "Au1200 AA", 0, 1 },
{ 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 },
};
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/delay.h>
+#include <linux/interrupt.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1xxx_dbdma.h>
#include <asm/system.h>
+#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
+
/*
* The Descriptor Based DMA supports up to 16 channels.
*
static void au1xxx_dbdma_init(void);
typedef struct dbdma_device_table {
+ u32 dev_id;
u32 dev_flags;
u32 dev_tsize;
u32 dev_devwidth;
#define DEV_FLAGS_IN (1 << 3)
static dbdev_tab_t dbdev_tab[] = {
+#ifdef CONFIG_SOC_AU1550
/* UARTS */
- { DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 },
- { DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 },
- { DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 },
- { DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 },
+ { DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 },
+ { DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 },
+ { DSCR_CMD0_UART3_TX, DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 },
+ { DSCR_CMD0_UART3_RX, DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 },
/* EXT DMA */
- { 0, 0, 0, 0x00000000, 0, 0 },
- { 0, 0, 0, 0x00000000, 0, 0 },
- { 0, 0, 0, 0x00000000, 0, 0 },
- { 0, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_DMA_REQ2, 0, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_DMA_REQ3, 0, 0, 0, 0x00000000, 0, 0 },
/* USB DEV */
- { DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 },
- { DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 },
- { DEV_FLAGS_OUT, 4, 8, 0x10200008, 0, 0 },
- { DEV_FLAGS_OUT, 4, 8, 0x1020000c, 0, 0 },
- { DEV_FLAGS_IN, 4, 8, 0x10200010, 0, 0 },
- { DEV_FLAGS_IN, 4, 8, 0x10200014, 0, 0 },
+ { DSCR_CMD0_USBDEV_RX0, DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 },
+ { DSCR_CMD0_USBDEV_TX0, DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 },
+ { DSCR_CMD0_USBDEV_TX1, DEV_FLAGS_OUT, 4, 8, 0x10200008, 0, 0 },
+ { DSCR_CMD0_USBDEV_TX2, DEV_FLAGS_OUT, 4, 8, 0x1020000c, 0, 0 },
+ { DSCR_CMD0_USBDEV_RX3, DEV_FLAGS_IN, 4, 8, 0x10200010, 0, 0 },
+ { DSCR_CMD0_USBDEV_RX4, DEV_FLAGS_IN, 4, 8, 0x10200014, 0, 0 },
/* PSC 0 */
- { DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
- { DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
+ { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
+ { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
/* PSC 1 */
- { DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 },
- { DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
+ { DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 },
+ { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
/* PSC 2 */
- { DEV_FLAGS_OUT, 0, 0, 0x10a0001c, 0, 0 },
- { DEV_FLAGS_IN, 0, 0, 0x10a0001c, 0, 0 },
+ { DSCR_CMD0_PSC2_TX, DEV_FLAGS_OUT, 0, 0, 0x10a0001c, 0, 0 },
+ { DSCR_CMD0_PSC2_RX, DEV_FLAGS_IN, 0, 0, 0x10a0001c, 0, 0 },
/* PSC 3 */
- { DEV_FLAGS_OUT, 0, 0, 0x10b0001c, 0, 0 },
- { DEV_FLAGS_IN, 0, 0, 0x10b0001c, 0, 0 },
+ { DSCR_CMD0_PSC3_TX, DEV_FLAGS_OUT, 0, 0, 0x10b0001c, 0, 0 },
+ { DSCR_CMD0_PSC3_RX, DEV_FLAGS_IN, 0, 0, 0x10b0001c, 0, 0 },
- { 0, 0, 0, 0x00000000, 0, 0 }, /* PCI */
- { 0, 0, 0, 0x00000000, 0, 0 }, /* NAND */
+ { DSCR_CMD0_PCI_WRITE, 0, 0, 0, 0x00000000, 0, 0 }, /* PCI */
+ { DSCR_CMD0_NAND_FLASH, 0, 0, 0, 0x00000000, 0, 0 }, /* NAND */
/* MAC 0 */
- { DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
- { DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_MAC0_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_MAC0_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
/* MAC 1 */
- { DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
- { DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_MAC1_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_MAC1_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
+
+#endif /* CONFIG_SOC_AU1550 */
+
+#ifdef CONFIG_SOC_AU1200
+ { DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 },
+ { DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 },
+ { DSCR_CMD0_UART1_TX, DEV_FLAGS_OUT, 0, 8, 0x11200004, 0, 0 },
+ { DSCR_CMD0_UART1_RX, DEV_FLAGS_IN, 0, 8, 0x11200000, 0, 0 },
+
+ { DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 },
+
+ { DSCR_CMD0_MAE_BE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_MAE_FE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
+
+ { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
+
+ { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_AES_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
+
+ { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
+ { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
+ { DSCR_CMD0_PSC0_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
+
+ { DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 },
+ { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
+ { DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
+
+ { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
- /* reserved */
- { DEV_FLAGS_INUSE, 0, 0, 0x00000000, 0, 0 },
- { DEV_FLAGS_INUSE, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
- /* Memory */
- { DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, /* throttle */
- { DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 }, /* always */
+#endif // CONFIG_SOC_AU1200
+
+ { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
+ { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
};
+#define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t))
+
static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS];
+static dbdev_tab_t *
+find_dbdev_id (u32 id)
+{
+ int i;
+ dbdev_tab_t *p;
+ for (i = 0; i < DBDEV_TAB_SIZE; ++i) {
+ p = &dbdev_tab[i];
+ if (p->dev_id == id)
+ return p;
+ }
+ return NULL;
+}
+
/* Allocate a channel and return a non-zero descriptor if successful.
*/
u32
if ((srcid > DSCR_NDEV_IDS) || (destid > DSCR_NDEV_IDS))
return 0;
- stp = &dbdev_tab[srcid];
- dtp = &dbdev_tab[destid];
+ if ((stp = find_dbdev_id(srcid)) == NULL) return 0;
+ if ((dtp = find_dbdev_id(destid)) == NULL) return 0;
+
used = 0;
rv = 0;
/* If kmalloc fails, it is caught below same
* as a channel not available.
*/
- ctp = (chan_tab_t *)kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
+ ctp = kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
chan_tab_ptr[i] = ctp;
ctp->chan_index = chan = i;
break;
* and if we try that first we are likely to not waste larger
* slabs of memory.
*/
- desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL);
+ desc_base = kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL);
if (desc_base == 0)
return 0;
kfree((const void *)desc_base);
i = entries * sizeof(au1x_ddma_desc_t);
i += (sizeof(au1x_ddma_desc_t) - 1);
- if ((desc_base = (u32)kmalloc(i, GFP_KERNEL)) == 0)
+ if ((desc_base = kmalloc(i, GFP_KERNEL)) == 0)
return 0;
desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
/* Initialize the rings with as much information as we know.
*/
- srcid = stp - dbdev_tab; /* Index is channel device ID */
- destid = dtp - dbdev_tab;
+ srcid = stp->dev_id;
+ destid = dtp->dev_id;
cmd0 = cmd1 = src1 = dest1 = 0;
src0 = dest0 = 0;
kfree(ctp);
}
-static void
+static irqreturn_t
dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
u32 intstat;
ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
+ return IRQ_HANDLED;
}
static void
dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
} while (dp != ctp->chan_desc_base);
}
+
+#endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
+
*
*/
+#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
+#include <linux/module.h>
#include <asm/system.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1000_dma.h>
{.dev_id = -1,},
{.dev_id = -1,}
};
+EXPORT_SYMBOL(au1000_dma_table);
// Device FIFO addresses and default DMA modes
static const struct dma_dev {
return i;
}
+EXPORT_SYMBOL(request_au1000_dma);
void free_au1000_dma(unsigned int dmanr)
{
chan->irq_dev = NULL;
chan->dev_id = -1;
}
+EXPORT_SYMBOL(free_au1000_dma);
+
#endif // AU1000 AU1500 AU1100
#define EXT_INTC1_REQ1 5 /* IP 5 */
#define MIPS_TIMER_IP 7 /* IP 7 */
-#ifdef CONFIG_KGDB
-extern void breakpoint(void);
-#endif
-
extern asmlinkage void au1000_IRQ(void);
extern void set_debug_traps(void);
extern irq_cpustat_t irq_stat [NR_CPUS];
inline void local_enable_irq(unsigned int irq_nr);
inline void local_disable_irq(unsigned int irq_nr);
-extern void __init init_generic_irq(void);
void (*board_init_irq)(void);
#ifdef CONFIG_PM
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
int i;
unsigned long cp0_status;
memset(irq_desc, 0, sizeof(irq_desc));
set_except_vector(0, au1000_IRQ);
- init_generic_irq();
-
/* Initialize interrupt controllers to a safe state.
*/
au_writel(0xffffffff, IC0_CFG0CLR);
*/
if (board_init_irq)
(*board_init_irq)();
-
-#ifdef CONFIG_KGDB
- /* If local serial I/O used for debug port, enter kgdb at once */
- puts("Waiting for kgdb to connect...");
- set_debug_traps();
- breakpoint();
-#endif
}
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ *
* Support for all devices (greater than 16) added by David Gathright.
*
* This program is free software; you can redistribute it and/or modify it
#include <linux/init.h>
#include <asm/mach-au1x00/au1000.h>
-#include <asm/pci_channel.h>
/* TBD */
static struct resource pci_io_resource = {
static int __init au1x_pci_setup(void)
{
#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
- int i;
- struct pci_dev *dev;
-
virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START,
Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1);
if (!virt_io_addr) {
printk(KERN_ERR "Unable to ioremap pci space\n");
- return;
+ return 1;
}
#ifdef CONFIG_DMA_NONCOHERENT
--- /dev/null
+/*
+ * Platform device support for Au1x00 SoCs.
+ *
+ * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/config.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/resource.h>
+
+#include <asm/mach-au1x00/au1000.h>
+
+static struct resource au1xxx_usb_ohci_resources[] = {
+ [0] = {
+ .start = USB_OHCI_BASE,
+ .end = USB_OHCI_BASE + USB_OHCI_LEN,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = AU1000_USB_HOST_INT,
+ .end = AU1000_USB_HOST_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+/* The dmamask must be set for OHCI to work */
+static u64 ohci_dmamask = ~(u32)0;
+
+static struct platform_device au1xxx_usb_ohci_device = {
+ .name = "au1xxx-ohci",
+ .id = 0,
+ .dev = {
+ .dma_mask = &ohci_dmamask,
+ .coherent_dma_mask = 0xffffffff,
+ },
+ .num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
+ .resource = au1xxx_usb_ohci_resources,
+};
+
+static struct platform_device *au1xxx_platform_devices[] __initdata = {
+ &au1xxx_usb_ohci_device,
+};
+
+int au1xxx_platform_init(void)
+{
+ return platform_add_devices(au1xxx_platform_devices, ARRAY_SIZE(au1xxx_platform_devices));
+}
+
+arch_initcall(au1xxx_platform_init);
}
void
-fputs(unsigned char *cp)
+fputs(const char *cp)
{
unsigned char ch;
int i = 0;
void au1000_restart(char *command)
{
/* Set all integrated peripherals to disabled states */
+ extern void board_reset (void);
u32 prid = read_c0_prid();
printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n");
flush_cache_all();
write_c0_wired(0);
-#if defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500)
- /* Do a HW reset if the board can do it */
-
- au_writel(0x00000000, 0xAE00001C);
-#endif
-
-#if defined(CONFIG_MIPS_PB1550)
- /* reset entire system */
- au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
- au_sync();
-#endif
+ /* Give board a chance to do a hardware reset */
+ board_reset();
+ /* Jump to the beggining in case board_reset() is empty */
__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
}
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
+ * Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc.
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
#include <asm/mach-au1x00/au1000.h>
#include <asm/time.h>
-#ifdef CONFIG_BLK_DEV_INITRD
-extern unsigned long initrd_start, initrd_end;
-extern void * __rd_start, * __rd_end;
-#endif
-
extern char * __init prom_getcmdline(void);
extern void __init board_setup(void);
extern void au1000_restart(char *);
extern void au1x_time_init(void);
extern void (*board_timer_setup)(struct irqaction *irq);
extern void au1x_timer_setup(struct irqaction *irq);
-#if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
-extern phys_t (*fixup_bigphys_addr)(phys_t phys_addr, phys_t size);
-static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size);
-#endif
extern void au1xxx_time_init(void);
extern void au1xxx_timer_setup(struct irqaction *irq);
+extern void set_cpuspec(void);
static int __init au1x00_setup(void)
{
prid = read_c0_prid();
cpupll = (au_readl(0xB1900060) & 0x3F) * 12;
- printk("(PRId %08X) @ %dMHZ\n", prid, cpupll);
+ printk("(PRId %08lx) @ %ldMHZ\n", prid, cpupll);
bclk = sp->cpu_bclk;
if (bclk)
_machine_power_off = au1000_power_off;
board_time_init = au1xxx_time_init;
board_timer_setup = au1xxx_timer_setup;
-#if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
- fixup_bigphys_addr = au1500_fixup_bigphys_addr;
-#endif
/* IO/MEM resources. */
set_io_port_base(0);
iomem_resource.start = IOMEM_RESOURCE_START;
iomem_resource.end = IOMEM_RESOURCE_END;
-#ifdef CONFIG_BLK_DEV_INITRD
- ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
-#endif
-
-#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
-#ifdef CONFIG_USB_OHCI
- if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
- char usb_args[80];
- argptr = prom_getcmdline();
- memset(usb_args, 0, sizeof(usb_args));
- sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
- USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
- strcat(argptr, usb_args);
- }
-#endif
-
-#ifdef CONFIG_USB_OHCI
- /* enable host controller and wait for reset done */
- au_writel(0x08, USB_HOST_CONFIG);
- udelay(1000);
- au_writel(0x0E, USB_HOST_CONFIG);
- udelay(1000);
- au_readl(USB_HOST_CONFIG); /* throw away first read */
- while (!(au_readl(USB_HOST_CONFIG) & 0x10))
- au_readl(USB_HOST_CONFIG);
-#endif
-#endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
-
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
au_sync();
while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
au_writel(0, SYS_TOYTRIM);
+
return 0;
}
early_initcall(au1x00_setup);
-#if defined(CONFIG_64BIT_PHYS_ADDR) && (defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550))
-/* This routine should be valid for all Au1500 based boards */
-static phys_t au1500_fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+#if defined(CONFIG_64BIT_PHYS_ADDR)
+/* This routine should be valid for all Au1x based boards */
+phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
{
- u32 pci_start = (u32)Au1500_PCI_MEM_START;
- u32 pci_end = (u32)Au1500_PCI_MEM_END;
+ u32 start, end;
/* Don't fixup 36 bit addresses */
if ((phys_addr >> 32) != 0) return phys_addr;
+#ifdef CONFIG_PCI
+ start = (u32)Au1500_PCI_MEM_START;
+ end = (u32)Au1500_PCI_MEM_END;
/* check for pci memory window */
- if ((phys_addr >= pci_start) && ((phys_addr + size) < pci_end)) {
- return (phys_t)((phys_addr - pci_start) +
- Au1500_PCI_MEM_START);
+ if ((phys_addr >= start) && ((phys_addr + size) < end)) {
+ return (phys_t)((phys_addr - start) + Au1500_PCI_MEM_START);
}
- else
- return phys_addr;
+#endif
+
+ /* All Au1x SOCs have a pcmcia controller */
+ /* We setup our 32 bit pseudo addresses to be equal to the
+ * 36 bit addr >> 4, to make it easier to check the address
+ * and fix it.
+ * The Au1x socket 0 phys attribute address is 0xF 4000 0000.
+ * The pseudo address we use is 0xF400 0000. Any address over
+ * 0xF400 0000 is a pcmcia pseudo address.
+ */
+ if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) {
+ return (phys_t)(phys_addr << 4);
+ }
+
+ /* default nop */
+ return phys_addr;
}
#endif
#include <linux/spinlock.h>
#include <linux/hardirq.h>
+#include <asm/compiler.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
#include <asm/time.h>
__asm__("multu\t%1,%2\n\t"
"mfhi\t%0"
- :"=r" (res)
- :"r" (count),
- "r" (quotient));
+ : "=r" (res)
+ : "r" (count), "r" (quotient)
+ : "hi", "lo", GCC_REG_ACCUM);
/*
* Due to possible jiffies inconsistencies, we need to check
#define vdbg(fmt, arg...) do {} while (0)
#endif
-#define MAX(a,b) (((a)>(b))?(a):(b))
-
#define ALLOC_FLAGS (in_interrupt () ? GFP_ATOMIC : GFP_KERNEL)
#define EP_FIFO_DEPTH 8
static inline usbdev_pkt_t *
alloc_packet(endpoint_t * ep, int data_size, void* data)
{
- usbdev_pkt_t* pkt =
- (usbdev_pkt_t *)kmalloc(sizeof(usbdev_pkt_t) + data_size,
- ALLOC_FLAGS);
+ usbdev_pkt_t* pkt = kmalloc(sizeof(usbdev_pkt_t) + data_size,
+ ALLOC_FLAGS);
if (!pkt)
return NULL;
pkt->ep_addr = ep->address;
/* not correct for db1550 */
static BCSR * const bcsr = (BCSR *)0xAE000000;
+void board_reset (void)
+{
+ /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
+ au_writel(0x00000000, 0xAE00001C);
+}
+
void __init board_setup(void)
{
u32 pin_func;
extern struct rtc_ops no_rtc_ops;
+void board_reset (void)
+{
+}
+
void __init board_setup(void)
{
u32 pin_func;
!!! I shall not define symbols starting with CONFIG_ !!!
#endif
+void board_reset (void)
+{
+}
+
void __init board_setup(void)
{
u32 pin_func, static_cfg0;
#include <asm/mipsregs.h>
#include <asm/reboot.h>
#include <asm/pgtable.h>
-#include <asm/au1000.h>
-#include <asm/pb1100.h>
+#include <asm/mach-au1x00/au1000.h>
+#include <asm/mach-pb1x00/pb1100.h>
#ifdef CONFIG_USB_OHCI
// Enable the workaround for the OHCI DoneHead
!!! I shall not define symbols starting with CONFIG_ !!!
#endif
+void board_reset (void)
+{
+ /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
+ au_writel(0x00000000, 0xAE00001C);
+}
+
void __init board_setup(void)
{
u32 pin_func;
#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
-#include <asm/au1000.h>
+#include <asm/mach-au1x00/au1000.h>
au1xxx_irq_map_t au1xxx_irq_map[] = {
{ AU1000_GPIO_9, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card Fully_Interted#
!!! I shall not define symbols starting with CONFIG_ !!!
#endif
+void board_reset (void)
+{
+ /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
+ au_writel(0x00000000, 0xAE00001C);
+}
+
void __init board_setup(void)
{
u32 pin_func;
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-pb1x00/pb1550.h>
+void board_reset (void)
+{
+ /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
+ au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
+}
+
void __init board_setup(void)
{
u32 pin_func;
#include <asm/pgtable.h>
#include <asm/au1000.h>
+void board_reset (void)
+{
+ /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
+ au_writel(0x00000000, 0xAE00001C);
+}
+
void __init board_setup(void)
{
u32 pin_func;
+++ /dev/null
-#
-# Makefile for the Baget specific kernel interface routines
-# under Linux.
-#
-
-obj-y := baget.o print.o setup.o time.o irq.o bagetIRQ.o \
- reset.o
-obj-$(CONFIG_VAC_RTC) += vacrtc.o
-
-EXTRA_AFLAGS := $(CFLAGS)
-
-bagetIRQ.o : bagetIRQ.S
- $(CC) $(CFLAGS) -c -o $@ $<
-
-##################### Baget Loader stuff ########################
-
-image: ../../../vmlinux
- cp -f $< $@
-
-image.bin: image
- $(OBJCOPY) -O binary $< $@
-
-ramdisk.bin:
- echo "Dummy ramdisk used. Provide your own if needed !" > $@
-
-dummy.c:
- touch $@
-
-dummy.o: dummy.c image.bin ramdisk.bin
- $(CC) $(CFLAGS) -c -o $@ $<
- $(OBJCOPY) --add-section=.vmlinux=image.bin \
- --add-section=.ramdisk=ramdisk.bin $@
-
-balo.h: image
- $(NM) $< | awk ' \
- BEGIN { printf "/* DO NOT EDIT THIS FILE */\n" } \
- /_ftext/ { printf "#define LOADADDR 0x%s\n", $$1 } \
- /kernel_entry/ { printf "#define START 0x%s\n", $$1 } \
- /balo_ramdisk_base/ { printf "#define RAMDISK_BASE 0x%s\n", $$1 } \
- /balo_ramdisk_size/ { printf "#define RAMDISK_SIZE 0x%s\n", $$1 } \
- ' > $@
-balo.o: balo.c balo.h
- $(CC) $(CFLAGS) -c $<
-
-balo_supp.o: balo_supp.S
- $(CC) $(CFLAGS) -c $<
-
-balo: balo.o dummy.o balo_supp.o print.o
- $(LD) $(LDFLAGS) -T ld.script.balo -o $@ $^
-
-clean:
- rm -f balo balo.h dummy.c image image.bin
-
+++ /dev/null
-/*
- * baget.c: Baget low level stuff
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- *
- */
-#include <stdarg.h>
-
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <asm/system.h>
-#include <asm/bootinfo.h>
-#include <asm/mipsregs.h>
-#include <asm/pgtable.h>
-
-#include <asm/baget/baget.h>
-
-/*
- * Following code is based on routines from 'mm/vmalloc.c'
- * Additional parameters ioaddr is needed to iterate across real I/O address.
- */
-static inline int alloc_area_pte(pte_t * pte, unsigned long address,
- unsigned long size, unsigned long ioaddr)
-{
- unsigned long end;
-
- address &= ~PMD_MASK;
- end = address + size;
- if (end > PMD_SIZE)
- end = PMD_SIZE;
- while (address < end) {
- unsigned long page;
- if (!pte_none(*pte))
- printk("kseg2_alloc_io: page already exists\n");
- /*
- * For MIPS looks pretty to have transparent mapping
- * for KSEG2 areas -- user can't access one, and no
- * problems with virtual <--> physical translation.
- */
- page = ioaddr & PAGE_MASK;
-
- set_pte(pte, __pte(page | pgprot_val(PAGE_USERIO) |
- _PAGE_GLOBAL | __READABLE | __WRITEABLE));
- address += PAGE_SIZE;
- ioaddr += PAGE_SIZE;
- pte++;
- }
- return 0;
-}
-
-static inline int alloc_area_pmd(pmd_t * pmd, unsigned long address,
- unsigned long size, unsigned long ioaddr)
-{
- unsigned long end;
-
- address &= ~PGDIR_MASK;
- end = address + size;
- if (end > PGDIR_SIZE)
- end = PGDIR_SIZE;
- while (address < end) {
- pte_t * pte = pte_alloc_kernel(pmd, address);
- if (!pte)
- return -ENOMEM;
- if (alloc_area_pte(pte, address, end - address, ioaddr))
- return -ENOMEM;
- address = (address + PMD_SIZE) & PMD_MASK;
- ioaddr += PMD_SIZE;
- pmd++;
- }
- return 0;
-}
-
-int kseg2_alloc_io (unsigned long address, unsigned long size)
-{
- pgd_t * dir;
- unsigned long end = address + size;
-
- dir = pgd_offset_k(address);
- flush_cache_all();
- while (address < end) {
- pmd_t *pmd;
- pgd_t olddir = *dir;
-
- pmd = pmd_alloc_kernel(dir, address);
- if (!pmd)
- return -ENOMEM;
- if (alloc_area_pmd(pmd, address, end - address, address))
- return -ENOMEM;
- if (pgd_val(olddir) != pgd_val(*dir))
- set_pgdir(address, *dir);
- address = (address + PGDIR_SIZE) & PGDIR_MASK;
- dir++;
- }
- flush_tlb_all();
- return 0;
-}
+++ /dev/null
-/*
- * bagetIRQ.S: Interrupt exception dispatch code for Baget/MIPS
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/addrspace.h>
-
- .text
- .set mips1
- .set reorder
- .set macro
- .set noat
- .align 5
-
-NESTED(bagetIRQ, PT_SIZE, sp)
- SAVE_ALL
- CLI # Important: mark KERNEL mode !
-
- la a1, baget_interrupt
- .set push
- .set noreorder
- jal a1
- .set pop
- move a0, sp
-
- la a1, ret_from_irq
- jr a1
-END(bagetIRQ)
-
-#define DBE_HANDLER 0x1C
-
-NESTED(try_read, PT_SIZE, sp)
- mfc0 t3, CP0_STATUS # save flags and
- CLI # disable interrupts
-
- li t0, KSEG2
- sltu t1, t0, a0 # Is it KSEG2 address ?
- beqz t1, mapped # No - already mapped !
-
- move t0, a0
- ori t0, 0xfff
- xori t0, 0xfff # round address to page
-
- ori t1, t0, 0xf00 # prepare EntryLo (N,V,D,G)
-
- mfc0 t2, CP0_ENTRYHI # save ASID value
- mtc0 zero, CP0_INDEX
- mtc0 t0, CP0_ENTRYHI # Load MMU values ...
- mtc0 t1, CP0_ENTRYLO0
- nop # let it understand
- nop
- tlbwi # ... and write ones
- nop
- nop
- mtc0 t2, CP0_ENTRYHI
-
-mapped:
- la t0, exception_handlers
- lw t1, DBE_HANDLER(t0) # save real handler
- la t2, dbe_handler
- sw t2, DBE_HANDLER(t0) # set temporary local handler
- li v0, -1 # default (failure) value
-
- li t2, 1
- beq t2, a1, 1f
- li t2, 2
- beq t2, a1, 2f
- li t2, 4
- beq t2, a1, 4f
- b out
-
-1: lbu v0, (a0) # byte
- b out
-
-2: lhu v0, (a0) # short
- b out
-
-4: lw v0, (a0) # word
-
-out:
- sw t1, DBE_HANDLER(t0) # restore real handler
- mtc0 t3, CP0_STATUS # restore CPU flags
- jr ra
-
-dbe_handler:
- li v0, -1 # mark our failure
- .set push
- .set noreorder
- b out # "no problems !"
- rfe # return from trap
- .set pop
-END(try_read)
+++ /dev/null
-/*
- * balo.c: BAget LOader
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <linux/kernel.h>
-#include <asm/system.h>
-#include <asm/ptrace.h>
-#include <asm/addrspace.h>
-
-#include <asm/baget/baget.h>
-
-#include "balo.h" /* Includes some kernel symbol values */
-
-static char *banner = "\nBaget Linux Loader v0.2\n";
-
-static void mem_move (long *to, long *from, long size)
-{
- while (size > 0) {
- *to++ = *from++;
- size -= sizeof(long);
- }
-}
-
-static volatile int *mem_limit = (volatile int*)KSEG1;
-static volatile int *mem_limit_dbe = (volatile int*)KSEG1;
-
-static int can_write (volatile int* p) {
- return p < (int*)(KSEG1+BALO_OFFSET) ||
- p >= (int*)(KSEG1+BALO_OFFSET+BALO_SIZE);
-}
-
-static volatile enum balo_state_enum {
- BALO_INIT,
- MEM_INIT,
- MEM_PROBE,
- START_KERNEL
-} balo_state = BALO_INIT;
-
-
-static __inline__ void reset_and_jump(int start, int mem_upper)
-{
- unsigned long tmp;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "mfc0\t$1, $12\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "ori\t$1, $1, 0xff00\n\t"
- "xori\t$1, $1, 0xff00\n\t"
- "mtc0\t$1, $12\n\t"
- "nop\n\t"
- "nop\n\t"
- "nop\n\t"
- "move\t%0, %2\n\t"
- "jr\t%1\n\t"
- "nop\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=&r" (tmp)
- : "Ir" (start), "Ir" (mem_upper)
- : "memory");
-}
-
-static void start_kernel(void)
-{
- extern char _vmlinux_start, _vmlinux_end;
- extern char _ramdisk_start, _ramdisk_end;
-
- outs( "Relocating Linux... " );
- mem_move((long*)KSEG0, (long*)&_vmlinux_start,
- &_vmlinux_end-&_vmlinux_start);
- outs("done.\n");
-
- if (&_ramdisk_start != &_ramdisk_end) {
- outs("Setting up RAMDISK... ");
- if (*(unsigned long*)RAMDISK_BASE != 0xBA) {
- outs("Bad RAMDISK_BASE signature in system image.\n");
- balo_hungup();
- }
- *(unsigned long*)RAMDISK_BASE = (unsigned long)&_ramdisk_start;
- *(unsigned long*)RAMDISK_SIZE = &_ramdisk_end -&_ramdisk_start;
- outs("done.\n");
- }
-
- {
- extern void flush_cache_low(int isize, int dsize);
- flush_cache_low(256*1024,256*1024);
- }
-
- balo_printf( "Kernel entry: %x\n\n", START);
- balo_state = START_KERNEL;
- reset_and_jump(START, (int)mem_limit-KSEG1+KSEG0);
-}
-
-
-static void mem_probe(void)
-{
- balo_state = MEM_PROBE;
- outs("RAM: <");
- while(mem_limit < mem_limit_dbe) {
- if (can_write(mem_limit) && *mem_limit != 0)
- break; /* cycle found */
- outc('.');
- if (can_write(mem_limit))
- *mem_limit = -1; /* mark */
- mem_limit += 0x40000;
- }
- outs(">\n");
- start_kernel();
-}
-
-volatile unsigned int int_cause;
-volatile unsigned int epc;
-volatile unsigned int badvaddr;
-
-static void print_regs(void)
-{
- balo_printf("CAUSE=%x EPC=%x BADVADDR=%x\n",
- int_cause, epc, badvaddr);
-}
-
-void int_handler(struct pt_regs *regs)
-{
- switch (balo_state) {
- case BALO_INIT:
- balo_printf("\nBALO: trap in balo itself.\n");
- print_regs();
- balo_hungup();
- break;
- case MEM_INIT:
- if ((int_cause & CAUSE_MASK) != CAUSE_DBE) {
- balo_printf("\nBALO: unexpected trap during memory init.\n");
- print_regs();
- balo_hungup();
- } else {
- mem_probe();
- }
- break;
- case MEM_PROBE:
- balo_printf("\nBALO: unexpected trap during memory probe.\n");
- print_regs();
- balo_hungup();
- break;
- case START_KERNEL:
- balo_printf("\nBALO: unexpected kernel trap.\n");
- print_regs();
- balo_hungup();
- break;
- }
- balo_printf("\nBALO: unexpected return from handler.\n");
- print_regs();
- balo_hungup();
-}
-
-static void mem_init(void)
-{
- balo_state = MEM_INIT;
-
- while(1) {
- *mem_limit_dbe;
- if (can_write(mem_limit_dbe))
- *mem_limit_dbe = 0;
-
- mem_limit_dbe += 0x40000; /* +1M */
- }
- /* no return: must go to int_handler */
-}
-
-void balo_entry(void)
-{
- extern void except_vec3_generic(void);
-
- cli();
- outs(banner);
- memcpy((void *)(KSEG0 + 0x80), &except_vec3_generic, 0x80);
- mem_init();
-}
-
-/* Needed for linking */
-
-int vsprintf(char *buf, const char *fmt, va_list arg)
-{
- outs("BALO: vsprintf called.\n");
- balo_hungup();
- return 0;
-}
+++ /dev/null
-/*
- * balo_supp.S: BAget Loader supplement
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-
- .text
- .set mips1
-
- /* General exception vector. */
-NESTED(except_vec3_generic, 0, sp)
- .set noat
- la k0, except_vec3_generic_code
- jr k0
-END(except_vec3_generic)
-
-NESTED(except_vec3_generic_code, 0, sp)
- SAVE_ALL
- mfc0 k1, CP0_CAUSE
- la k0, int_cause
- sw k1, (k0)
-
- mfc0 k1, CP0_EPC
- la k0, epc
- sw k1, (k0)
-
- mfc0 k1, CP0_BADVADDR
- la k0, badvaddr
- sw k1, (k0)
-
- la k0, int_handler
- .set noreorder
- jal k0
- .set reorder
- move a0, sp
-
- RESTORE_ALL_AND_RET
-END(except_vec3_generic_code)
-
- .align 5
-NESTED(flush_cache_low, PT_SIZE, sp)
- .set at
- .set macro
- .set noreorder
-
- move t1, a0 # ISIZE
- move t2, a1 # DSIZE
-
- mfc0 t3, CP0_STATUS # Save the status register.
- mtc0 zero, CP0_STATUS # Disable interrupts.
- la v0, 1f
- or v0, KSEG1 # Run uncached.
- j v0
- nop
-/*
- * Flush the instruction cache.
- */
-1:
- li v0, ST0_DE | ST0_CE
- mtc0 v0, CP0_STATUS # Isolate and swap caches.
- li t0, KSEG1
- subu t0, t0, t1
- li t1, KSEG1
- la v0, 1f # Run cached
- j v0
- nop
-1:
- addu t0, t0, 64
- sb zero, -64(t0)
- sb zero, -60(t0)
- sb zero, -56(t0)
- sb zero, -52(t0)
- sb zero, -48(t0)
- sb zero, -44(t0)
- sb zero, -40(t0)
- sb zero, -36(t0)
- sb zero, -32(t0)
- sb zero, -28(t0)
- sb zero, -24(t0)
- sb zero, -20(t0)
- sb zero, -16(t0)
- sb zero, -12(t0)
- sb zero, -8(t0)
- bne t0, t1, 1b
- sb zero, -4(t0)
-
- la v0, 1f
- or v0, KSEG1
- j v0 # Run uncached
- nop
-/*
- * Flush the data cache.
- */
-1:
- li v0, ST0_DE
- mtc0 v0, CP0_STATUS # Isolate and swap back caches
- li t0, KSEG1
- subu t0, t0, t2
- la v0, 1f
- j v0 # Back to cached mode
- nop
-1:
- addu t0, t0, 64
- sb zero, -64(t0)
- sb zero, -60(t0)
- sb zero, -56(t0)
- sb zero, -52(t0)
- sb zero, -48(t0)
- sb zero, -44(t0)
- sb zero, -40(t0)
- sb zero, -36(t0)
- sb zero, -32(t0)
- sb zero, -28(t0)
- sb zero, -24(t0)
- sb zero, -20(t0)
- sb zero, -16(t0)
- sb zero, -12(t0)
- sb zero, -8(t0)
- bne t0, t1, 1b
- sb zero, -4(t0)
-
- nop # Insure isolated stores
- nop # out of pipe.
- nop
- nop
- mtc0 t3, CP0_STATUS # Restore status reg.
- nop # Insure cache unisolated.
- nop
- nop
- nop
- j ra
- nop
-END(flush_cache_low)
-
-/* To satisfy macros only */
-EXPORT(kernelsp)
- PTR 0x80001000
+++ /dev/null
-/*
- * Code to handle Baget/MIPS IRQs plus some generic interrupt stuff.
- *
- * Copyright (C) 1998 Vladimir Roganov & Gleb Raiko
- * Code (mostly sleleton and comments) derived from DECstation IRQ
- * handling.
- */
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/module.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/timex.h>
-#include <linux/slab.h>
-#include <linux/random.h>
-#include <linux/delay.h>
-#include <linux/bitops.h>
-
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-
-#include <asm/baget/baget.h>
-
-volatile unsigned long irq_err_count;
-
-/*
- * This table is a correspondence between IRQ numbers and CPU PILs
- */
-
-static int irq_to_pil_map[BAGET_IRQ_NR] = {
- 7/*fixme: dma_err -1*/,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, /* 0x00 - 0x0f */
- -1,-1,-1,-1, 3,-1,-1,-1, 2, 2, 2,-1, 3,-1,-1,3/*fixme: lance*/, /* 0x10 - 0x1f */
- -1,-1,-1,-1,-1,-1, 5,-1,-1,-1,-1,-1, 7,-1,-1,-1, /* 0x20 - 0x2f */
- -1, 3, 2/*fixme systimer:3*/, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 /* 0x30 - 0x3f */
-};
-
-static inline int irq_to_pil(int irq_nr)
-{
- int pil = -1;
-
- if (irq_nr >= BAGET_IRQ_NR)
- baget_printk("irq_to_pil: too large irq_nr = 0x%x\n", irq_nr);
- else {
- pil = irq_to_pil_map[irq_nr];
- if (pil == -1)
- baget_printk("irq_to_pil: unknown irq = 0x%x\n", irq_nr);
- }
-
- return pil;
-}
-
-/* Function for careful CP0 interrupt mask access */
-
-static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
-{
- unsigned long status = read_c0_status();
- status &= ~((clr_mask & 0xFF) << 8);
- status |= (set_mask & 0xFF) << 8;
- write_c0_status(status);
-}
-
-/*
- * These two functions may be used for unconditional IRQ
- * masking via their PIL protection.
- */
-
-static inline void mask_irq(unsigned int irq_nr)
-{
- modify_cp0_intmask(irq_to_pil(irq_nr), 0);
-}
-
-static inline void unmask_irq(unsigned int irq_nr)
-{
- modify_cp0_intmask(0, irq_to_pil(irq_nr));
-}
-
-/*
- * The following section is introduced for masking/unasking IRQ
- * only while no more IRQs uses same CPU PIL.
- *
- * These functions are used in request_irq, free_irq, but it looks
- * they cannot change something: CP0_STATUS is private for any
- * process, and their action is invisible for system.
- */
-
-static volatile unsigned int pil_in_use[BAGET_PIL_NR] = { 0, };
-
-void mask_irq_count(int irq_nr)
-{
- unsigned long flags;
- int pil = irq_to_pil(irq_nr);
-
- local_irq_save(flags);
- if (!--pil_in_use[pil])
- mask_irq(irq_nr);
- local_irq_restore(flags);
-}
-
-void unmask_irq_count(int irq_nr)
-{
- unsigned long flags;
- int pil = irq_to_pil(irq_nr);
-
- local_irq_save(flags);
- if (!pil_in_use[pil]++)
- unmask_irq(irq_nr);
- local_irq_restore(flags);
-}
-
-/*
- * Two functions below are exported versions of mask/unmask IRQ
- */
-
-void disable_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- mask_irq(irq_nr);
- local_irq_restore(flags);
-}
-
-void enable_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- local_irq_save(flags);
- unmask_irq(irq_nr);
- local_irq_restore(flags);
-}
-
-/*
- * Pointers to the low-level handlers: first the general ones, then the
- * fast ones, then the bad ones.
- */
-static struct irqaction *irq_action[BAGET_IRQ_NR] = { NULL, };
-
-int get_irq_list(char *buf)
-{
- int i, len = 0;
- struct irqaction * action;
- unsigned long flags;
-
- for (i = 0 ; i < BAGET_IRQ_NR ; i++) {
- local_irq_save(flags);
- action = irq_action[i];
- if (!action)
- gotos skip;
- len += sprintf(buf+len, "%2d: %8d %c %s",
- i, kstat_this_cpu.irqs[i],
- (action->flags & SA_INTERRUPT) ? '+' : ' ',
- action->name);
- for (action=action->next; action; action = action->next) {
- len += sprintf(buf+len, ",%s %s",
- (action->flags & SA_INTERRUPT) ? " +" : "",
- action->name);
- }
- len += sprintf(buf+len, "\n");
-skip:
- local_irq_restore(flags);
- }
- return len;
-}
-
-
-/*
- * do_IRQ handles IRQ's that have been installed without the
- * SA_INTERRUPT flag: it uses the full signal-handling return
- * and runs with other interrupts enabled. All relatively slow
- * IRQ's should use this format: notably the keyboard/timer
- * routines.
- */
-static void do_IRQ(int irq, struct pt_regs * regs)
-{
- struct irqaction *action;
- int ret, do_random, cpu;
-
- cpu = smp_processor_id();
- irq_enter();
- kstat_cpus(cpu).irqs[irq]++;
-
- mask_irq(irq);
- action = *(irq + irq_action);
- if (action) {
- if (!(action->flags & SA_INTERRUPT))
- local_irq_enable();
- action = *(irq + irq_action);
- do_random = 0;
- do {
- ret = action->handler(irq, action->dev_id, regs);
- if (ret == IRQ_HANDLED)
- do_random |= action->flags;
- action = action->next;
- } while (action);
- if (do_random & SA_SAMPLE_RANDOM)
- add_interrupt_randomness(irq);
- local_irq_disable();
- } else {
- printk("do_IRQ: Unregistered IRQ (0x%X) occurred\n", irq);
- }
- unmask_irq(irq);
- irq_exit();
-
- /* unmasking and bottom half handling is done magically for us. */
-}
-
-/*
- * What to do in case of 'no VIC register available' for current interrupt
- */
-static void vic_reg_error(unsigned long address, unsigned char active_pils)
-{
- printk("\nNo VIC register found: reg=%08lx active_pils=%02x\n"
- "Current interrupt mask from CP0_CAUSE: %02x\n",
- address, 0xff & active_pils,
- 0xff & (read_c0_cause()>>8));
- { int i; for (i=0; i<10000; i++) udelay(1000); }
-}
-
-static char baget_fpu_irq = BAGET_FPU_IRQ;
-#define BAGET_INT_FPU {(unsigned long)&baget_fpu_irq, 1}
-
-/*
- * Main interrupt handler: interrupt demultiplexer
- */
-asmlinkage void baget_interrupt(struct pt_regs *regs)
-{
- static struct baget_int_reg int_reg[BAGET_PIL_NR] = {
- BAGET_INT_NONE, BAGET_INT_NONE, BAGET_INT0_ACK, BAGET_INT1_ACK,
- BAGET_INT_NONE, BAGET_INT_FPU, BAGET_INT_NONE, BAGET_INT5_ACK
- };
- unsigned char active_pils;
- while ((active_pils = read_c0_cause()>>8)) {
- int pil;
- struct baget_int_reg* reg;
-
- for (pil = 0; pil < BAGET_PIL_NR; pil++) {
- if (!(active_pils & (1<<pil))) continue;
-
- reg = &int_reg[pil];
-
- if (reg->address) {
- extern int try_read(unsigned long,int);
- int irq = try_read(reg->address, reg->size);
-
- if (irq != -1)
- do_IRQ(BAGET_IRQ_MASK(irq), regs);
- else
- vic_reg_error(reg->address, active_pils);
- } else {
- printk("baget_interrupt: unknown interrupt "
- "(pil = %d)\n", pil);
- }
- }
- }
-}
-
-/*
- * Idea is to put all interrupts
- * in a single table and differenciate them just by number.
- */
-int setup_baget_irq(int irq, struct irqaction * new)
-{
- int shared = 0;
- struct irqaction *old, **p;
- unsigned long flags;
-
- p = irq_action + irq;
- if ((old = *p) != NULL) {
- /* Can't share interrupts unless both agree to */
- if (!(old->flags & new->flags & SA_SHIRQ))
- return -EBUSY;
-
- /* Can't share interrupts unless both are same type */
- if ((old->flags ^ new->flags) & SA_INTERRUPT)
- return -EBUSY;
-
- /* add new interrupt at end of irq queue */
- do {
- p = &old->next;
- old = *p;
- } while (old);
- shared = 1;
- }
-
- if (new->flags & SA_SAMPLE_RANDOM)
- rand_initialize_irq(irq);
-
- local_irq_save(flags);
- *p = new;
- local_irq_restore(flags);
-
- if (!shared) {
- unmask_irq_count(irq);
- }
-
- return 0;
-}
-
-int request_irq(unsigned int irq,
- void (*handler)(int, void *, struct pt_regs *),
- unsigned long irqflags,
- const char * devname,
- void *dev_id)
-{
- int retval;
- struct irqaction * action;
-
- if (irq >= BAGET_IRQ_NR)
- return -EINVAL;
- if (!handler)
- return -EINVAL;
- if (irq_to_pil_map[irq] < 0)
- return -EINVAL;
-
- action = (struct irqaction *)
- kmalloc(sizeof(struct irqaction), GFP_KERNEL);
- if (!action)
- return -ENOMEM;
-
- action->handler = handler;
- action->flags = irqflags;
- cpus_clear(action->mask);
- action->name = devname;
- action->next = NULL;
- action->dev_id = dev_id;
-
- retval = setup_baget_irq(irq, action);
-
- if (retval)
- kfree(action);
-
- return retval;
-}
-
-EXPORT_SYMBOL(request_irq);
-
-void free_irq(unsigned int irq, void *dev_id)
-{
- struct irqaction * action, **p;
- unsigned long flags;
-
- if (irq >= BAGET_IRQ_NR)
- printk("Trying to free IRQ%d\n",irq);
-
- for (p = irq + irq_action; (action = *p) != NULL; p = &action->next) {
- if (action->dev_id != dev_id)
- continue;
-
- /* Found it - now free it */
- local_irq_save(flags);
- *p = action->next;
- if (!irq[irq_action])
- unmask_irq_count(irq);
- local_irq_restore(flags);
- kfree(action);
- return;
- }
- printk("Trying to free free IRQ%d\n",irq);
-}
-
-EXPORT_SYMBOL(free_irq);
-
-unsigned long probe_irq_on (void)
-{
- /* TODO */
- return 0;
-}
-
-EXPORT_SYMBOL(probe_irq_on);
-
-int probe_irq_off (unsigned long irqs)
-{
- /* TODO */
- return 0;
-}
-
-EXPORT_SYMBOL(probe_irq_off);
-
-
-static void write_err_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-{
- *(volatile char*) BAGET_WRERR_ACK = 0;
-}
-
-static struct irqaction irq0 =
-{ write_err_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "bus write error", NULL, NULL};
-
-void __init init_IRQ(void)
-{
- irq_setup();
-
- /* Enable access to VIC interrupt registers */
- vac_outw(0xacef | 0x8200, VAC_PIO_FUNC);
-
- /* Enable interrupts for pils 2 and 3 (lines 0 and 1) */
- modify_cp0_intmask(0, (1<<2)|(1<<3));
-
- if (setup_baget_irq(0, &irq0) < 0)
- printk("init_IRQ: unable to register write_err irq\n");
-}
+++ /dev/null
-OUTPUT_FORMAT("elf32-tradbigmips")
-OUTPUT_ARCH(mips)
-ENTRY(balo_entry)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = 0x80400000;
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.init : { *(.rel.init) }
- .rela.init : { *(.rela.init) }
- .rel.fini : { *(.rel.fini) }
- .rela.fini : { *(.rela.fini) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) } =0
- .text :
- {
- _ftext = . ;
- *(.text)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- /* .gnu.warning sections are handled specially by elf32.em. */
- *(.gnu.warning)
-
- _etext = .;
- PROVIDE (etext = .);
-
- /* Startup code */
- . = ALIGN(4096);
- __init_begin = .;
- *(.text.init)
- *(.data.init)
- . = ALIGN(4096); /* Align double page for init_task_union */
- __init_end = .;
-
- *(.fini)
- *(.reginfo)
- /* Adjust the address for the data segment. We want to adjust up to
- the same address within the page on the next page up. It would
- be more correct to do this:
- . = .;
- The current expression does not correctly handle the case of a
- text segment ending precisely at the end of a page; it causes the
- data segment to skip a page. The above expression does not have
- this problem, but it will currently (2/95) cause BFD to allocate
- a single segment, combining both text and data, for this case.
- This will prevent the text segment from being shared among
- multiple executions of the program; I think that is more
- important than losing a page of the virtual address space (note
- that no actual memory is lost; the page which is skipped can not
- be referenced). */
- . = .;
- _fdata = . ;
- *(.data)
- CONSTRUCTORS
-
- *(.data1)
- _gp = . + 0x8000;
- *(.lit8)
- *(.lit4)
- *(.ctors)
- *(.dtors)
- *(.got.plt) *(.got)
- *(.dynamic)
- /* We want the small data sections together, so single-instruction offsets
- can access them all, and initialized data all before uninitialized, so
- we can shorten the on-disk segment size. */
- *(.sdata)
- _edata = .;
- PROVIDE (edata = .);
-
- __bss_start = .;
- _fbss = .;
-
- *(.dynbss)
- *(.bss)
- *(COMMON)
- _end = . ;
- PROVIDE (end = .);
- *(.sbss)
- *(.scommon)
-
- /* These are needed for ELF backends which have not yet been
- converted to the new style linker. */
- *(.stab)
- *(.stabstr)
- /* DWARF debug sections.
- Symbols in the .debug DWARF section are relative to the beginning of the
- section so we begin .debug at 0. It's not clear yet what needs to happen
- for the others. */
- *(.debug)
- *(.debug_srcinfo)
- *(.debug_aranges)
- *(.debug_pubnames)
- *(.debug_sfnames)
- *(.line)
- /* These must appear regardless of . */
- *(.gptab.data) *(.gptab.sdata)
- *(.gptab.bss) *(.gptab.sbss)
-
- _vmlinux_start = .;
- *(.vmlinux)
- _vmlinux_end = .;
-
- _ramdisk_start = .;
- *(.ramdisk)
- _ramdisk_end = .;
-
-} =0
-
-}
+++ /dev/null
-/*
- * print.c: Simple print fascility
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <stdarg.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/baget/baget.h>
-
-/*
- * Define this to see 'baget_printk' (debug) messages
- */
-// #define BAGET_PRINTK
-
-/*
- * This function is same for BALO and Linux baget_printk,
- * and normally prints characted to second (UART A) console.
- */
-
-static void delay(void) {}
-
-static void outc_low(char c)
-{
- int i;
- vac_outb(c, VAC_UART_B_TX);
- for (i=0; i<10000; i++)
- delay();
-}
-
-void outc(char c)
-{
- if (c == '\n')
- outc_low('\r');
- outc_low(c);
-}
-
-void outs(char *s)
-{
- while(*s) outc(*s++);
-}
-
-void baget_write(char *s, int l)
-{
- while(l--)
- outc(*s++);
-}
-
-int baget_printk(const char *fmt, ...)
-{
-#ifdef BAGET_PRINTK
- va_list args;
- int i;
- static char buf[1024];
-
- va_start(args, fmt);
- i = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf)-4 */
- va_end(args);
- baget_write(buf, i);
- return i;
-#else
- return 0;
-#endif
-}
-
-static __inline__ void puthex( int a )
-{
- static char s[9];
- static char e[] = "0123456789ABCDEF";
- int i;
- for( i = 7; i >= 0; i--, a >>= 4 ) s[i] = e[a & 0x0F];
- s[8] = '\0';
- outs( s );
-}
-
-void __init balo_printf( char *f, ... )
-{
- int *arg = (int*)&f + 1;
- char c;
- int format = 0;
-
- while((c = *f++) != 0) {
- switch(c) {
- default:
- if(format) {
- outc('%');
- format = 0;
- }
- outc( c );
- break;
- case '%':
- if( format ){
- format = 0;
- outc(c);
- } else format = 1;
- break;
- case 'x':
- if(format) puthex( *arg++ );
- else outc(c);
- format = 0;
- break;
- case 's':
- if( format ) outs((char *)*arg++);
- else outc(c);
- format = 0;
- break;
- }
- }
-}
-
-void __init balo_hungup(void)
-{
- outs("Hunging up.\n");
- while(1);
-}
+++ /dev/null
-#
-# Makefile for the Baget/MIPS prom emulator library routines.
-#
-
-lib-y := init.o
+++ /dev/null
-/*
- * init.c: PROM library initialisation code.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <linux/init.h>
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-
-const char *get_system_type(void)
-{
- /* Should probably return one of "BT23-201", "BT23-202" */
- return "Baget";
-}
-
-void __init prom_init(void)
-{
- mem_upper = PHYSADDR(fw_arg0);
-
- mips_machgroup = MACH_GROUP_UNKNOWN;
- mips_machtype = MACH_UNKNOWN;
- arcs_cmdline[0] = 0;
-
- vac_memory_upper = mem_upper;
-
- add_memory_region(0, mem_upper, BOOT_MEM_RAM);
-}
-
-unsigned long __init prom_free_prom_memory(void)
-{
- return 0;
-}
+++ /dev/null
-#include <linux/kernel.h>
-#include <asm/system.h>
-#include <asm/baget/baget.h>
-
-
-#define R3000_RESET_VEC 0xbfc00000
-typedef void vector(void);
-
-
-static void baget_reboot(char *from_fun)
-{
- cli();
- baget_printk("\n%s: jumping to RESET code...\n", from_fun);
- (*(vector*)R3000_RESET_VEC)();
-}
-
-/* fixme: proper functionality */
-
-void baget_machine_restart(char *command)
-{
- baget_reboot("restart");
-}
-
-void baget_machine_halt(void)
-{
- baget_reboot("halt");
-}
-
-void baget_machine_power_off(void)
-{
- baget_reboot("power off");
-}
+++ /dev/null
-/*
- * setup.c: Baget/MIPS specific setup, including init of the feature struct.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <asm/irq.h>
-#include <asm/addrspace.h>
-#include <asm/reboot.h>
-
-#include <asm/baget/baget.h>
-
-long int vac_memory_upper;
-
-#define CACHEABLE_STR(val) ((val) ? "not cached" : "cached")
-
-static void __init vac_show(void)
-{
- int i;
- unsigned short val, decode = vac_inw(VAC_DECODE_CTRL);
- unsigned short a24_base = vac_inw(VAC_A24_BASE);
- unsigned long a24_addr = ((unsigned long)
- (a24_base & VAC_A24_MASK)) << 16;
- char *decode_mode[] = { "eprom", "vsb", "shared", "dram" };
- char *address_mode[] = { "", ", A16", ", A32/A24", ", A32/A24/A16" };
- char *state[] = { "", " on write", " on read", " on read/write", };
- char *region_mode[] = { "inactive", "shared", "vsb", "vme" };
- char *asiz[] = { "user", "A32", "A16", "A24" };
- unsigned short regs[] = { VAC_REG1, VAC_REG2, VAC_REG3 };
- unsigned short bndr[] = { VAC_DRAM_MASK,VAC_BNDR2,VAC_BNDR3 };
- unsigned short io_sels[] = { VAC_IOSEL0_CTRL,
- VAC_IOSEL1_CTRL,
- VAC_IOSEL2_CTRL,
- VAC_IOSEL3_CTRL,
- VAC_IOSEL4_CTRL,
- VAC_IOSEL5_CTRL };
-
- printk("[DSACKi %s, DRAMCS%s qualified, boundary%s qualified%s]\n",
- (decode & VAC_DECODE_DSACKI) ? "on" : "off",
- (decode & VAC_DECODE_QFY_DRAMCS) ? "" : " not",
- (decode & VAC_DECODE_QFY_BNDR) ? "" : " not",
- (decode & VAC_DECODE_FPUCS) ? ", fpu" : "");
-
- printk("slave0 ");
- if (decode & VAC_DECODE_RDR_SLSEL0)
- printk("at %08lx (%d MB)\t[dram %s]\n",
- ((unsigned long)vac_inw(VAC_SLSEL0_BASE))<<16,
- ((0xffff ^ vac_inw(VAC_SLSEL0_MASK)) + 1) >> 4,
- (decode & VAC_DECODE_QFY_SLSEL0) ? "qualified" : "");
- else
- printk("off\n");
-
- printk("slave1 ");
- if (decode & VAC_DECODE_RDR_SLSEL1)
- printk("at %08lx (%d MB)\t[%s%s, %s]\n",
- ((unsigned long)vac_inw(VAC_SLSEL1_BASE))<<16,
- ((0xffff ^ vac_inw(VAC_SLSEL1_MASK)) + 1) >> 4,
- decode_mode[VAC_DECODE_MODE_VAL(decode)],
- address_mode[VAC_DECODE_CMP_SLSEL1_VAL(decode)],
- (decode & VAC_DECODE_QFY_SLSEL1) ? "qualified" : "");
- else
- printk("off\n");
-
- printk("icf global at %04x, module at %04x [%s]\n",
- ((unsigned int)
- VAC_ICFSEL_GLOBAL_VAL(vac_inw(VAC_ICFSEL_BASE)))<<4,
- ((unsigned int)
- VAC_ICFSEL_MODULE_VAL(vac_inw(VAC_ICFSEL_BASE)))<<4,
- (decode & VAC_DECODE_QFY_ICFSEL) ? "qualified" : "");
-
-
- printk("region0 at 00000000 (%dMB)\t[dram, %s, delay %d cpuclk"
- ", cached]\n",
- (vac_inw(VAC_DRAM_MASK)+1)>>4,
- (decode & VAC_DECODE_DSACK) ? "D32" : "3state",
- VAC_DECODE_CPUCLK_VAL(decode));
-
- for (i = 0; i < sizeof(regs)/sizeof(regs[0]); i++) {
- unsigned long from =
- ((unsigned long)vac_inw(bndr[i]))<<16;
- unsigned long to =
- ((unsigned long)
- ((i+1 == sizeof(bndr)/sizeof(bndr[0])) ?
- 0xff00 : vac_inw(bndr[i+1])))<<16;
-
-
- val = vac_inw(regs[i]);
- printk("region%d at %08lx (%dMB)\t[%s %s/%s, %s]\n",
- i+1,
- from,
- (unsigned int)((to - from) >> 20),
- region_mode[VAC_REG_MODE(val)],
- asiz[VAC_REG_ASIZ_VAL(val)],
- ((val & VAC_REG_WORD) ? "D16" : "D32"),
- CACHEABLE_STR(val&VAC_A24_A24_CACHINH));
-
- if (a24_addr >= from && a24_addr < to)
- printk("\ta24 at %08lx (%dMB)\t[vme, A24/%s, %s]\n",
- a24_addr,
- min((unsigned int)(a24_addr - from)>>20, 32U),
- (a24_base & VAC_A24_DATAPATH) ? "user" :
- ((a24_base & VAC_A24_D32_ENABLE) ?
- "D32" : "D16"),
- CACHEABLE_STR(a24_base & VAC_A24_A24_CACHINH));
- }
-
- printk("region4 at ff000000 (15MB)\t[eprom]\n");
- val = vac_inw(VAC_EPROMCS_CTRL);
- printk("\t[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
- "read %d%s, write %d%s, assert %d%s]\n",
- VAC_CTRL_DELAY_DSACKI_VAL(val),
- state[val & (VAC_CTRL_IORD|VAC_CTRL_IOWR)],
- (val & VAC_CTRL_DSACK0) ? "dsack0*, " : "",
- (val & VAC_CTRL_DSACK1) ? "dsack1*, " : "",
- VAC_CTRL_RECOVERY_IOSELI_VAL(val),
- VAC_CTRL_DELAY_IORD_VAL(val)/2,
- (VAC_CTRL_DELAY_IORD_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOWR_VAL(val)/2,
- (VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
- (VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "");
-
- printk("region5 at fff00000 (896KB)\t[local io, %s]\n",
- CACHEABLE_STR(vac_inw(VAC_A24_BASE) & VAC_A24_IO_CACHINH));
-
- for (i = 0; i < sizeof(io_sels)/sizeof(io_sels[0]); i++) {
- val = vac_inw(io_sels[i]);
- printk("\tio%d[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
- "\n\t read %d%s cpuclk, write %d%s cpuclk, "
- "assert %d%s%s cpuclk]\n",
- i,
- VAC_CTRL_DELAY_DSACKI_VAL(val),
- state[val & (VAC_CTRL_IORD|VAC_CTRL_IOWR)],
- (val & VAC_CTRL_DSACK0) ? "dsack0*, " : "",
- (val & VAC_CTRL_DSACK1) ? "dsack1*, " : "",
- VAC_CTRL_RECOVERY_IOSELI_VAL(val),
- VAC_CTRL_DELAY_IORD_VAL(val)/2,
- (VAC_CTRL_DELAY_IORD_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOWR_VAL(val)/2,
- (VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
- (VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "",
- (vac_inw(VAC_DEV_LOC) & VAC_DEV_LOC_IOSEL(i)) ?
- ", id" : "");
- }
-
- printk("region6 at fffe0000 (128KB)\t[vme, A16/%s, "
- "not cached]\n",
- (a24_base & VAC_A24_A16D32_ENABLE) ?
- ((a24_base & VAC_A24_A16D32) ? "D32" : "D16") : "user");
-
- val = vac_inw(VAC_SHRCS_CTRL);
- printk("shared[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
- "read %d%s, write %d%s, assert %d%s]\n",
- VAC_CTRL_DELAY_DSACKI_VAL(val),
- state[val & (VAC_CTRL_IORD|VAC_CTRL_IOWR)],
- (val & VAC_CTRL_DSACK0) ? "dsack0*, " : "",
- (val & VAC_CTRL_DSACK1) ? "dsack1*, " : "",
- VAC_CTRL_RECOVERY_IOSELI_VAL(val),
- VAC_CTRL_DELAY_IORD_VAL(val)/2,
- (VAC_CTRL_DELAY_IORD_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOWR_VAL(val)/2,
- (VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
- VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
- (VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "");
-}
-
-static void __init vac_init(void)
-{
- unsigned short mem_limit = (vac_memory_upper >> 16);
-
- switch(vac_inw(VAC_ID)) {
- case 0x1AC0:
- printk("VAC068-F5: ");
- break;
- case 0x1AC1:
- printk("VAC068A: ");
- break;
- default:
- panic("Unknown VAC revision number");
- }
-
- vac_outw(mem_limit-1, VAC_DRAM_MASK);
- vac_outw(mem_limit, VAC_BNDR2);
- vac_outw(mem_limit, VAC_BNDR3);
- vac_outw(((BAGET_A24M_BASE>>16)&~VAC_A24_D32_ENABLE)|VAC_A24_DATAPATH,
- VAC_A24_BASE);
- vac_outw(VAC_REG_INACTIVE|VAC_REG_ASIZ0,VAC_REG1);
- vac_outw(VAC_REG_INACTIVE|VAC_REG_ASIZ0,VAC_REG2);
- vac_outw(VAC_REG_MWB|VAC_REG_ASIZ1,VAC_REG3);
- vac_outw(BAGET_A24S_BASE>>16,VAC_SLSEL0_BASE);
- vac_outw(BAGET_A24S_MASK>>16,VAC_SLSEL0_MASK);
- vac_outw(BAGET_A24S_BASE>>16,VAC_SLSEL1_BASE);
- vac_outw(BAGET_A24S_MASK>>16,VAC_SLSEL1_MASK);
- vac_outw(BAGET_GSW_BASE|BAGET_MSW_BASE(0),VAC_ICFSEL_BASE);
- vac_outw(VAC_DECODE_FPUCS|
- VAC_DECODE_CPUCLK(3)|
- VAC_DECODE_RDR_SLSEL0|VAC_DECODE_RDR_SLSEL1|
- VAC_DECODE_DSACK|
- VAC_DECODE_QFY_BNDR|
- VAC_DECODE_QFY_ICFSEL|
- VAC_DECODE_QFY_SLSEL1|VAC_DECODE_QFY_SLSEL0|
- VAC_DECODE_CMP_SLSEL1_HI|
- VAC_DECODE_DRAMCS|
- VAC_DECODE_QFY_DRAMCS|
- VAC_DECODE_DSACKI,VAC_DECODE_CTRL);
- vac_outw(VAC_PIO_FUNC_UART_A_TX|VAC_PIO_FUNC_UART_A_RX|
- VAC_PIO_FUNC_UART_B_TX|VAC_PIO_FUNC_UART_B_RX|
- VAC_PIO_FUNC_IOWR|
- VAC_PIO_FUNC_IOSEL3|
- VAC_PIO_FUNC_IRQ7|VAC_PIO_FUNC_IRQ10|VAC_PIO_FUNC_IRQ11|
- VAC_PIO_FUNC_IOSEL2|
- VAC_PIO_FUNC_FCIACK,VAC_PIO_FUNC);
- vac_outw(VAC_PIO_DIR_FCIACK |
- VAC_PIO_DIR_OUT(0) |
- VAC_PIO_DIR_OUT(1) |
- VAC_PIO_DIR_OUT(2) |
- VAC_PIO_DIR_OUT(3) |
- VAC_PIO_DIR_IN(4) |
- VAC_PIO_DIR_OUT(5) |
- VAC_PIO_DIR_OUT(6) |
- VAC_PIO_DIR_OUT(7) |
- VAC_PIO_DIR_OUT(8) |
- VAC_PIO_DIR_IN(9) |
- VAC_PIO_DIR_OUT(10)|
- VAC_PIO_DIR_OUT(11)|
- VAC_PIO_DIR_OUT(12)|
- VAC_PIO_DIR_OUT(13),VAC_PIO_DIRECTION);
- vac_outw(VAC_DEV_LOC_IOSEL(2),VAC_DEV_LOC);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(1)|
- VAC_CTRL_DELAY_DSACKI(8),VAC_SHRCS_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(1)|
- VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
- VAC_CTRL_DELAY_DSACKI(8),VAC_EPROMCS_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL0_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL1_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL2_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL3_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL4_CTRL);
- vac_outw(VAC_CTRL_IOWR|
- VAC_CTRL_DELAY_IOWR(3)|
- VAC_CTRL_DELAY_IORD(3)|
- VAC_CTRL_RECOVERY_IOSELI(2)|
- VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL5_CTRL);
-
- vac_show();
-}
-
-static void __init vac_start(void)
-{
- vac_outw(0, VAC_ID);
- vac_outw(VAC_INT_CTRL_TIMER_DISABLE|
- VAC_INT_CTRL_UART_B_DISABLE|
- VAC_INT_CTRL_UART_A_DISABLE|
- VAC_INT_CTRL_MBOX_DISABLE|
- VAC_INT_CTRL_PIO4_DISABLE|
- VAC_INT_CTRL_PIO7_DISABLE|
- VAC_INT_CTRL_PIO8_DISABLE|
- VAC_INT_CTRL_PIO9_DISABLE,VAC_INT_CTRL);
- vac_outw(VAC_INT_CTRL_TIMER_PIO10|
- VAC_INT_CTRL_UART_B_PIO7|
- VAC_INT_CTRL_UART_A_PIO7,VAC_INT_CTRL);
- /*
- * Set quadro speed for both UARTs.
- * To do it we need use formulae from VIC/VAC manual,
- * keeping in mind Baget's 50MHz frequency...
- */
- vac_outw((500000/(384*16))<<8,VAC_CPU_CLK_DIV);
-}
-
-static void __init vic_show(void)
-{
- unsigned char val;
- char *timeout[] = { "4", "16", "32", "64", "128", "256", "disabled" };
- char *deadlock[] = { "[dedlk only]", "[dedlk only]",
- "[dedlk], [halt w/ rmc], [lberr]",
- "[dedlk], [halt w/o rmc], [lberr]" };
-
- val = vic_inb(VIC_IFACE_CFG);
- if (val & VIC_IFACE_CFG_VME)
- printk("VMEbus controller ");
- if (val & VIC_IFACE_CFG_TURBO)
- printk("turbo ");
- if (val & VIC_IFACE_CFG_MSTAB)
- printk("metastability delay ");
- printk("%s ",
- deadlock[VIC_IFACE_CFG_DEADLOCK_VAL(val)]);
-
-
- printk("interrupts: ");
- val = vic_inb(VIC_ERR_INT);
- if (!(val & VIC_ERR_INT_SYSFAIL))
- printk("[sysfail]");
- if (!(val & VIC_ERR_INT_TIMO))
- printk("[timeout]");
- if (!(val & VIC_ERR_INT_WRPOST))
- printk("[write post]");
- if (!(val & VIC_ERR_INT_ACFAIL))
- printk("[acfail] ");
- printk("\n");
-
- printk("timeouts: ");
- val = vic_inb(VIC_XFER_TIMO);
- printk("local %s, vme %s ",
- timeout[VIC_XFER_TIMO_LOCAL_PERIOD_VAL(val)],
- timeout[VIC_XFER_TIMO_VME_PERIOD_VAL(val)]);
- if (val & VIC_XFER_TIMO_VME)
- printk("acquisition ");
- if (val & VIC_XFER_TIMO_ARB)
- printk("arbitration ");
- printk("\n");
-
- val = vic_inb(VIC_LOCAL_TIM);
- printk("pas time: (%d,%d), ds time: %d\n",
- VIC_LOCAL_TIM_PAS_ASSERT_VAL(val),
- VIC_LOCAL_TIM_PAS_DEASSERT_VAL(val),
- VIC_LOCAT_TIM_DS_DEASSERT_VAL(val));
-
- val = vic_inb(VIC_BXFER_DEF);
- printk("dma: ");
- if (val & VIC_BXFER_DEF_DUAL)
- printk("[dual path]");
- if (val & VIC_BXFER_DEF_LOCAL_CROSS)
- printk("[local boundary cross]");
- if (val & VIC_BXFER_DEF_VME_CROSS)
- printk("[vme boundary cross]");
-
-}
-
-static void __init vic_init(void)
-{
- unsigned char id = vic_inb(VIC_ID);
- if ((id & 0xf0) != 0xf0)
- panic("VIC not found");
- printk(" VIC068A Rev. %X: ", id & 0x0f);
-
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_II);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT1);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT2);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT3);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT4);
-/*
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT5);
-*/
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT6);
-
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT7);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_DMA_INT);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT1);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_HIGH|VIC_INT_DISABLE, VIC_LINT2);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_HIGH|VIC_INT_DISABLE, VIC_LINT3);
- vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT4);
-/*
- vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_LEVEL|
- VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT5);
-*/
- vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT6);
- vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT7);
-
- vic_outb(VIC_INT_IPL(3)|
- VIC_INT_SWITCH(0)|
- VIC_INT_SWITCH(1)|
- VIC_INT_SWITCH(2)|
- VIC_INT_SWITCH(3), VIC_ICGS_INT);
- vic_outb(VIC_INT_IPL(3)|
- VIC_INT_SWITCH(0)|
- VIC_INT_SWITCH(1)|
- VIC_INT_SWITCH(2)|
- VIC_INT_SWITCH(3), VIC_ICMS_INT);
- vic_outb(VIC_INT_IPL(6)|
- VIC_ERR_INT_SYSFAIL|
- VIC_ERR_INT_TIMO|
- VIC_ERR_INT_WRPOST|
- VIC_ERR_INT_ACFAIL, VIC_ERR_INT);
- vic_outb(VIC_ICxS_BASE_ID(0xf), VIC_ICGS_BASE);
- vic_outb(VIC_ICxS_BASE_ID(0xe), VIC_ICMS_BASE);
- vic_outb(VIC_LOCAL_BASE_ID(0x6), VIC_LOCAL_BASE);
- vic_outb(VIC_ERR_BASE_ID(0x3), VIC_ERR_BASE);
- vic_outb(VIC_XFER_TIMO_VME_PERIOD_32|
- VIC_XFER_TIMO_LOCAL_PERIOD_32, VIC_XFER_TIMO);
- vic_outb(VIC_LOCAL_TIM_PAS_ASSERT(2)|
- VIC_LOCAT_TIM_DS_DEASSERT(1)|
- VIC_LOCAL_TIM_PAS_DEASSERT(1), VIC_LOCAL_TIM);
- vic_outb(VIC_BXFER_DEF_VME_CROSS|
- VIC_BXFER_DEF_LOCAL_CROSS|
- VIC_BXFER_DEF_AMSR|
- VIC_BXFER_DEF_DUAL, VIC_BXFER_DEF);
- vic_outb(VIC_SSxCR0_LOCAL_XFER_SINGLE|
- VIC_SSxCR0_A32|VIC_SSxCR0_D32|
- VIC_SS0CR0_TIMER_FREQ_NONE, VIC_SS0CR0);
- vic_outb(VIC_SSxCR1_TF1(0xf)|
- VIC_SSxCR1_TF2(0xf), VIC_SS0CR1);
- vic_outb(VIC_SSxCR0_LOCAL_XFER_SINGLE|
- VIC_SSxCR0_A24|VIC_SSxCR0_D32, VIC_SS1CR0);
- vic_outb(VIC_SSxCR1_TF1(0xf)|
- VIC_SSxCR1_TF2(0xf), VIC_SS1CR1);
- vic_outb(VIC_IFACE_CFG_NOHALT|
- VIC_IFACE_CFG_NOTURBO, VIC_IFACE_CFG);
- vic_outb(VIC_AMS_CODE(0), VIC_AMS);
- vic_outb(VIC_BXFER_CTRL_INTERLEAVE(0), VIC_BXFER_CTRL);
- vic_outb(0, VIC_BXFER_LEN_LO);
- vic_outb(0, VIC_BXFER_LEN_HI);
- vic_outb(VIC_REQ_CFG_FAIRNESS_DISABLED|
- VIC_REQ_CFG_LEVEL(3)|
- VIC_REQ_CFG_RR_ARBITRATION, VIC_REQ_CFG);
- vic_outb(VIC_RELEASE_BLKXFER_BLEN(0)|
- VIC_RELEASE_RWD, VIC_RELEASE);
- vic_outb(VIC_IC6_RUN, VIC_IC6);
- vic_outb(0, VIC_IC7);
-
- vic_show();
-}
-
-static void vic_start(void)
-{
- vic_outb(VIC_INT_IPL(3)|
- VIC_INT_NOAUTO|
- VIC_INT_EDGE|
- VIC_INT_HIGH|
- VIC_INT_ENABLE, VIC_LINT7);
-}
-
-void __init baget_irq_setup(void)
-{
- extern void bagetIRQ(void);
-
- /* Now, it's safe to set the exception vector. */
- set_except_vector(0, bagetIRQ);
-}
-
-extern void baget_machine_restart(char *command);
-extern void baget_machine_halt(void);
-extern void baget_machine_power_off(void);
-
-static void __init baget_setup(void)
-{
- printk("BT23/63-201n found.\n");
- *BAGET_WRERR_ACK = 0;
- irq_setup = baget_irq_setup;
-
- _machine_restart = baget_machine_restart;
- _machine_halt = baget_machine_halt;
- _machine_power_off = baget_machine_power_off;
-
- vac_init();
- vic_init();
- vac_start();
- vic_start();
-}
-
-early_initcall(baget_setup);
+++ /dev/null
-/*
- * time.c: Baget/MIPS specific time handling details
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/time.h>
-#include <linux/interrupt.h>
-#include <linux/timex.h>
-#include <linux/spinlock.h>
-
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/ptrace.h>
-#include <asm/system.h>
-
-#include <asm/baget/baget.h>
-
-/*
- * To have precision clock, we need to fix available clock frequency
- */
-#define FREQ_NOM 79125 /* Baget frequency ratio */
-#define FREQ_DEN 10000
-
-static inline int timer_intr_valid(void)
-{
- static unsigned long long ticks, valid_ticks;
-
- if (ticks++ * FREQ_DEN >= valid_ticks * FREQ_NOM) {
- /*
- * We need no overflow checks,
- * due baget unable to work 3000 years...
- * At least without reboot...
- */
- valid_ticks++;
- return 1;
- }
- return 0;
-}
-
-void static timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
-{
- if (timer_intr_valid()) {
- sti();
- do_timer(regs);
-#ifndef CONFIG_SMP
- update_process_times(user_mode(regs));
-#endif
- }
-}
-
-static void __init timer_enable(void)
-{
- unsigned char ss0cr0 = vic_inb(VIC_SS0CR0);
- ss0cr0 &= ~VIC_SS0CR0_TIMER_FREQ_MASK;
- ss0cr0 |= VIC_SS0CR0_TIMER_FREQ_1000HZ;
- vic_outb(ss0cr0, VIC_SS0CR0);
-
- vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE|
- VIC_INT_LOW|VIC_INT_ENABLE, VIC_LINT2);
-}
-
-static struct irqaction timer_irq =
-{ timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL};
-
-void __init time_init(void)
-{
- if (setup_baget_irq(BAGET_VIC_TIMER_IRQ, &timer_irq) < 0)
- printk("time_init: unable request irq for system timer\n");
- timer_enable();
- /* We don't call sti() here, because it is too early for baget */
-}
-
-void do_gettimeofday(struct timeval *tv)
-{
- unsigned long seq;
-
- do {
- seq = read_seqbegin(&xtime_lock);
- tv->tv_sec = xtime.tv_sec;
- tv->tv_usec = xtime.tv_nsec / 1000;
- } while (read_seqretry(&xtime_lock, seq));
-}
-
-EXPORT_SYMBOL(do_gettimeofday);
-
-void do_settimeofday(struct timeval *tv)
-{
- write_seqlock_irq(&xtime_lock);
- xtime.tv_usec = tv->tv_sec;
- xtime.tv_nsec = tv->tv_usec;
- time_adjust = 0; /* stop active adjtime() */
- time_status |= STA_UNSYNC;
- time_maxerror = NTP_PHASE_LIMIT;
- time_esterror = NTP_PHASE_LIMIT;
- write_sequnlock_irq(&xtime_lock);
-}
-
-EXPORT_SYMBOL(do_settimeofday);
# for more details.
#
# Copyright (C) 1995, 1998, 2001, 2002 by Ralf Baechle
+# Copyright (C) 2004 Maciej W. Rozycki
#
#
# Drop some uninteresting sections in the kernel.
# This is only relevant for ELF kernels but doesn't hurt a.out
#
-drop-sections = .reginfo .mdebug .comment .note .pdr
+drop-sections = .reginfo .mdebug .comment .note .pdr .options .MIPS.options
strip-flags = $(addprefix --remove-section=,$(drop-sections))
+VMLINUX = vmlinux
+
all: vmlinux.ecoff vmlinux.srec addinitrd
-vmlinux.ecoff: $(obj)/elf2ecoff vmlinux
- $(obj)/elf2ecoff vmlinux vmlinux.ecoff $(E2EFLAGS)
+vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX)
+ $(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS)
$(obj)/elf2ecoff: $(obj)/elf2ecoff.c
$(HOSTCC) -o $@ $^
-vmlinux.srec: vmlinux
- $(OBJCOPY) -S -O srec $(strip-flags) vmlinux $(obj)/vmlinux.srec
+vmlinux.srec: $(VMLINUX)
+ $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec
$(obj)/addinitrd: $(obj)/addinitrd.c
$(HOSTCC) -o $@ $^
archhelp:
@echo '* vmlinux.ecoff - ECOFF boot image'
+ @echo '* vmlinux.srec - SREC boot image'
clean-files += addinitrd \
elf2ecoff \
vmlinux.ecoff \
- vmlinux.srec \
- zImage.tmp \
- zImage
+ vmlinux.srec
* addinitrd - program to add a initrd image to an ecoff kernel
*
* (C) 1999 Thomas Bogendoerfer
+ * minor modifications, cleanup: Guido Guenther <agx@sigxcpu.org>
+ * further cleanup: Maciej W. Rozycki
*/
#include <sys/types.h>
exit (1);
}
- if ((fd_vmlinux = open (argv[1],O_RDWR)) < 0)
+ if ((fd_vmlinux = open (argv[1],O_RDONLY)) < 0)
die ("open vmlinux");
if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile)
die ("read file header");
swab = 1;
}
+ /* make sure we have an empty data segment for the initrd */
+ if (eaout.dsize || esecs[1].s_size) {
+ fprintf (stderr, "Data segment not empty. Giving up!\n");
+ exit (1);
+ }
if ((fd_initrd = open (argv[2], O_RDONLY)) < 0)
die ("open initrd");
if (fstat (fd_initrd, &st) < 0)
}
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
set_except_vector(0, cobalt_handle_int);
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1997 by Ralf Baechle
+ * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
*
*/
#include <linux/init.h>
#include <asm/bootinfo.h>
-#include <asm/pci_channel.h>
#include <asm/time.h>
#include <asm/io.h>
#include <asm/irq.h>
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:55 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
#
# Device Drivers
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
CONFIG_SCSI_QLA2XXX=y
# CONFIG_SCSI_QLA21XX is not set
# CONFIG_SCSI_QLA22XX is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=y
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=y
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-CONFIG_LIBCRC32C=m
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:55 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:55 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
CONFIG_MIPS_COBALT=y
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=y
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=y
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:56 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
CONFIG_SOC_AU1X00=y
CONFIG_SOC_AU1000=y
# CONFIG_SOC_AU1100 is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_MMU=y
#
-# PCMCIA/CardBus support
+# PCCARD (PCMCIA/CardBus) support
#
-CONFIG_PCMCIA=m
+CONFIG_PCCARD=m
# CONFIG_PCMCIA_DEBUG is not set
+# CONFIG_PCMCIA_OBSOLETE is not set
+CONFIG_PCMCIA=m
+
+#
+# PC-card bridges
+#
# CONFIG_TCIC is not set
# CONFIG_PCMCIA_AU1X00 is not set
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# IP: Virtual Server Configuration
# IP: Netfilter Configuration
#
# CONFIG_IP_NF_CONNTRACK is not set
+CONFIG_IP_NF_CONNTRACK_MARK=y
# CONFIG_IP_NF_QUEUE is not set
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
+CONFIG_MII=m
CONFIG_MIPS_AU1X00_ENET=y
#
#
CONFIG_NET_PCMCIA=y
CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
#
# Wan interfaces
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
#
# PCMCIA character devices
#
-# CONFIG_SYNCLINK_CS is not set
+CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_EXPORTFS=m
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_CIFS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=m
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_TEA=m
# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
-CONFIG_CRC16=m
+CONFIG_CRC_CCITT=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:56 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
CONFIG_SOC_AU1X00=y
# CONFIG_SOC_AU1000 is not set
CONFIG_SOC_AU1100=y
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_MMU=y
#
-# PCMCIA/CardBus support
+# PCCARD (PCMCIA/CardBus) support
#
-CONFIG_PCMCIA=m
+CONFIG_PCCARD=m
# CONFIG_PCMCIA_DEBUG is not set
+# CONFIG_PCMCIA_OBSOLETE is not set
+CONFIG_PCMCIA=m
+
+#
+# PC-card bridges
+#
# CONFIG_TCIC is not set
# CONFIG_PCMCIA_AU1X00 is not set
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# IP: Virtual Server Configuration
# IP: Netfilter Configuration
#
# CONFIG_IP_NF_CONNTRACK is not set
+CONFIG_IP_NF_CONNTRACK_MARK=y
# CONFIG_IP_NF_QUEUE is not set
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
+CONFIG_MII=m
# CONFIG_MIPS_AU1X00_ENET is not set
#
#
CONFIG_NET_PCMCIA=y
CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
#
# Wan interfaces
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
#
# PCMCIA character devices
#
-# CONFIG_SYNCLINK_CS is not set
+CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_EXPORTFS=m
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_CIFS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=m
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_TEA=m
# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
-CONFIG_CRC16=m
+CONFIG_CRC_CCITT=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:56 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
CONFIG_SOC_AU1X00=y
# CONFIG_SOC_AU1000 is not set
# CONFIG_SOC_AU1100 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_HAVE_DEC_LOCK=y
-CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_COHERENT=y
+CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_FB is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_HW_HAS_PCI=y
-# CONFIG_PCI is not set
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
CONFIG_MMU=y
#
-# PCMCIA/CardBus support
+# PCCARD (PCMCIA/CardBus) support
#
-CONFIG_PCMCIA=m
+CONFIG_PCCARD=m
# CONFIG_PCMCIA_DEBUG is not set
+# CONFIG_PCMCIA_OBSOLETE is not set
+CONFIG_PCMCIA=m
+CONFIG_CARDBUS=y
+
+#
+# PC-card bridges
+#
+# CONFIG_YENTA is not set
+# CONFIG_PD6729 is not set
+# CONFIG_I82092 is not set
# CONFIG_TCIC is not set
-# CONFIG_PCMCIA_AU1X00 is not set
+CONFIG_PCMCIA_AU1X00=m
#
# PCI Hotplug Support
#
+# CONFIG_HOTPLUG_PCI is not set
#
# Executable file formats
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_AMDSTD_RETRY=0
# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
#
# Mapping drivers for chip access
#
# Self-contained MTD device drivers
#
+# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
#
# IDE chipset support/bugfixes
#
-CONFIG_IDE_GENERIC=y
+# CONFIG_IDE_GENERIC is not set
+# CONFIG_BLK_DEV_IDEPCI is not set
# CONFIG_IDE_ARM is not set
# CONFIG_BLK_DEV_IDEDMA is not set
# CONFIG_IDEDMA_AUTO is not set
#
# I2O device support
#
+# CONFIG_I2O is not set
#
# Networking support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# IP: Virtual Server Configuration
# IP: Netfilter Configuration
#
# CONFIG_IP_NF_CONNTRACK is not set
+CONFIG_IP_NF_CONNTRACK_MARK=y
# CONFIG_IP_NF_QUEUE is not set
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
CONFIG_MIPS_AU1X00_ENET=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
#
# Ethernet (1000 Mbit)
#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
#
# Ethernet (10000 Mbit)
#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
#
# Token Ring devices
#
+# CONFIG_TR is not set
#
# Wireless LAN (non-hamradio)
#
# PCMCIA network device support
#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
+# CONFIG_NET_PCMCIA is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
CONFIG_PPP=m
CONFIG_PPP_MULTILINK=y
# CONFIG_PPP_FILTER is not set
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
#
# PCMCIA character devices
#
-# CONFIG_SYNCLINK_CS is not set
+CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
#
# Sound
#
-# CONFIG_SOUND is not set
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+# CONFIG_SND is not set
+
+#
+# Open Sound System
+#
+CONFIG_SOUND_PRIME=y
+# CONFIG_SOUND_BT878 is not set
+# CONFIG_SOUND_CMPCI is not set
+# CONFIG_SOUND_EMU10K1 is not set
+# CONFIG_SOUND_FUSION is not set
+# CONFIG_SOUND_CS4281 is not set
+# CONFIG_SOUND_ES1370 is not set
+# CONFIG_SOUND_ES1371 is not set
+# CONFIG_SOUND_ESSSOLO1 is not set
+# CONFIG_SOUND_MAESTRO is not set
+# CONFIG_SOUND_MAESTRO3 is not set
+# CONFIG_SOUND_ICH is not set
+# CONFIG_SOUND_SONICVIBES is not set
+CONFIG_SOUND_AU1000=y
+# CONFIG_SOUND_TRIDENT is not set
+# CONFIG_SOUND_MSNDCLAS is not set
+# CONFIG_SOUND_MSNDPIN is not set
+# CONFIG_SOUND_VIA82CXXX is not set
+# CONFIG_SOUND_OSS is not set
+# CONFIG_SOUND_ALI5455 is not set
+# CONFIG_SOUND_FORTE is not set
+# CONFIG_SOUND_RME96XX is not set
+# CONFIG_SOUND_AD1980 is not set
#
# USB support
#
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_EHCI_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_UHCI_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_BLUETOOTH_TTY is not set
+# CONFIG_USB_MIDI is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_STORAGE is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+CONFIG_USB_HIDINPUT=y
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_MTOUCH is not set
+# CONFIG_USB_EGALAX is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+
+#
+# USB Multimedia devices
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# Video4Linux support is needed for USB Multimedia device support
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_TIGL is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGETKIT is not set
+# CONFIG_USB_PHIDGETSERVO is not set
+
+#
+# USB ATM/DSL drivers
+#
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_EXPORTFS=m
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_CIFS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=m
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_TEA=m
# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
-CONFIG_CRC16=m
+CONFIG_CRC_CCITT=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:57 2004
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+CONFIG_SOC_AU1X00=y
+# CONFIG_SOC_AU1000 is not set
+# CONFIG_SOC_AU1100 is not set
+# CONFIG_SOC_AU1500 is not set
+CONFIG_SOC_AU1550=y
+# CONFIG_MIPS_PB1000 is not set
+# CONFIG_MIPS_PB1100 is not set
+# CONFIG_MIPS_PB1500 is not set
+# CONFIG_MIPS_PB1550 is not set
+# CONFIG_MIPS_DB1000 is not set
+# CONFIG_MIPS_DB1100 is not set
+# CONFIG_MIPS_DB1500 is not set
+CONFIG_MIPS_DB1550=y
+# CONFIG_MIPS_BOSPORUS is not set
+# CONFIG_MIPS_MIRAGE is not set
+# CONFIG_MIPS_XXS1500 is not set
+# CONFIG_MIPS_MTX1 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_COHERENT=y
+CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+# CONFIG_FB is not set
+
+#
+# CPU selection
+#
+CONFIG_CPU_MIPS32=y
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_VTAG_ICACHE is not set
+CONFIG_64BIT_PHYS_ADDR=y
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_PREEMPT is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_HW_HAS_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+CONFIG_PCCARD=m
+# CONFIG_PCMCIA_DEBUG is not set
+# CONFIG_PCMCIA_OBSOLETE is not set
+CONFIG_PCMCIA=m
+CONFIG_CARDBUS=y
+
+#
+# PC-card bridges
+#
+# CONFIG_YENTA is not set
+# CONFIG_PD6729 is not set
+# CONFIG_I82092 is not set
+# CONFIG_TCIC is not set
+CONFIG_PCMCIA_AU1X00=m
+
+#
+# PCI Hotplug Support
+#
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_AMDSTD_RETRY=0
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_DB1550=y
+CONFIG_MTD_DB1550_BOOT=y
+CONFIG_MTD_DB1550_USER=y
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+CONFIG_MTD_NAND=m
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+CONFIG_MTD_NAND_IDS=m
+CONFIG_MTD_NAND_AU1550=m
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+CONFIG_BLK_DEV_IDECS=m
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_SHARE_IRQ is not set
+# CONFIG_BLK_DEV_OFFBOARD is not set
+CONFIG_BLK_DEV_GENERIC=y
+# CONFIG_BLK_DEV_OPTI621 is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
+# CONFIG_IDEDMA_PCI_AUTO is not set
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+# CONFIG_IDE_ARM is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_IDEDMA_IVB is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+CONFIG_IP_NF_CONNTRACK_MARK=y
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_ETHERTAP is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+CONFIG_MIPS_AU1X00_ENET=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_AU1X00_GPIO is not set
+# CONFIG_TS_AU1X00_ADS7846 is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_AU1X00=y
+CONFIG_SERIAL_AU1X00_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+CONFIG_SYNCLINK_CS=m
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+CONFIG_REISERFS_FS_XATTR=y
+CONFIG_REISERFS_FS_POSIX_ACL=y
+CONFIG_REISERFS_FS_SECURITY=y
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+# CONFIG_DEVFS_FS is not set
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_EXPORTFS=m
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE=""
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=m
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+CONFIG_CRYPTO_TWOFISH=y
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_TEA=m
+# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+CONFIG_CRYPTO_CRC32C=m
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=m
+CONFIG_CRC32=y
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:57 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=y
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=y
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
#
# Graphics support
#
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_CIRRUS is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_ATY is not set
+# CONFIG_FB_SAVAGE is not set
# CONFIG_FB_SIS is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE="ip=any"
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:58 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
CONFIG_DDB5477_BUS_FREQUENCY=0
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=y
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
-# CONFIG_VIA_VELOCITY is not set
# CONFIG_LAN_SAA9730 is not set
#
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
#
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=y
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE="ip=any"
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:58 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_WB=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_SCSI_DECNCR=y
# CONFIG_SCSI_DECSII is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
# CONFIG_SCSI_DEBUG is not set
#
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:58 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
CONFIG_MACH_VR41XX=y
CONFIG_CASIO_E55=y
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:59 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_KMOD is not set
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
#
# Device Drivers
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs rw nfsroot=192.168.1.1:/mnt/disk2/fs.gal ip=192.168.1.211:192.168.1.1:::gt::"
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+CONFIG_CRC_CCITT=y
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:59 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_KMOD is not set
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
#
# Device Drivers
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:59 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
CONFIG_SGI_IP22=y
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=m
CONFIG_TRAD_SIGNALS=y
-CONFIG_BINFMT_IRIX=y
#
# Device Drivers
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# SCSI low-level drivers
#
CONFIG_SGIWD93_SCSI=y
-# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
# CONFIG_SCSI_DEBUG is not set
#
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
CONFIG_INET_AH=m
CONFIG_INET_ESP=m
CONFIG_INET_IPCOMP=m
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+CONFIG_IP_TCPDIAG_IPV6=y
#
# IP: Virtual Server Configuration
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_TUNNEL=m
CONFIG_IPV6_TUNNEL=m
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
# IP: Netfilter Configuration
#
CONFIG_IP_NF_CONNTRACK=m
+CONFIG_IP_NF_CT_ACCT=y
+CONFIG_IP_NF_CONNTRACK_MARK=y
+# CONFIG_IP_NF_CT_PROTO_SCTP is not set
CONFIG_IP_NF_FTP=m
CONFIG_IP_NF_IRC=m
CONFIG_IP_NF_TFTP=m
CONFIG_IP_NF_MATCH_STATE=m
CONFIG_IP_NF_MATCH_CONNTRACK=m
CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_REALM=m
+CONFIG_IP_NF_MATCH_SCTP=m
+CONFIG_IP_NF_MATCH_COMMENT=m
+CONFIG_IP_NF_MATCH_CONNMARK=m
+CONFIG_IP_NF_MATCH_HASHLIMIT=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_TARGET_TCPMSS=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_DSCP=m
CONFIG_IP_NF_TARGET_MARK=m
CONFIG_IP_NF_TARGET_CLASSIFY=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_IP_NF_TARGET_TCPMSS=m
+CONFIG_IP_NF_TARGET_CONNMARK=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_TARGET_NOTRACK=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_IP_NF_COMPAT_IPCHAINS=m
-CONFIG_IP_NF_COMPAT_IPFWADM=m
-CONFIG_IP_NF_TARGET_NOTRACK=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
-CONFIG_IP_NF_MATCH_REALM=m
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
#
# IPv6: Netfilter Configuration
CONFIG_NET_DIVERT=y
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
CONFIG_NET_SCHED=y
+# CONFIG_NET_SCH_CLK_JIFFIES is not set
+CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
+# CONFIG_NET_SCH_CLK_CPU is not set
CONFIG_NET_SCH_CBQ=m
CONFIG_NET_SCH_HTB=m
CONFIG_NET_SCH_HFSC=m
-CONFIG_NET_SCH_CSZ=m
CONFIG_NET_SCH_PRIO=m
CONFIG_NET_SCH_RED=m
CONFIG_NET_SCH_SFQ=m
CONFIG_NET_SCH_TBF=m
CONFIG_NET_SCH_GRED=m
CONFIG_NET_SCH_DSMARK=m
-CONFIG_NET_SCH_DELAY=m
+CONFIG_NET_SCH_NETEM=m
CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
#
# Userland interfaces
#
-CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV=m
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_SERIAL=m
+# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_SOFT_WATCHDOG is not set
CONFIG_INDYDOG=m
# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
CONFIG_SGI_DS1286=m
+# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
CONFIG_RAW_DRIVER=m
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_SGI_NEWPORT_CONSOLE=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_FONT_8x16=y
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_QFMT_V1 is not set
CONFIG_QFMT_V2=m
CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
CONFIG_ZISOFS=y
CONFIG_ZISOFS_FS=m
CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
#
# DOS/FAT/NT Filesystems
CONFIG_SUNRPC=m
CONFIG_SUNRPC_GSS=m
CONFIG_RPCSEC_GSS_KRB5=m
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+CONFIG_SMB_NLS_DEFAULT=y
+CONFIG_SMB_NLS_REMOTE="cp437"
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_POSIX is not set
# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
+CONFIG_CODA_FS=m
+# CONFIG_CODA_FS_OLD_API is not set
# CONFIG_AFS_FS is not set
#
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_BLOWFISH=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_TEST=m
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:00 2004
#
CONFIG_MIPS=y
CONFIG_MIPS64=y
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
+CONFIG_LOCK_KERNEL=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=15
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
CONFIG_STOP_MACHINE=y
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
CONFIG_SGI_IP27=y
# CONFIG_SGI_SN0_N_MODE is not set
CONFIG_DISCONTIGMEM=y
-# CONFIG_NUMA is not set
+CONFIG_NUMA=y
# CONFIG_MAPPED_KERNEL is not set
# CONFIG_REPLICATE_KTEXT is not set
# CONFIG_REPLICATE_EXHANDLERS is not set
CONFIG_SMP=y
CONFIG_NR_CPUS=64
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_MIPS_INSANE_LARGE is not set
#
#
CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
CONFIG_PCI_LEGACY_PROC=y
CONFIG_PCI_NAMES=y
CONFIG_MMU=y
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+# CONFIG_BUILD_ELF64 is not set
CONFIG_MIPS32_COMPAT=y
CONFIG_COMPAT=y
CONFIG_MIPS32_O32=y
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=m
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_SCSI_AIC7XXX is not set
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
CONFIG_SCSI_QLOGIC_ISP=y
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
CONFIG_SCSI_QLA2XXX=y
# CONFIG_SCSI_QLA21XX is not set
# CONFIG_SCSI_QLA22XX is not set
#
# Multi-device support (RAID and LVM)
#
-# CONFIG_MD is not set
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_LINEAR=m
+CONFIG_MD_RAID0=y
+CONFIG_MD_RAID1=y
+CONFIG_MD_RAID10=m
+CONFIG_MD_RAID5=y
+CONFIG_MD_RAID6=m
+CONFIG_MD_MULTIPATH=m
+CONFIG_MD_FAULTY=m
+CONFIG_BLK_DEV_DM=m
+CONFIG_DM_CRYPT=m
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_MIRROR=m
+CONFIG_DM_ZERO=m
#
# Fusion MPT device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
CONFIG_NET_SCHED=y
-CONFIG_NET_SCH_CBQ=y
-CONFIG_NET_SCH_HTB=y
-CONFIG_NET_SCH_HFSC=y
-CONFIG_NET_SCH_CSZ=y
-CONFIG_NET_SCH_PRIO=y
-CONFIG_NET_SCH_RED=y
-CONFIG_NET_SCH_SFQ=y
-CONFIG_NET_SCH_TEQL=y
-CONFIG_NET_SCH_TBF=y
-CONFIG_NET_SCH_GRED=y
-CONFIG_NET_SCH_DSMARK=y
-CONFIG_NET_SCH_DELAY=y
-# CONFIG_NET_SCH_INGRESS is not set
+# CONFIG_NET_SCH_CLK_JIFFIES is not set
+CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
+# CONFIG_NET_SCH_CLK_CPU is not set
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_PRIO=m
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
CONFIG_NET_CLS=y
-CONFIG_NET_CLS_TCINDEX=y
-CONFIG_NET_CLS_ROUTE4=y
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
-CONFIG_NET_CLS_FW=y
-CONFIG_NET_CLS_U32=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
# CONFIG_CLS_U32_PERF is not set
# CONFIG_NET_CLS_IND is not set
-CONFIG_NET_CLS_RSVP=y
-CONFIG_NET_CLS_RSVP6=y
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
# CONFIG_NET_CLS_ACT is not set
CONFIG_NET_CLS_POLICE=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_WATCHDOG is not set
# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
CONFIG_SGI_IP27_RTC=y
+# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
+CONFIG_XFS_FS=m
+# CONFIG_XFS_RT is not set
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_SECURITY=y
+CONFIG_XFS_POSIX_ACL=y
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=y
+CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
+CONFIG_AUTOFS_FS=m
# CONFIG_AUTOFS4_FS is not set
#
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
+# CONFIG_ROOT_NFS is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_CAST5=y
CONFIG_CRYPTO_CAST6=y
+CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_TEST=m
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:00 2004
#
CONFIG_MIPS=y
CONFIG_MIPS64=y
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=y
+# CONFIG_BUILD_ELF64 is not set
CONFIG_MIPS32_COMPAT=y
CONFIG_COMPAT=y
CONFIG_MIPS32_O32=y
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
CONFIG_SCSI_AIC7XXX=y
CONFIG_AIC7XXX_CMDS_PER_DEVICE=8
CONFIG_AIC7XXX_RESET_DELAY_MS=15000
-# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
CONFIG_AIC7XXX_DEBUG_ENABLE=y
CONFIG_AIC7XXX_DEBUG_MASK=0
CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_MEGARAID is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
# CONFIG_SCSI_SYM53C8XX_2 is not set
# CONFIG_SCSI_IPR is not set
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
CONFIG_SCSI_QLA2XXX=y
# CONFIG_SCSI_QLA21XX is not set
# CONFIG_SCSI_QLA22XX is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=y
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_MACEPS2 is not set
+CONFIG_SERIO_RAW=y
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:00 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
#
# Mapping drivers for chip access
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_START=0x8000000
CONFIG_MTD_PHYSMAP_LEN=0x2000000
-CONFIG_MTD_PHYSMAP_BUSWIDTH=4
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# CONFIG_SOUND_BT878 is not set
# CONFIG_SOUND_FUSION is not set
# CONFIG_SOUND_CS4281 is not set
-# CONFIG_SOUND_ESSSOLO1 is not set
-# CONFIG_SOUND_MAESTRO is not set
# CONFIG_SOUND_SONICVIBES is not set
CONFIG_SOUND_IT8172=y
# CONFIG_SOUND_TRIDENT is not set
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:01 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:01 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
# CONFIG_EXPERIMENTAL is not set
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
CONFIG_MOMENCO_JAGUAR_ATX=y
CONFIG_JAGUAR_DMALOW=y
# CONFIG_PMC_YOSEMITE is not set
CONFIG_HIGHMEM=y
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
#
# Device Drivers
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
-# CONFIG_VIA_VELOCITY is not set
#
# Ethernet (1000 Mbit)
# CONFIG_HAMACHI is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
CONFIG_MV643XX_ETH=y
CONFIG_MV643XX_ETH_0=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:01 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_TOSHIBA_JMR3927=y
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
CONFIG_RTC_DS1742=y
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
#
# Device Drivers
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=y
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=y
#
# Input Device Drivers
# CONFIG_UNIX98_PTYS is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
#
# Graphics support
#
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_CIRRUS is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_ATY is not set
+# CONFIG_FB_SAVAGE is not set
# CONFIG_FB_SIS is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE is not set
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:02 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_AMDSTD_RETRY=0
# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLKMTD is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
CONFIG_IDEDMA_PCI_AUTO=y
# CONFIG_IDEDMA_ONLYDISK is not set
-CONFIG_BLK_DEV_ADMA=y
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:02 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
-# CONFIG_VIA_VELOCITY is not set
# CONFIG_LAN_SAA9730 is not set
#
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
#
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=y
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-CONFIG_LIBCRC32C=m
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:02 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=m
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_TEA=m
# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-CONFIG_LIBCRC32C=m
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
--- /dev/null
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:03 2004
+#
+CONFIG_MIPS=y
+# CONFIG_MIPS64 is not set
+# CONFIG_64BIT is not set
+CONFIG_MIPS32=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_TOSHIBA_JMR3927 is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MIPS_EV64120 is not set
+# CONFIG_MIPS_EV96100 is not set
+# CONFIG_MIPS_IVR is not set
+# CONFIG_LASAT is not set
+# CONFIG_MIPS_ITE8172 is not set
+# CONFIG_MIPS_ATLAS is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SEAD is not set
+# CONFIG_MOMENCO_OCELOT is not set
+# CONFIG_MOMENCO_OCELOT_G is not set
+# CONFIG_MOMENCO_OCELOT_C is not set
+CONFIG_MOMENCO_OCELOT_3=y
+# CONFIG_MOMENCO_JAGUAR_ATX is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_DDB5074 is not set
+# CONFIG_DDB5476 is not set
+# CONFIG_DDB5477 is not set
+# CONFIG_NEC_OSPREY is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SOC_AU1X00 is not set
+# CONFIG_SIBYTE_SB1xxx_SOC is not set
+# CONFIG_SNI_RM200_PCI is not set
+# CONFIG_TOSHIBA_RBTX4927 is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_CPU_RM7K=y
+CONFIG_IRQ_MV64340=y
+CONFIG_PCI_MARVELL=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_BOOT_ELF32=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_FB=y
+
+#
+# CPU selection
+#
+# CONFIG_CPU_MIPS32 is not set
+# CONFIG_CPU_MIPS64 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+# CONFIG_CPU_TX49XX is not set
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+CONFIG_CPU_RM9000=y
+# CONFIG_CPU_SB1 is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_BOARD_SCACHE=y
+CONFIG_RM7000_CPU_SCACHE=y
+CONFIG_CPU_HAS_PREFETCH=y
+# CONFIG_64BIT_PHYS_ADDR is not set
+# CONFIG_CPU_ADVANCED is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_LLDSCD=y
+CONFIG_CPU_HAS_SYNC=y
+# CONFIG_HIGHMEM is not set
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_HW_HAS_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_LEGACY_PROC=y
+CONFIG_PCI_NAMES=y
+CONFIG_MMU=y
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_LBD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=m
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+# CONFIG_BLK_DEV_SD is not set
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transport Attributes
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_ISP is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
+CONFIG_SCSI_QLA2XXX=m
+# CONFIG_SCSI_QLA21XX is not set
+# CONFIG_SCSI_QLA22XX is not set
+# CONFIG_SCSI_QLA2300 is not set
+# CONFIG_SCSI_QLA2322 is not set
+# CONFIG_SCSI_QLA6312 is not set
+# CONFIG_SCSI_QLA6322 is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_NETLINK_DEV=y
+CONFIG_UNIX=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_IP_TCPDIAG=m
+CONFIG_IP_TCPDIAG_IPV6=y
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_IPV6_TUNNEL is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_CONNTRACK_MARK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
+
+#
+# IPv6: Netfilter Configuration
+#
+# CONFIG_IP6_NF_QUEUE is not set
+# CONFIG_IP6_NF_IPTABLES is not set
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_ETHERTAP is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_DGRS is not set
+# CONFIG_EEPRO100 is not set
+CONFIG_E100=y
+# CONFIG_E100_NAPI is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_LAN_SAA9730 is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+CONFIG_MV643XX_ETH=y
+CONFIG_MV643XX_ETH_0=y
+CONFIG_MV643XX_ETH_1=y
+CONFIG_MV643XX_ETH_2=y
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+CONFIG_PPPOE=m
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input I/O drivers
+#
+# CONFIG_GAMEPORT is not set
+CONFIG_SOUND_GAMEPORT=y
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_SERIO_PCIPS2 is not set
+# CONFIG_SERIO_RAW is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_RTC=y
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_TILEBLITTING is not set
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON_OLD is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_E1356 is not set
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT3_FS=m
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=m
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_REISERFS_FS_XATTR is not set
+# CONFIG_JFS_FS is not set
+CONFIG_XFS_FS=m
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_SECURITY is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+CONFIG_DEVFS_FS=y
+CONFIG_DEVFS_MOUNT=y
+# CONFIG_DEVFS_DEBUG is not set
+CONFIG_DEVPTS_FS_XATTR=y
+CONFIG_DEVPTS_FS_SECURITY=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+CONFIG_EFS_FS=y
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V4 is not set
+# CONFIG_NFSD_TCP is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_CROSSCOMPILE=y
+CONFIG_CMDLINE="ip=any root=nfs"
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=m
+CONFIG_CRC32=y
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:03 2004
#
CONFIG_MIPS=y
CONFIG_MIPS64=y
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
CONFIG_MOMENCO_OCELOT_C=y
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+# CONFIG_BUILD_ELF64 is not set
CONFIG_MIPS32_COMPAT=y
CONFIG_COMPAT=y
CONFIG_MIPS32_O32=y
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=y
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=y
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:04 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
CONFIG_MOMENCO_OCELOT=y
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
#
# Device Drivers
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=y
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=y
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:04 2004
#
CONFIG_MIPS=y
CONFIG_MIPS64=y
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MOMENCO_OCELOT is not set
CONFIG_MOMENCO_OCELOT_G=y
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
+# CONFIG_BUILD_ELF64 is not set
CONFIG_MIPS32_COMPAT=y
CONFIG_COMPAT=y
CONFIG_MIPS32_O32=y
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=y
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=y
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:04 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
CONFIG_NEC_OSPREY=y
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE="ip=bootp ether=46,0x03fe0300,eth0"
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-CONFIG_LIBCRC32C=m
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:05 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
+CONFIG_SOC_AU1X00=y
+# CONFIG_SOC_AU1000 is not set
+CONFIG_SOC_AU1100=y
+# CONFIG_SOC_AU1500 is not set
+# CONFIG_SOC_AU1550 is not set
+# CONFIG_MIPS_PB1000 is not set
+CONFIG_MIPS_PB1100=y
+# CONFIG_MIPS_PB1500 is not set
+# CONFIG_MIPS_PB1550 is not set
+# CONFIG_MIPS_DB1000 is not set
+# CONFIG_MIPS_DB1100 is not set
+# CONFIG_MIPS_DB1500 is not set
+# CONFIG_MIPS_DB1550 is not set
+# CONFIG_MIPS_BOSPORUS is not set
+# CONFIG_MIPS_MIRAGE is not set
+# CONFIG_MIPS_XXS1500 is not set
+# CONFIG_MIPS_MTX1 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_HAVE_DEC_LOCK=y
+CONFIG_DMA_NONCOHERENT=y
CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_SWAP_IO_SPACE=y
+# CONFIG_AU1000_USB_DEVICE is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_FB is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
+CONFIG_HW_HAS_PCI=y
+# CONFIG_PCI is not set
CONFIG_MMU=y
#
-# PCMCIA/CardBus support
+# PCCARD (PCMCIA/CardBus) support
#
-CONFIG_PCMCIA=m
+CONFIG_PCCARD=m
# CONFIG_PCMCIA_DEBUG is not set
+# CONFIG_PCMCIA_OBSOLETE is not set
+CONFIG_PCMCIA=m
+
+#
+# PC-card bridges
+#
# CONFIG_TCIC is not set
+# CONFIG_PCMCIA_AU1X00 is not set
#
# PCI Hotplug Support
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
# Memory Technology Devices (MTD)
#
-# CONFIG_MTD is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_AMDSTD_RETRY=0
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PB1100=y
+CONFIG_MTD_PB1500_BOOT=y
+CONFIG_MTD_PB1500_USER=y
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLKMTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
#
# Parallel port support
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# IP: Virtual Server Configuration
# IP: Netfilter Configuration
#
# CONFIG_IP_NF_CONNTRACK is not set
+CONFIG_IP_NF_CONNTRACK_MARK=y
# CONFIG_IP_NF_QUEUE is not set
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
+# CONFIG_MIPS_AU1X00_ENET is not set
#
# Ethernet (1000 Mbit)
#
# PCMCIA network device support
#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
+# CONFIG_NET_PCMCIA is not set
#
# Wan interfaces
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_AU1X00_GPIO is not set
+# CONFIG_TS_AU1X00_ADS7846 is not set
#
# Serial drivers
#
# Non-8250 serial port support
#
+# CONFIG_SERIAL_AU1X00 is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
CONFIG_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
#
# PCMCIA character devices
#
-# CONFIG_SYNCLINK_CS is not set
+CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
CONFIG_CRAMFS=m
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
CONFIG_EXPORTFS=m
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_CIFS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=m
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_TEA=m
# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
-CONFIG_CRC16=m
+CONFIG_CRC_CCITT=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:05 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
CONFIG_SOC_AU1X00=y
# CONFIG_SOC_AU1000 is not set
# CONFIG_SOC_AU1100 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_HAVE_DEC_LOCK=y
-CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_COHERENT=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_AU1000_USB_DEVICE is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_MMU=y
#
-# PCMCIA/CardBus support
+# PCCARD (PCMCIA/CardBus) support
#
-CONFIG_PCMCIA=m
+CONFIG_PCCARD=m
# CONFIG_PCMCIA_DEBUG is not set
+# CONFIG_PCMCIA_OBSOLETE is not set
+CONFIG_PCMCIA=m
+CONFIG_CARDBUS=y
+
+#
+# PC-card bridges
+#
# CONFIG_YENTA is not set
CONFIG_PD6729=m
# CONFIG_I82092 is not set
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_BLK_DEV_IDECS is not set
+CONFIG_BLK_DEV_IDECS=m
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
#
# IDE chipset support/bugfixes
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
# CONFIG_IDEDMA_PCI_AUTO is not set
-CONFIG_BLK_DEV_ADMA=y
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# IP: Virtual Server Configuration
# IP: Netfilter Configuration
#
# CONFIG_IP_NF_CONNTRACK is not set
+CONFIG_IP_NF_CONNTRACK_MARK=y
# CONFIG_IP_NF_QUEUE is not set
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
+CONFIG_MII=m
CONFIG_MIPS_AU1X00_ENET=y
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
#
CONFIG_NET_PCMCIA=y
CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
#
# Wan interfaces
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
#
# PCMCIA character devices
#
-# CONFIG_SYNCLINK_CS is not set
+CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_EXPORTFS=m
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_CIFS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=m
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_TEA=m
# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
# CONFIG_CRYPTO_CRC32C is not set
#
# Library routines
#
-CONFIG_CRC16=m
+CONFIG_CRC_CCITT=m
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:05 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
CONFIG_SOC_AU1X00=y
# CONFIG_SOC_AU1000 is not set
# CONFIG_SOC_AU1100 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_HAVE_DEC_LOCK=y
-CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_COHERENT=y
+CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_FB is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_MMU=y
#
-# PCMCIA/CardBus support
+# PCCARD (PCMCIA/CardBus) support
#
-CONFIG_PCMCIA=m
+CONFIG_PCCARD=m
# CONFIG_PCMCIA_DEBUG is not set
+# CONFIG_PCMCIA_OBSOLETE is not set
+CONFIG_PCMCIA=m
+CONFIG_CARDBUS=y
+
+#
+# PC-card bridges
+#
# CONFIG_YENTA is not set
CONFIG_PD6729=m
# CONFIG_I82092 is not set
# CONFIG_TCIC is not set
-CONFIG_PCMCIA_AU1X00=m
+# CONFIG_PCMCIA_AU1X00 is not set
#
# PCI Hotplug Support
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_BLK_DEV_IDECS is not set
+CONFIG_BLK_DEV_IDECS=m
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
#
# IDE chipset support/bugfixes
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
# CONFIG_IDEDMA_PCI_AUTO is not set
-CONFIG_BLK_DEV_ADMA=y
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
#
# IP: Virtual Server Configuration
# IP: Netfilter Configuration
#
# CONFIG_IP_NF_CONNTRACK is not set
+CONFIG_IP_NF_CONNTRACK_MARK=y
# CONFIG_IP_NF_QUEUE is not set
# CONFIG_IP_NF_IPTABLES is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# PCMCIA network device support
#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
+# CONFIG_NET_PCMCIA is not set
#
# Wan interfaces
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
#
# PCMCIA character devices
#
-# CONFIG_SYNCLINK_CS is not set
+CONFIG_SYNCLINK_CS=m
# CONFIG_RAW_DRIVER is not set
#
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_EXPORTFS=m
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_CIFS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=m
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_BLOWFISH is not set
CONFIG_CRYPTO_TWOFISH=y
# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_TEA=m
# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=m
#
# Library routines
#
-CONFIG_CRC16=m
+CONFIG_CRC_CCITT=m
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:06 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
CONFIG_SNI_RM200_PCI=y
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_BLK_DEV_LOOP=m
CONFIG_BLK_DEV_CRYPTOLOOP=m
CONFIG_BLK_DEV_NBD=m
-# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_SX8=m
+CONFIG_BLK_DEV_UB=m
CONFIG_BLK_DEV_RAM=m
CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_IN2000 is not set
-# CONFIG_SCSI_MEGARAID is not set
+CONFIG_MEGARAID_NEWGEN=y
+CONFIG_MEGARAID_MM=m
+CONFIG_MEGARAID_MAILBOX=m
# CONFIG_SCSI_SATA is not set
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_GENERIC_NCR5380 is not set
# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
# CONFIG_SCSI_INIA100 is not set
CONFIG_SCSI_PPA=m
CONFIG_SCSI_IMM=m
# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
CONFIG_SCSI_QLA2XXX=y
# CONFIG_SCSI_QLA21XX is not set
# CONFIG_SCSI_QLA22XX is not set
CONFIG_MD_LINEAR=m
CONFIG_MD_RAID0=m
CONFIG_MD_RAID1=m
+CONFIG_MD_RAID10=m
CONFIG_MD_RAID5=m
# CONFIG_MD_RAID6 is not set
CONFIG_MD_MULTIPATH=m
+CONFIG_MD_FAULTY=m
CONFIG_BLK_DEV_DM=m
# CONFIG_DM_CRYPT is not set
-# CONFIG_DM_SNAPSHOT is not set
-# CONFIG_DM_MIRROR is not set
-# CONFIG_DM_ZERO is not set
+CONFIG_DM_SNAPSHOT=m
+CONFIG_DM_MIRROR=m
+CONFIG_DM_ZERO=m
#
# Fusion MPT device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+CONFIG_IP_TCPDIAG_IPV6=y
#
# IP: Virtual Server Configuration
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_TUNNEL=m
CONFIG_IPV6_TUNNEL=m
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
# IP: Netfilter Configuration
#
CONFIG_IP_NF_CONNTRACK=m
+# CONFIG_IP_NF_CT_ACCT is not set
+CONFIG_IP_NF_CONNTRACK_MARK=y
+CONFIG_IP_NF_CT_PROTO_SCTP=m
CONFIG_IP_NF_FTP=m
CONFIG_IP_NF_IRC=m
CONFIG_IP_NF_TFTP=m
CONFIG_IP_NF_MATCH_CONNTRACK=m
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_MATCH_PHYSDEV=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_REALM=m
+CONFIG_IP_NF_MATCH_SCTP=m
+CONFIG_IP_NF_MATCH_COMMENT=m
+CONFIG_IP_NF_MATCH_CONNMARK=m
+CONFIG_IP_NF_MATCH_HASHLIMIT=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_TARGET_TCPMSS=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_DSCP=m
CONFIG_IP_NF_TARGET_MARK=m
CONFIG_IP_NF_TARGET_CLASSIFY=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_IP_NF_TARGET_TCPMSS=m
+CONFIG_IP_NF_TARGET_CONNMARK=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_TARGET_NOTRACK=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_IP_NF_COMPAT_IPCHAINS=m
-CONFIG_IP_NF_COMPAT_IPFWADM=m
-CONFIG_IP_NF_TARGET_NOTRACK=m
-CONFIG_IP_NF_RAW=m
-# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
-# CONFIG_IP_NF_MATCH_REALM is not set
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
#
# IPv6: Netfilter Configuration
CONFIG_IP6_NF_MATCH_AHESP=m
CONFIG_IP6_NF_MATCH_LENGTH=m
CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_MATCH_PHYSDEV=m
CONFIG_IP6_NF_FILTER=m
CONFIG_IP6_NF_TARGET_LOG=m
CONFIG_IP6_NF_MANGLE=m
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CLK_JIFFIES=y
+# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
+# CONFIG_NET_SCH_CLK_CPU is not set
CONFIG_NET_SCH_CBQ=m
CONFIG_NET_SCH_HTB=m
CONFIG_NET_SCH_HFSC=m
-CONFIG_NET_SCH_CSZ=m
CONFIG_NET_SCH_PRIO=m
CONFIG_NET_SCH_RED=m
CONFIG_NET_SCH_SFQ=m
CONFIG_NET_SCH_TBF=m
CONFIG_NET_SCH_GRED=m
CONFIG_NET_SCH_DSMARK=m
-CONFIG_NET_SCH_DELAY=m
+CONFIG_NET_SCH_NETEM=m
CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
-# CONFIG_VIA_VELOCITY is not set
# CONFIG_LAN_SAA9730 is not set
# CONFIG_NET_POCKET is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
+CONFIG_VIA_VELOCITY=m
# CONFIG_TIGON3 is not set
#
# CONFIG_SERIO_CT82C710 is not set
CONFIG_SERIO_PARKBD=m
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
# CONFIG_LP_CONSOLE is not set
CONFIG_PPDEV=m
CONFIG_TIPAR=m
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+CONFIG_W1=m
+CONFIG_W1_MATROX=m
+CONFIG_W1_DS9490=m
+CONFIG_W1_DS9490R_BRIDGE=m
+CONFIG_W1_THERM=m
+CONFIG_W1_SMEM=m
+
#
# Misc devices
#
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Host Controller Drivers
CONFIG_USB_STORAGE_JUMPSHOT=y
#
-# USB Human Interface Devices (HID)
+# USB Input Devices
#
CONFIG_USB_HID=m
CONFIG_USB_HIDINPUT=y
#
#
-# USB Network adaptors
+# USB Network Adapters
#
CONFIG_USB_CATC=m
CONFIG_USB_KAWETH=m
CONFIG_USB_GENESYS=y
CONFIG_USB_NET1080=y
CONFIG_USB_PL2301=y
+CONFIG_USB_KC2190=y
#
# Intelligent USB Devices/Gadgets
CONFIG_USB_SERIAL_BELKIN=m
CONFIG_USB_SERIAL_WHITEHEAT=m
CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
CONFIG_USB_SERIAL_EMPEG=m
CONFIG_USB_SERIAL_FTDI_SIO=m
CONFIG_USB_SERIAL_VISOR=m
CONFIG_USB_SERIAL_IR=m
CONFIG_USB_SERIAL_EDGEPORT=m
CONFIG_USB_SERIAL_EDGEPORT_TI=m
+# CONFIG_USB_SERIAL_IPW is not set
CONFIG_USB_SERIAL_KEYSPAN_PDA=m
CONFIG_USB_SERIAL_KEYSPAN=m
CONFIG_USB_SERIAL_KEYSPAN_MPR=y
CONFIG_USB_LCD=m
CONFIG_USB_LED=m
CONFIG_USB_CYTHERM=m
+CONFIG_USB_PHIDGETKIT=m
CONFIG_USB_PHIDGETSERVO=m
CONFIG_USB_TEST=m
+#
+# USB ATM/DSL drivers
+#
+
#
# USB Gadget Support
#
-CONFIG_USB_GADGET=m
-CONFIG_USB_GADGET_NET2280=y
-CONFIG_USB_NET2280=m
-# CONFIG_USB_GADGET_PXA2XX is not set
-# CONFIG_USB_GADGET_GOKU is not set
-# CONFIG_USB_GADGET_SA1100 is not set
-# CONFIG_USB_GADGET_DUMMY_HCD is not set
-CONFIG_USB_GADGET_DUALSPEED=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-# CONFIG_USB_ETH_RNDIS is not set
-CONFIG_USB_GADGETFS=m
-# CONFIG_USB_FILE_STORAGE is not set
-# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_GADGET is not set
#
# File systems
CONFIG_REISERFS_FS_XATTR=y
CONFIG_REISERFS_FS_POSIX_ACL=y
CONFIG_REISERFS_FS_SECURITY=y
-CONFIG_JFS_FS=m
-# CONFIG_JFS_POSIX_ACL is not set
-# CONFIG_JFS_DEBUG is not set
-# CONFIG_JFS_STATISTICS is not set
+# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_XFS_FS=m
# CONFIG_XFS_RT is not set
CONFIG_ROMFS_FS=m
# CONFIG_QUOTA is not set
CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
CONFIG_ZISOFS=y
CONFIG_ZISOFS_FS=m
CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
#
# DOS/FAT/NT Filesystems
CONFIG_SUNRPC=m
CONFIG_SUNRPC_GSS=m
CONFIG_RPCSEC_GSS_KRB5=m
+CONFIG_RPCSEC_GSS_SPKM3=m
CONFIG_SMB_FS=m
# CONFIG_SMB_NLS_DEFAULT is not set
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_XATTR is not set
# CONFIG_CIFS_POSIX is not set
CONFIG_NCP_FS=m
CONFIG_NCPFS_PACKET_SIGNING=y
CONFIG_NLS_ISO8859_8=m
CONFIG_NLS_CODEPAGE_1250=m
CONFIG_NLS_CODEPAGE_1251=m
-# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ASCII=m
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_BLOWFISH=m
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_TEA=m
# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=m
CONFIG_CRYPTO_MICHAEL_MIC=m
# CONFIG_CRYPTO_CRC32C is not set
#
# Library routines
#
-CONFIG_CRC16=m
+CONFIG_CRC_CCITT=m
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=m
CONFIG_ZLIB_DEFLATE=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:06 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
+CONFIG_LOCK_KERNEL=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=15
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
CONFIG_STOP_MACHINE=y
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
CONFIG_SIBYTE_SB1xxx_SOC=y
CONFIG_SIBYTE_SWARM=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
-
-#
-# MIPS initrd options
-#
-# CONFIG_EMBEDDED_RAMDISK is not set
#
# Device Drivers
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=9220
CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
CONFIG_BLK_DEV_IDETAPE=y
CONFIG_BLK_DEV_IDEFLOPPY=y
# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
#
# IDE chipset support/bugfixes
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
-CONFIG_NET_SB1250_MAC=y
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
+CONFIG_NET_SB1250_MAC=y
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
# CONFIG_SB1XXX_CORELIS is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_AES=m
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_TEA=m
# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
# CONFIG_CRYPTO_CRC32C is not set
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:06 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
# CONFIG_SYSVIPC is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
-#
-# MIPS initrd options
-#
-CONFIG_EMBEDDED_RAMDISK=y
-CONFIG_EMBEDDED_RAMDISK_IMAGE="ramdisk.gz"
-
#
# Device Drivers
#
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=18432
CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=y
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_SERIO_I8042 is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=y
#
# Input Device Drivers
# CONFIG_UNIX98_PTYS is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=y
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:07 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_BLK_DEV_NBD=m
CONFIG_BLK_DEV_RAM=m
CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDEFLOPPY is not set
CONFIG_BLK_DEV_IDESCSI=y
# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
#
# SCSI low-level drivers
#
-# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
# CONFIG_SCSI_DEBUG is not set
#
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_NAT=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
#
# Graphics support
#
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_VIRTUAL is not set
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE is not set
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
CONFIG_ROMFS_FS=m
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS4_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_EXPORTFS=m
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
CONFIG_SMB_NLS_DEFAULT=y
CONFIG_SMB_NLS_REMOTE="cp932"
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+CONFIG_CRC_CCITT=m
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:07 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
# CONFIG_IBM_WORKPAD is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_NAT=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
CONFIG_IP_PNP=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
CONFIG_ROMFS_FS=m
# CONFIG_QUOTA is not set
CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
CONFIG_AUTOFS4_FS=y
CONFIG_DEVPTS_FS_XATTR=y
CONFIG_DEVPTS_FS_SECURITY=y
CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
CONFIG_SMB_FS=m
CONFIG_SMB_NLS_DEFAULT=y
CONFIG_SMB_NLS_REMOTE="cp932"
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+CONFIG_CRC_CCITT=m
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=m
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:12:08 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
CONFIG_MACH_VR41XX=y
# CONFIG_CASIO_E55 is not set
CONFIG_IBM_WORKPAD=y
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
# CONFIG_CPU_ADVANCED is not set
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
#
# IDE chipset support/bugfixes
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
+CONFIG_XFRM_USER=m
#
# SCTP Configuration (EXPERIMENTAL)
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_EXPORTFS=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+++ /dev/null
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MIPS=y
-# CONFIG_MIPS64 is not set
-# CONFIG_64BIT is not set
-CONFIG_MIPS32=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MIPS_EV64120 is not set
-# CONFIG_MIPS_EV96100 is not set
-# CONFIG_MIPS_IVR is not set
-# CONFIG_LASAT is not set
-# CONFIG_MIPS_ITE8172 is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MOMENCO_OCELOT is not set
-# CONFIG_MOMENCO_OCELOT_G is not set
-# CONFIG_MOMENCO_OCELOT_C is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_DDB5074 is not set
-# CONFIG_DDB5476 is not set
-# CONFIG_DDB5477 is not set
-# CONFIG_NEC_OSPREY is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SOC_AU1X00 is not set
-# CONFIG_SIBYTE_SB1xxx_SOC is not set
-# CONFIG_SNI_RM200_PCI is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-# CONFIG_FB is not set
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32=y
-# CONFIG_CPU_MIPS64 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-# CONFIG_VTAG_ICACHE is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-# CONFIG_CPU_ADVANCED is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCMCIA/CardBus support
-#
-CONFIG_PCMCIA=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_TCIC is not set
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_NETLINK_DEV=y
-CONFIG_UNIX=y
-CONFIG_NET_KEY=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# PCMCIA network device support
-#
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=m
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-# CONFIG_PCMCIA_PCNET is not set
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-CONFIG_PPP=m
-CONFIG_PPP_MULTILINK=y
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=m
-# CONFIG_PPP_BSDCOMP is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_RTC=y
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-
-#
-# PCMCIA character devices
-#
-# CONFIG_SYNCLINK_CS is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-# CONFIG_EXT2_FS_SECURITY is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_AUTOFS_FS=m
-CONFIG_AUTOFS4_FS=m
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS_XATTR=y
-CONFIG_DEVPTS_FS_SECURITY=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=m
-# CONFIG_NFSD_V3 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_EXPORTFS=m
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-CONFIG_SMB_FS=m
-# CONFIG_SMB_NLS_DEFAULT is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Kernel hacking
-#
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-# CONFIG_CRYPTO_MD4 is not set
-# CONFIG_CRYPTO_MD5 is not set
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_DES is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-CONFIG_CRYPTO_TWOFISH=y
-# CONFIG_CRYPTO_SERPENT is not set
-CONFIG_CRYPTO_AES=y
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_ARC4 is not set
-CONFIG_CRYPTO_DEFLATE=y
-CONFIG_CRYPTO_MICHAEL_MIC=y
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Library routines
-#
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Fri Nov 26 00:00:39 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
# CONFIG_EXPERIMENTAL is not set
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
+CONFIG_STOP_MACHINE=y
#
# Machine selection
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
CONFIG_PMC_YOSEMITE=y
# CONFIG_HYPERTRANSPORT is not set
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_IRQ_CPU=y
CONFIG_IRQ_CPU_RM7K=y
+CONFIG_SWAP_IO_SPACE=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_FB is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_HIGHMEM=y
-# CONFIG_SMP is not set
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
-# CONFIG_BINFMT_IRIX is not set
#
# Device Drivers
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_DEBUG_DRIVER is not set
#
# Memory Technology Devices (MTD)
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_NETFILTER is not set
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# USB support
#
# CONFIG_USB is not set
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
#
# USB Gadget Support
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# DOS/FAT/NT Filesystems
#
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
CONFIG_SYSFS=y
# CONFIG_DEVPTS_FS_XATTR is not set
CONFIG_TMPFS=y
+# CONFIG_TMPFS_XATTR is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
# Kernel hacking
#
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_INFO is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_KGDB is not set
+# CONFIG_RUNTIME_DEBUG is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
# Makefile for the common code of NEC DDB-Vrc5xxx board
#
-obj-y += irq.o nile4.o prom.o rtc_ds1386.o
+obj-y += nile4.o prom.o rtc_ds1386.o
+++ /dev/null
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: jsun@mvista.com or jsun@junsun.net
- *
- * arch/mips/ddb5xxx/common/irq.c
- * Common irq code for DDB boards. This really should belong
- * arch/mips/kernel/irq.c. Need to talk to Ralf.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <asm/irq.h>
-
-void (*irq_setup)(void);
-
-#ifdef CONFIG_KGDB
-static int kgdb_flag = 1;
-static int __init nokgdb(char *str)
-{
- kgdb_flag = 0;
- return 1;
-}
-__setup("nokgdb", nokgdb);
-#endif
-
-void __init init_IRQ(void)
-{
-#ifdef CONFIG_KGDB
- extern void breakpoint(void);
- extern void set_debug_traps(void);
-
- if (kgdb_flag) {
- printk("Wait for gdb client connection ...\n");
- set_debug_traps();
- breakpoint();
- }
-#endif
- /* set up default irq controller */
- init_generic_irq();
-
- /* invoke board-specific irq setup */
- irq_setup();
-}
printk("ddb_8254timer_irq called\n");
}
-void __init ddb_irq_setup(void)
+void __init arch_init_irq(void)
{
-#ifdef CONFIG_KGDB
- if (remote_debug)
- set_debug_traps();
- breakpoint(); /* you may move this line to whereever you want :-) */
-#endif
-
/* setup cascade interrupts */
setup_irq(NILE4_IRQ_BASE + NILE4_INT_INTE, &irq_cascade);
setup_irq(CPU_IRQ_BASE + CPU_NILE4_CASCADE, &irq_cascade);
/* Enable the interrupt cascade */
nile4_enable_irq(NILE4_IRQ_BASE+IRQ_I8259_CASCADE);
-
-
}
void nile4_irq_setup(u32 base) {
int i;
- extern irq_desc_t irq_desc[];
irq_base=base;
irq_desc[i].depth = 1;
irq_desc[i].handler = &nile4_irq_controller;
}
-
}
#if defined(CONFIG_RUNTIME_DEBUG)
#include <asm/ddb5xxx/ddb5074.h>
#include <asm/ddb5xxx/ddb5xxx.h>
-#ifdef CONFIG_KGDB
-extern void rs_kgdb_hook(int);
-extern void breakpoint(void);
-#endif
-
static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
static void ddb_machine_restart(char *command)
} while (1);
}
-extern void ddb_irq_setup(void);
extern void rtc_ds1386_init(unsigned long base);
extern void (*board_timer_setup) (struct irqaction * irq);
{
extern int panic_timeout;
- irq_setup = ddb_irq_setup;
set_io_port_base(NILE4_PCI_IO_BASE);
isa_slot_offset = NILE4_PCI_MEM_BASE;
board_timer_setup = ddb_timer_init;
extern void mips_cpu_irq_init(u32 irq_base);
extern void vrc5476_irq_init(u32 irq_base);
-void __init ddb5476_irq_setup(void)
+void __init arch_init_irq(void)
{
/* hardware initialization */
nile4_irq_setup();
#define TIMER_IRQ (VRC5476_IRQ_BASE + VRC5476_IRQ_GPT)
#endif
-#ifdef CONFIG_KGDB
-extern void breakpoint(void);
-#endif
-
static void (*back_to_prom) (void) = (void (*)(void)) 0xbfc00000;
static void ddb_machine_restart(char *command)
while (1);
}
-extern void ddb_irq_setup(void);
extern void rtc_ds1386_init(unsigned long base);
static void __init ddb_time_init(void)
static void ddb5476_board_init(void);
-extern void ddb5476_irq_setup(void);
-extern void (*irq_setup)(void);
static void __init ddb5476_setup(void)
{
extern int panic_timeout;
- irq_setup = ddb5476_irq_setup;
set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE));
board_time_init = ddb_time_init;
void __init
vrc5476_irq_init(u32 base)
{
- extern irq_desc_t irq_desc[];
u32 i;
irq_base = base;
for (i= base; i< base + NUM_VRC5476_IRQ; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &vrc5476_irq_controller;
+ irq_desc[i].depth = 1;
+ irq_desc[i].handler = &vrc5476_irq_controller;
}
}
extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL };
-void
-ddb5477_irq_setup(void)
+void __init arch_init_irq(void)
{
- db_run(printk("ddb5477_irq_setup invoked.\n"));
-
/* by default, we disable all interrupts and route all vrc5477
* interrupts to pin 0 (irq 2) */
ddb_out32(DDB_INTCTRL0, 0);
NULL /* no affinity stuff for UP */
};
-void
-vrc5477_irq_init(u32 irq_base)
+void __init vrc5477_irq_init(u32 irq_base)
{
- extern irq_desc_t irq_desc[];
u32 i;
for (i= irq_base; i< irq_base+ NUM_5477_IRQ; i++) {
* Copyright 2001 MontaVista Software Inc.
* Author: jsun@mvista.com or jsun@junsun.net
*
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ *
* arch/mips/ddb5xxx/ddb5477/setup.c
* Setup file for DDB5477.
*
#include <asm/gdb-stub.h>
#include <asm/traps.h>
#include <asm/debug.h>
-#include <asm/pci_channel.h>
#include <asm/ddb5xxx/ddb5xxx.h>
}
static void ddb5477_board_init(void);
-extern void ddb5477_irq_setup(void);
-extern void (*irq_setup)(void);
extern struct pci_controller ddb5477_ext_controller;
extern struct pci_controller ddb5477_io_controller;
/* initialize board - we don't trust the loader */
ddb5477_board_init();
- irq_setup = ddb5477_irq_setup;
set_io_port_base(KSEG1ADDR(DDB_PCI_IO_BASE));
board_time_init = ddb_time_init;
#define INITRD_SIZE (*(unsigned long *) (PARAM+0x21c))
extern int _ftext, _end; /* begin and end of kernel image */
-extern void *__rd_start, *__rd_end; /* begin and end of ramdisk image */
extern void kernel_entry(int, char **, unsigned long, int *);
void * memcpy(void * dest, const void *src, unsigned int count)
rex_clear_cache();
}
-#ifdef CONFIG_BLK_DEV_INITRD
- LOADER_TYPE = 1;
- INITRD_START = (long)&__rd_start;
- INITRD_SIZE = (long)&__rd_end - (long)&__rd_start;
-#endif
-
kernel_entry(argc, argv, magic, prom_vec);
}
extern asmlinkage void decstation_handle_int(void);
-#ifdef CONFIG_BLK_DEV_INITRD
-extern unsigned long initrd_start, initrd_end;
-extern void * __rd_start, * __rd_end;
-#endif
-
spinlock_t ioasic_ssr_lock;
volatile u32 *ioasic_base;
static void __init decstation_setup(void)
{
-#ifdef CONFIG_BLK_DEV_INITRD
- ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
-#endif
board_be_init = dec_be_init;
board_time_init = dec_time_init;
board_timer_setup = dec_timer_setup;
} /* dec_init_kn03 */
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
switch (mips_machtype) {
case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */
#
# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.10-rc2
+# Sun Nov 21 14:11:54 2004
#
CONFIG_MIPS=y
# CONFIG_MIPS64 is not set
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
+CONFIG_LOCALVERSION=""
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
#
# Loadable module support
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
+CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_KMOD=y
#
# Machine selection
#
# CONFIG_MACH_JAZZ is not set
-# CONFIG_BAGET_MIPS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MOMENCO_OCELOT_C is not set
+# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_DDB5074 is not set
# CONFIG_DDB5477 is not set
# CONFIG_NEC_OSPREY is not set
CONFIG_SGI_IP22=y
-# CONFIG_SGI_IP32 is not set
# CONFIG_SOC_AU1X00 is not set
# CONFIG_SIBYTE_SB1xxx_SOC is not set
# CONFIG_SNI_RM200_PCI is not set
CONFIG_CPU_HAS_LLDSCD=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_PREEMPT is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=m
CONFIG_TRAD_SIGNALS=y
-CONFIG_BINFMT_IRIX=y
#
# Device Drivers
#
# Generic Driver Options
#
+CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
+CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
#
# ATA/ATAPI/MFM/RLL support
# SCSI low-level drivers
#
CONFIG_SGIWD93_SCSI=y
-# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
+# CONFIG_SCSI_QLOGIC_1280_1040 is not set
# CONFIG_SCSI_DEBUG is not set
#
#
# IEEE 1394 (FireWire) support
#
-# CONFIG_IEEE1394 is not set
#
# I2O device support
CONFIG_INET_AH=m
CONFIG_INET_ESP=m
CONFIG_INET_IPCOMP=m
+CONFIG_INET_TUNNEL=m
+CONFIG_IP_TCPDIAG=m
+CONFIG_IP_TCPDIAG_IPV6=y
#
# IP: Virtual Server Configuration
CONFIG_INET6_AH=m
CONFIG_INET6_ESP=m
CONFIG_INET6_IPCOMP=m
+CONFIG_INET6_TUNNEL=m
CONFIG_IPV6_TUNNEL=m
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
# IP: Netfilter Configuration
#
CONFIG_IP_NF_CONNTRACK=m
+CONFIG_IP_NF_CT_ACCT=y
+CONFIG_IP_NF_CONNTRACK_MARK=y
+# CONFIG_IP_NF_CT_PROTO_SCTP is not set
CONFIG_IP_NF_FTP=m
CONFIG_IP_NF_IRC=m
CONFIG_IP_NF_TFTP=m
CONFIG_IP_NF_MATCH_STATE=m
CONFIG_IP_NF_MATCH_CONNTRACK=m
CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_REALM=m
+CONFIG_IP_NF_MATCH_SCTP=m
+CONFIG_IP_NF_MATCH_COMMENT=m
+CONFIG_IP_NF_MATCH_CONNMARK=m
+CONFIG_IP_NF_MATCH_HASHLIMIT=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_TARGET_TCPMSS=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_DSCP=m
CONFIG_IP_NF_TARGET_MARK=m
CONFIG_IP_NF_TARGET_CLASSIFY=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_IP_NF_TARGET_TCPMSS=m
+CONFIG_IP_NF_TARGET_CONNMARK=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_TARGET_NOTRACK=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_IP_NF_COMPAT_IPCHAINS=m
-CONFIG_IP_NF_COMPAT_IPFWADM=m
-CONFIG_IP_NF_TARGET_NOTRACK=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
-CONFIG_IP_NF_MATCH_REALM=m
+# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
+# CONFIG_IP_NF_COMPAT_IPFWADM is not set
#
# IPv6: Netfilter Configuration
CONFIG_NET_DIVERT=y
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
CONFIG_NET_SCHED=y
+# CONFIG_NET_SCH_CLK_JIFFIES is not set
+CONFIG_NET_SCH_CLK_GETTIMEOFDAY=y
+# CONFIG_NET_SCH_CLK_CPU is not set
CONFIG_NET_SCH_CBQ=m
CONFIG_NET_SCH_HTB=m
CONFIG_NET_SCH_HFSC=m
-CONFIG_NET_SCH_CSZ=m
CONFIG_NET_SCH_PRIO=m
CONFIG_NET_SCH_RED=m
CONFIG_NET_SCH_SFQ=m
CONFIG_NET_SCH_TBF=m
CONFIG_NET_SCH_GRED=m
CONFIG_NET_SCH_DSMARK=m
-CONFIG_NET_SCH_DELAY=m
+CONFIG_NET_SCH_NETEM=m
CONFIG_NET_SCH_INGRESS=m
CONFIG_NET_QOS=y
CONFIG_NET_ESTIMATOR=y
#
# Userland interfaces
#
-CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV=m
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_CT82C710 is not set
+CONFIG_SERIO_RAW=m
#
# Input Device Drivers
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_INPUT_MOUSE is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_SERIAL=m
+# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
#
# IPMI
# CONFIG_SOFT_WATCHDOG is not set
CONFIG_INDYDOG=m
# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
CONFIG_SGI_DS1286=m
+# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
-# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
CONFIG_RAW_DRIVER=m
#
# CONFIG_I2C is not set
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
#
# Misc devices
#
# Console display driver support
#
# CONFIG_VGA_CONSOLE is not set
-# CONFIG_MDA_CONSOLE is not set
CONFIG_SGI_NEWPORT_CONSOLE=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_FONT_8x16=y
#
# USB support
#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
# CONFIG_QFMT_V1 is not set
CONFIG_QFMT_V2=m
CONFIG_QUOTACTL=y
+CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=m
CONFIG_ZISOFS=y
CONFIG_ZISOFS_FS=m
CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
#
# DOS/FAT/NT Filesystems
CONFIG_SUNRPC=m
CONFIG_SUNRPC_GSS=m
CONFIG_RPCSEC_GSS_KRB5=m
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+CONFIG_SMB_NLS_DEFAULT=y
+CONFIG_SMB_NLS_REMOTE="cp437"
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_POSIX is not set
# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
+CONFIG_CODA_FS=m
+# CONFIG_CODA_FS_OLD_API is not set
# CONFIG_AFS_FS is not set
#
#
# Kernel hacking
#
+# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
-# CONFIG_DEBUG_KERNEL is not set
#
# Security options
#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
# CONFIG_SECURITY is not set
#
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-CONFIG_CRYPTO_DES=y
-CONFIG_CRYPTO_BLOWFISH=y
-CONFIG_CRYPTO_TWOFISH=y
-CONFIG_CRYPTO_SERPENT=y
-CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_SHA1=m
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_TEA=m
CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_ANUBIS=m
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_CRC32C=m
-# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_TEST=m
#
# Library routines
#
-CONFIG_CRC16=m
+# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
do_IRQ(ffz8(pending >> 8), regs);
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
set_except_vector(0, ev96100IRQ);
- init_generic_irq();
mips_cpu_irq_init(0);
}
*/
void gt64120_time_init(void)
{
- extern irq_desc_t irq_desc[NR_IRQS];
static struct irqaction timer;
/* Disable timer first */
set_c0_status(IE_IRQ2);
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
int i;
#include <linux/config.h>
-#if defined(CONFIG_KGDB)
+#ifdef CONFIG_KGDB
#include <asm/serial.h> /* For the serial port location and base baud */
extern asmlinkage void ocelot_handle_int(void);
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
/*
* Clear all of the interrupts while we change the able around a bit.
/* Sets the first-level interrupt dispatcher. */
set_except_vector(0, ocelot_handle_int);
- init_generic_irq();
mips_cpu_irq_init(0);
rm7k_cpu_irq_init(8);
-
-#ifdef CONFIG_KGDB
- printk("start kgdb ...\n");
- set_debug_traps();
- breakpoint(); /* you may move this line to whereever you want :-) */
-#endif
}
+++ /dev/null
-#
-# Makefile for the HP specific kernel interface routines
-# under Linux.
-#
-
-obj-y := init.o setup.o irq.o int-handler.o utils.o asic.o
-
-obj-$(CONFIG_KGDB) += gdb_hook.o
-obj-$(CONFIG_DIRECT_PRINTK) += gdb_hook.o
-
-obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o
-
-forceit:
-
-# package filesystem from rootfs directory into binary package
-romfs.bin: forceit ./rootfs
- @genromfs -d ./rootfs -f $@
-
-# transform rootfs.bin into object file format for linking
-initrd.o: romfs.bin
- @echo "" | $(CROSS_COMPILE)as -o $@
- @$(CROSS_COMPILE)objcopy --add-section .initrd=$< $@
-
-EXTRA_AFLAGS := $(CFLAGS)
-
-.PHONY: forceit
+++ /dev/null
-
-
-#include "asm/hp-lj/asic.h"
-
-AsicId GetAsicId(void)
-{
- static int asic = IllegalAsic;
-
- if (asic == IllegalAsic) {
- if (*(unsigned int *)0xbff70000 == 0x1114103c)
- asic = HarmonyAsic;
- else if (*(unsigned int *)0xbff80000 == 0x110d103c)
- asic = AndrosAsic;
- else
- asic = UnknownAsic;
- }
- return asic;
-}
-
-
-const char* const GetAsicName(void)
-{
- static const char* const Names[] =
- { "Illegal", "Unknown", "Andros", "Harmony" };
-
- return Names[(int)GetAsicId()];
-}
-
+++ /dev/null
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * This is the interface to the remote debugger stub.
- */
-#include <linux/serialP.h>
-#include <linux/serial_reg.h>
-
-#include <asm/serial.h>
-#include <asm/io.h>
-#include <asm/hp-lj/asic.h>
-
-
-int putDebugChar(char c);
-char getDebugChar(void);
-
-
-/////////////////////// andros values ///////////////////////////////////////////////////////
-#define SERIAL_REG(offset) (*((volatile unsigned int*)(HPSR_BASE_ADDR|offset)))
-
-// Register set base address
-#define HPSR_BASE_ADDR 0xbfe00000UL
-
-// Transmit / Receive Data
-#define HPSR_DATA_OFFSET 0x00020010UL
-// Transmit control / status
-#define HPSR_TX_STAT_OFFSET 0x0002000CUL
-// Receive status
-#define HPSR_RX_STAT_OFFSET 0x00020008UL
-
-#define HPSR_TX_STAT_READY 0x8UL
-#define HPSR_RX_DATA_AVAIL 0x4UL
-
-
-/////////////////////// harmony values ///////////////////////////////////////////////////////
-// Transmit / Receive Data
-#define H_HPSR_DATA_TX *((volatile unsigned int*)0xbff65014)
-// Transmit / Receive Data
-#define H_HPSR_DATA_RX *((volatile unsigned int*)0xbff65018)
-// Status
-#define H_HPSR_STAT *((volatile unsigned int*)0xbff65004)
-
-// harmony serial status bits
-#define H_SER_STAT_TX_EMPTY 0x04
-#define H_SER_STAT_RX_EMPTY 0x10
-
-
-
-
-int putDebugChar(char c)
-{
- if (GetAsicId() == HarmonyAsic) {
- while (!( ( (H_HPSR_STAT) & H_SER_STAT_TX_EMPTY) != 0));
-
- H_HPSR_DATA_TX = (unsigned int) c;
-
- } else if (GetAsicId() == AndrosAsic) {
- while (((SERIAL_REG(HPSR_TX_STAT_OFFSET) & HPSR_TX_STAT_READY) == 0))
- ;
- SERIAL_REG(HPSR_DATA_OFFSET) = (unsigned int) c;
- }
- return 1;
-}
-
-char getDebugChar(void)
-{
- if (GetAsicId() == HarmonyAsic) {
- while (!(((H_HPSR_STAT) & H_SER_STAT_RX_EMPTY) == 0));
-
- return H_HPSR_DATA_RX;
-
- } else if (GetAsicId() == AndrosAsic) {
- while ((SERIAL_REG(HPSR_RX_STAT_OFFSET) & HPSR_RX_DATA_AVAIL) == 0)
- ;
-
- return (SERIAL_REG(HPSR_DATA_OFFSET));
-
- }
-}
-
-
+++ /dev/null
-/*
- * init.c: PROM library initialisation code.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-
-#include <linux/mm.h>
-#include <asm/bootinfo.h>
-#include <asm/addrspace.h>
-#include <asm/hp-lj/asic.h>
-#include <linux/bootmem.h>
-
-#include "utils.h"
-
-
-#define Delimiter "CMDLINE="
-const char CommandLine[] = Delimiter
- "root=/dev/hda3 ";
-
-void __init prom_init(void)
-{
- ulong mem_size = get_mem_avail();
- int reserve_size = 0;
-
- printk("Total Memory: %ld bytes\n", mem_size);
-
- reserve_buffer(CommandLine, mem_size);
-
- reserve_size = get_reserved_buffer_size();
- mem_size -= reserve_size;
-
- add_memory_region(0x0,mem_size, BOOT_MEM_RAM);
- add_memory_region(mem_size,reserve_size, BOOT_MEM_RESERVED);
-
- printk("Main Memory: %ld bytes\n", mem_size);
- printk("Reserved Memory: %ld bytes at 0x%08x\n",
- get_reserved_buffer_size(), (ulong)get_reserved_buffer());
-
- printk("Detected %s ASIC\n", GetAsicName());
- mips_machgroup = MACH_GROUP_HP_LJ;
- mips_machtype = MACH_UNKNOWN;
-
- strcpy(arcs_cmdline, CommandLine+strlen(Delimiter));
-}
-
-
-unsigned long __init prom_free_prom_memory(void)
-{
- return 0;
-}
+++ /dev/null
-#include <asm/asm.h>
-
-#include <asm/mipsregs.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-
- .text
- .set mips1
- .set reorder
- .set macro
- .set noat
- .align 5
-
-# MIPS has 16 exception vectors numbered 0 to 15
-# vector number 0 is for interrupts and the others are for various exceptions
-# The following code is installed as the handler for exception 0
-# There are 8 possible interrupts that can cause this exception.
-# The cause register indicates which are pending
-# The status register indicates which are enabled
-# This code segment basically will decipher which interrup occurred (7 downto 0)
-# and pass an integer indicating which was the highest priority pending interrupt
-# to the do_IRQ routine.
-
-NESTED(hpIRQ, PT_SIZE, sp)
- SAVE_ALL
- CLI # Important: mark KERNEL mode !
- /*
- * Get pending interrupts
- */
-
- mfc0 t0,CP0_CAUSE # get pending interrupts
- mfc0 t1,CP0_STATUS # get enabled interrupts
- and t0,t1 # isolate allowed ones
- andi t0,0xff00 # isolate pending bits
- sll t0,16 # shift the pending bits down
- beqz t0,3f # no pending intrs, then spurious
- nop # delay slot
-
- /*
- * Find irq with highest priority
- * FIXME: This is slow - use binary search
- */
-
- la a0,7
-1: bltz t0,2f # found pending irq
- subu a0,1
- sll t0,1
- b 1b
- nop # delay slot
-
-
-call_do_IRQ:
-2: move a1,sp
- jal do_IRQ
- nop # delay slot
- j ret_from_irq
- nop
-
-/*
- mfc0 t0,CP0_STATUS # disable interrupts
- ori t0,1
- xori t0,1
- mtc0 t0,CP0_STATUS
-
- la a1, ret_from_irq
- jr a1
-*/
-3: j spurious_interrupt
-END(hpIRQ)
-
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Code to handle x86 style IRQs plus some generic interrupt stuff.
- *
- * Copyright (C) 1992 Linus Torvalds
- * Copyright (C) 1994 - 2000 Ralf Baechle
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-#include <asm/gdb-stub.h>
-
-void __init init_IRQ(void)
-{
- extern void hpIRQ(void);
- extern void mips_cpu_irq_init(u32 base);
- mips_cpu_irq_init(0);
- set_except_vector(0, hpIRQ);
-
-#ifdef CONFIG_KGDB
- {
- extern void breakpoint(void);
- extern int remote_debug;
-
- if (remote_debug) {
- set_debug_traps();
- breakpoint();
- }
- }
-#endif
-
-}
+++ /dev/null
-/*
- * Setup pointers to hardware-dependent routines.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1996, 1997, 1998 by Ralf Baechle
- */
-#include <linux/config.h>
-#include <linux/hdreg.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/ide.h>
-#include <linux/bootmem.h>
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/hp-lj/asic.h>
-#include "utils.h"
-
-extern char CommandLine[];
-extern void pci_setup(void);
-
-#ifdef CONFIG_KGDB
-int remote_debug = 0;
-#endif
-
-const char *get_system_type(void)
-{
- return "HP LaserJet"; /* But which exactly? */
-}
-
-static void (*timer_interrupt_service) (int irq, void *dev_id,
- struct pt_regs * regs) = NULL;
-
-
-static void andros_timer_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
-{
- if (!(*((volatile unsigned int *) 0xbfea0010) & 0x20)) // mask = pend & en
- return;
-
- /* clear timer interrupt */
- {
- unsigned int tmr = *((volatile unsigned int *) 0xbfe90040); // ctl bits
- *((volatile unsigned int *) 0xbfe90040) = tmr; // write to ack
- *((volatile unsigned int *) 0xbfea000c) = 0x20; // sys int ack
- }
-
- /* service interrupt */
- timer_interrupt_service(irq, dev_id, regs);
-}
-
-static void harmony_timer_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
-{
- if (!(*((volatile unsigned int *) 0xbff63000) & 0x01))
- return; // big sys int reg, 01-timer did it
- if (!(*((volatile unsigned int *) 0xbff610a4) & 0x01))
- return; // local small int reg, 01-timer0 did it
-
- *((volatile unsigned int *) 0xbff610a4) = 1; // ack local timer0 bit
- *((volatile unsigned int *) 0xbff63000) = 1; // ack global timer bit
-
- /* service interrupt */
- timer_interrupt_service(irq, dev_id, regs);
-}
-
-
-#define ASIC_IRQ_NUMBER 2
-
-
-static void __init hp_time_init(struct irqaction *irq)
-{
- timer_interrupt_service = irq->handler;
-
- if (GetAsicId() == AndrosAsic) {
- //*((volatile unsigned int*)0xbfe90000) = 0x2f; // set by bootloader to 0x20 // prescaler
- *((volatile unsigned int *) 0xbfe90040) = 0x21; // 20-res of 1kHz,1-int ack // control
- *((volatile unsigned int *) 0xbfe90048) = 0x09; // 09-reload val // reload
- *((volatile unsigned int *) 0xbfe90044) = 0x09; // 09-count val // count
- *((volatile unsigned int *) 0xbfe90040) = 0x2f; // 8-int enable,4-reload en,2-count down en,1-int-ack
-
- irq->handler = andros_timer_interrupt;
- irq->flags |= SA_INTERRUPT | SA_SHIRQ;
- printk("setting up timer in hp_time_init\n");
- setup_irq(ASIC_IRQ_NUMBER, irq);
-
- // enable timer interrupt
- *((volatile unsigned int *) 0xbfea0000) = 0x20;
-
- } else if (GetAsicId() == HarmonyAsic) {
-
- *((volatile unsigned int *) 0xbff61000) = 99; // prescaler, 100Mz sys clk
- *((volatile unsigned int *) 0xbff61028) = 0x09; // reload reg
- *((volatile unsigned int *) 0xbff61024) = 0x09; // count reg
- *((volatile unsigned int *) 0xbff61020) = 0x0b; // 80-1khz res on timer, 2 reload en, 1 - count down en
-
- irq->handler = harmony_timer_interrupt;
- irq->flags |= SA_INTERRUPT | SA_SHIRQ;
- setup_irq(ASIC_IRQ_NUMBER, irq);
-
- *((volatile unsigned int *) 0xbff610a0) |= 1; // turn on timer0
-
- } else if (GetAsicId() == UnknownAsic)
- printk("Unknown asic in hp_time_init()\n");
- else
- printk("Unsupported asic in hp_time_init()\n");
-}
-
-
-static void hplj_restart(void)
-{
- if (GetAsicId() == AndrosAsic)
- *((volatile unsigned int *) 0xbfe900c0) = 0;
-
-
- if (GetAsicId() == HarmonyAsic)
- *((volatile unsigned int *) 0xbff62030) = 0;
-
- printk("Restart Failed ... halting instead\n");
- while (1);
-}
-
-static void hplj_halt(void)
-{
- while (1);
-}
-
-static void __init hp_setup(void)
-{
-#ifdef CONFIG_PCI
- pci_setup();
-#endif
-
- _machine_restart = (void (*)(char *)) hplj_restart;
- _machine_halt = hplj_halt;
- _machine_power_off = hplj_halt;
-
- board_timer_setup = hp_time_init;
-
-#ifdef CONFIG_KGDB
- remote_debug = (strstr(CommandLine, "kgdb") != NULL);
-#endif
-
- printk("HP SETUP\n");
-}
-
-early_initcall(hp_setup);
+++ /dev/null
-/*
- *
- *
- *
- *
- */
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/module.h>
-#include <asm/io.h>
-#include "utils.h"
-
-
-#define miu_chan_cfg(x) ((volatile unsigned long *)(0xbff40000+x*4)) /* for andros */
-
-int mbsize[8] = {1,2,4,8,16,32,64,128};
-
-unsigned long get_mem_avail(void) {
-
- unsigned long cfg[10],i,total_mem=0;
-
- for(i=0;i<10;i++)
- cfg[i] = *miu_chan_cfg(i);
-
- for(i=0;i<10;i++){
- if(cfg[i]==0x1fc160c2) continue; // skip empties
- if( ( (cfg[i]>>12) & 0xf ) <= 0xb ) continue; // skip roms
- total_mem += mbsize[(cfg[i]>>16)&0x7] *1024*1024;
- }
- return total_mem;
-}
-
-
-
-
-static ulong* buffer_ptr = NULL;
-static ulong buffer_size = 0;
-
-ulong* get_reserved_buffer(void) {return KSEG0ADDR(buffer_ptr);}
-ulong* get_reserved_buffer_virtual(void) {return (ulong*)ReservedMemVirtualAddr;}
-ulong get_reserved_buffer_size(void) {return buffer_size;}
-
-#define MIN_GEN_MEM (4 << 20)
-
-
-void reserve_buffer(const char* cl, ulong base_mem)
-{
- char* pos = strstr(cl, "reserved_buffer=");
- if (pos) {
- buffer_size = simple_strtol(pos+strlen("reserved_buffer="),
- 0, 10);
- buffer_size <<= 20;
- if (buffer_size + MIN_GEN_MEM > base_mem)
- buffer_size = base_mem - MIN_GEN_MEM;
- if (buffer_size > 0)
- buffer_ptr = (ulong*)(base_mem - buffer_size);
- else
- buffer_size = 0;
- }
-}
-
-
-
-EXPORT_SYMBOL(get_reserved_buffer);
-EXPORT_SYMBOL(get_reserved_buffer_virtual);
-EXPORT_SYMBOL(get_reserved_buffer_size);
-
-
+++ /dev/null
-/*
- *
- *
- *
- */
-
-#include <linux/types.h>
-
-#define ReservedMemVirtualAddr 0x50000000
-
-unsigned long get_mem_avail(void);
-
-ulong* get_reserved_buffer(void);
-ulong* get_reserved_buffer_virtual(void);
-ulong get_reserved_buffer_size(void);
-
-void reserve_buffer(const char* cl, ulong base_mem);
-
-
#define DPRINTK(fmt, args...)
#endif
-#ifdef CONFIG_KGDB
-extern void breakpoint(void);
-#endif
-
/* revisit */
#define EXT_IRQ0_TO_IP 2 /* IP 2 */
#define EXT_IRQ5_TO_IP 7 /* IP 7 */
local_irq_restore(flags);
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
int i;
unsigned long flags;
memset(irq_desc, 0, sizeof(irq_desc));
set_except_vector(0, it8172_IRQ);
- init_generic_irq();
-
/* mask all interrupts */
it8172_hw0_icregs->lb_mask = 0xffff;
it8172_hw0_icregs->lpc_mask = 0xffff;
}
irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type;
set_c0_status(ALLINTS_NOTIMER);
-
-#ifdef CONFIG_KGDB
- /* If local serial I/O used for debug port, enter kgdb at once */
- puts("Waiting for kgdb to connect...");
- set_debug_traps();
- breakpoint();
-#endif
}
void mips_spurious_interrupt(struct pt_regs *regs)
static spinlock_t r4030_lock = SPIN_LOCK_UNLOCKED;
-extern asmlinkage void sni_rm200_pci_handle_int(void);
-
static void enable_r4030_irq(unsigned int irq)
{
- unsigned int mask = 1 << (irq - JAZZ_IE_PARALLEL);
+ unsigned int mask = 1 << (irq - JAZZ_PARALLEL_IRQ);
unsigned long flags;
spin_lock_irqsave(&r4030_lock, flags);
void disable_r4030_irq(unsigned int irq)
{
- unsigned int mask = ~(1 << (irq - JAZZ_IE_PARALLEL));
+ unsigned int mask = ~(1 << (irq - JAZZ_PARALLEL_IRQ));
unsigned long flags;
spin_lock_irqsave(&r4030_lock, flags);
* driver compatibility reasons interrupts 0 - 15 to be the i8259
* interrupts even if the hardware uses a different interrupt numbering.
*/
-void __init init_IRQ (void)
+void __init arch_init_irq(void)
{
set_except_vector(0, jazz_handle_int);
- init_generic_irq();
init_i8259_irqs(); /* Integrated i8259 */
init_r4030_ints();
return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
}
+EXPORT_SYMBOL(vdma_phys2log);
+
/*
* Translate a logical DMA address to a physical address
*/
R4030_CHNL_ENABLE);
}
+EXPORT_SYMBOL(vdma_enable);
+
/*
* Disable a DMA channel
*/
*((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
}
+EXPORT_SYMBOL(vdma_disable);
+
/*
* Set DMA mode. This function accepts the mode values used
* to set a PC-style DMA controller. For the SCSI and FDC
}
}
+EXPORT_SYMBOL(vdma_set_mode);
+
/*
* Set Transfer Address
*/
r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
}
+EXPORT_SYMBOL(vdma_set_addr);
+
/*
* Set Transfer Count
*/
r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
}
+EXPORT_SYMBOL(vdma_set_count);
+
/*
* Get Residual
*/
#include <asm/reboot.h>
#include <asm/delay.h>
-#define jazz_kh ((keyboard_hardware *) JAZZ_KEYBOARD_ADDRESS)
-
#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
static void jazz_write_output(unsigned char val)
int jmr3927_ether1_irq = 0;
void jmr3927_irq_init(u32 irq_base);
-void jmr3927_irq_setup(void)
+
+void __init arch_init_irq(void)
{
/* look for io board's presence */
int have_isac = jmr3927_have_isac();
set_c0_status(ST0_IM); /* IE bit is still 0. */
}
-void (*irq_setup)(void);
-
-void __init init_IRQ(void)
-{
-
-#ifdef CONFIG_KGDB
- extern void breakpoint(void);
- extern void set_debug_traps(void);
-
- puts("Wait for gdb client connection ...\n");
- set_debug_traps();
- breakpoint();
-#endif
-
- /* invoke board-specific irq setup */
- irq_setup();
-}
-
static hw_irq_controller jmr3927_irq_controller = {
"jmr3927_irq",
jmr3927_irq_startup,
{
u32 i;
- init_generic_irq();
for (i= irq_base; i< irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
}
-#if defined(CONFIG_BLK_DEV_INITRD)
-extern unsigned long __rd_start, __rd_end, initrd_start, initrd_end;
-#endif
-
//#undef DO_WRITE_THROUGH
#define DO_WRITE_THROUGH
#define DO_ENABLE_CACHE
extern char * __init prom_getcmdline(void);
static void jmr3927_board_init(void);
-extern void jmr3927_irq_setup(void);
extern struct resource pci_io_resource;
extern struct resource pci_mem_resource;
extern int panic_timeout;
char *argptr;
- irq_setup = jmr3927_irq_setup;
set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
board_time_init = jmr3927_time_init;
/*
- * Copyright (C) 2003 Maciej W. Rozycki
+ * Copyright (C) 2003, 2004 Maciej W. Rozycki
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
#include <linux/stddef.h>
#include <asm/bugs.h>
+#include <asm/compiler.h>
#include <asm/cpu.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
".set pop"
: "=&r" (lv1), "=r" (lw)
: "r" (m1), "r" (m2), "r" (s), "I" (0)
- : "hi", "lo", "accum");
+ : "hi", "lo", GCC_REG_ACCUM);
/* We have to use single integers for m1 and m2 and a double
* one for p to be sure the mulsidi3 gcc's RTL multiplication
* instruction has the workaround applied. Older versions of
case CPU_R5000:
case CPU_NEVADA:
case CPU_RM7000:
+ case CPU_RM9000:
case CPU_TX49XX:
case CPU_4KC:
case CPU_4KEC:
#include <asm/stackframe.h>
#include <asm/isadep.h>
#include <asm/thread_info.h>
+#include <asm/war.h>
#ifdef CONFIG_PREEMPT
.macro preempt_stop reg=t0
1: ll t0, %lo(irq_err_count)(t1)
addiu t0, 1
sc t0, %lo(irq_err_count)(t1)
+#if R10000_LLSC_WAR
+ beqzl t0, 1b
+#else
beqz t0, 1b
+#endif
#else
lui t1, %hi(irq_err_count)
lw t0, %lo(irq_err_count)(t1)
static unsigned char *mem2hex(char *mem, char *buf, int count, int may_fault);
void handle_exception(struct gdb_regs *regs);
+int kgdb_enabled;
+
/*
* spin locks for smp case
*/
#include <asm/stackframe.h>
#include <asm/war.h>
+#define PANIC_PIC(msg) \
+ .set push; \
+ .set reorder; \
+ PTR_LA a0,8f; \
+ .set noat; \
+ PTR_LA AT, panic; \
+ jr AT; \
+9: b 9b; \
+ .set pop; \
+ TEXT(msg)
+
__INIT
NESTED(except_vec0_generic, 0, sp)
- PANIC("Exception vector 0 called")
+ PANIC_PIC("Exception vector 0 called")
END(except_vec0_generic)
NESTED(except_vec1_generic, 0, sp)
- PANIC("Exception vector 1 called")
+ PANIC_PIC("Exception vector 1 called")
END(except_vec1_generic)
/*
NESTED(ejtag_debug_handler, PT_SIZE, sp)
.set push
.set noat
- .set noreorder
MTC0 k0, CP0_DESAVE
mfc0 k0, CP0_DEBUG
sll k0, k0, 30 # Check for SDBBP.
bgez k0, ejtag_return
- nop
PTR_LA k0, ejtag_debug_buffer
LONG_S k1, 0(k0)
SAVE_ALL
+ move a0, sp
jal ejtag_exception_handler
- move a0, sp
RESTORE_ALL
PTR_LA k0, ejtag_debug_buffer
LONG_L k1, 0(k0)
MFC0 k0, CP0_DESAVE
.set mips32
deret
- nop
.set pop
END(ejtag_debug_handler)
.endm
/*
- * For the moment set ST0_KU so the CPU will not spit fire when
- * executing 64-bit instructions. The full initialization of the
- * CPU's status register is done later in per_cpu_trap_init().
+ * For the moment disable interrupts, mark the kernel mode and
+ * set ST0_KX so that the CPU does not spit fire when using
+ * 64-bit addresses. A full initialization of the CPU's status
+ * register is done later in per_cpu_trap_init().
*/
- .macro setup_c0_status
-#ifdef CONFIG_MIPS64
+ .macro setup_c0_status set clr
+ .set push
mfc0 t0, CP0_STATUS
- or t0, ST0_KX
+ or t0, ST0_CU0|\set|0x1f|\clr
+ xor t0, 0x1f|\clr
mtc0 t0, CP0_STATUS
+ .set noreorder
+ sll zero,3 # ehb
+ .set pop
+ .endm
+
+ .macro setup_c0_status_pri
+#ifdef CONFIG_MIPS64
+ setup_c0_status ST0_KX 0
+#else
+ setup_c0_status 0 0
+#endif
+ .endm
+
+ .macro setup_c0_status_sec
+#ifdef CONFIG_MIPS64
+ setup_c0_status ST0_KX ST0_BEV
+#else
+ setup_c0_status 0 ST0_BEV
#endif
.endm
__INIT
NESTED(kernel_entry, 16, sp) # kernel entry point
- setup_c0_status
+ setup_c0_status_pri
#ifdef CONFIG_SGI_IP27
GET_NASID_ASM t1
ARC64_TWIDDLE_PC
- CLI # disable interrupts
-
PTR_LA t0, __bss_start # clear .bss
LONG_S zero, (t0)
PTR_LA t1, __bss_stop - LONGSIZE
set_saved_sp sp, t0, t1
PTR_SUBU sp, 4 * SZREG # init stack pointer
- jal start_kernel
+ j start_kernel
END(kernel_entry)
#ifdef CONFIG_SMP
* function after setting up the stack and gp registers.
*/
NESTED(smp_bootstrap, 16, sp)
+ setup_c0_status_sec
+
#ifdef CONFIG_SGI_IP27
GET_NASID_ASM t1
dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
ARC64_TWIDDLE_PC
#endif /* CONFIG_SGI_IP27 */
- CLI
- setup_c0_status
- jal start_secondary
+ j start_secondary
END(smp_bootstrap)
#endif /* CONFIG_SMP */
page invalid_pmd_table, _PMD_ORDER
#endif
page invalid_pte_table, _PTE_ORDER
-
-#ifdef CONFIG_MIPS64
- /*
- * 64-bit kernel mappings are really screwed up ...
- */
- page kptbl, _PGD_ORDER
- .globl ekptbl
- page kpmdtbl, 0
-ekptbl:
-#endif
* lets ACK and report it. [once per IRQ]
*/
if (!(spurious_irq_mask & irqmask)) {
- printk("spurious 8259A interrupt: IRQ%d.\n", irq);
+ printk(KERN_DEBUG "spurious 8259A interrupt: IRQ%d.\n", irq);
spurious_irq_mask |= irqmask;
}
atomic_inc(&irq_err_count);
* IRQ2 is cascade interrupt to second interrupt controller
*/
static struct irqaction irq2 = {
- no_action, 0, 0, "cascade", NULL, NULL
+ no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL
};
static struct resource pic1_io_resource = {
COMPATIBLE_IOCTL(SBPROF_ZBWAITFULL)
#endif /* CONFIG_SIBYTE_TBPROF */
+/*HANDLE_IOCTL(RTC_IRQP_READ, w_long)
+COMPATIBLE_IOCTL(RTC_IRQP_SET)
+HANDLE_IOCTL(RTC_EPOCH_READ, w_long)
+COMPATIBLE_IOCTL(RTC_EPOCH_SET)
+*/
+
IOCTL_TABLE_END
int ioctl_table_size = ARRAY_SIZE(ioctl_start);
return 0xffffffff;
}
- elf_phdata = (struct elf_phdr *)
- kmalloc(sizeof(struct elf_phdr) * interp_elf_ex->e_phnum,
- GFP_KERNEL);
+ elf_phdata = kmalloc(sizeof(struct elf_phdr) * interp_elf_ex->e_phnum,
+ GFP_KERNEL);
if(!elf_phdata) {
printk("Cannot kmalloc phdata for IRIX interp.\n");
if (*name != NULL)
goto out;
- *name = (char *) kmalloc((epp->p_filesz +
- strlen(IRIX_INTERP_PREFIX)),
- GFP_KERNEL);
+ *name = kmalloc((epp->p_filesz + strlen(IRIX_INTERP_PREFIX)),
+ GFP_KERNEL);
if (!*name)
return -ENOMEM;
size = elf_ex.e_phentsize * elf_ex.e_phnum;
if (size > 65536)
goto out;
- elf_phdata = (struct elf_phdr *) kmalloc(size, GFP_KERNEL);
+ elf_phdata = kmalloc(size, GFP_KERNEL);
if (elf_phdata == NULL) {
retval = -ENOMEM;
goto out;
if(sizeof(struct elf_phdr) * elf_ex.e_phnum > PAGE_SIZE)
return -ENOEXEC;
- elf_phdata = (struct elf_phdr *)
- kmalloc(sizeof(struct elf_phdr) * elf_ex.e_phnum, GFP_KERNEL);
+ elf_phdata = kmalloc(sizeof(struct elf_phdr) * elf_ex.e_phnum, GFP_KERNEL);
if (elf_phdata == NULL)
return -ENOMEM;
psinfo.pr_ppid = prstatus.pr_ppid = current->parent->pid;
psinfo.pr_pgrp = prstatus.pr_pgrp = process_group(current);
psinfo.pr_sid = prstatus.pr_sid = current->signal->session;
- prstatus.pr_utime.tv_sec = CT_TO_SECS(current->utime);
- prstatus.pr_utime.tv_usec = CT_TO_USECS(current->utime);
- prstatus.pr_stime.tv_sec = CT_TO_SECS(current->stime);
- prstatus.pr_stime.tv_usec = CT_TO_USECS(current->stime);
- prstatus.pr_cutime.tv_sec = CT_TO_SECS(current->cutime);
- prstatus.pr_cutime.tv_usec = CT_TO_USECS(current->cutime);
- prstatus.pr_cstime.tv_sec = CT_TO_SECS(current->cstime);
- prstatus.pr_cstime.tv_usec = CT_TO_USECS(current->cstime);
+ if (current->pid == current->tgid) {
+ /*
+ * This is the record for the group leader. Add in the
+ * cumulative times of previous dead threads. This total
+ * won't include the time of each live thread whose state
+ * is included in the core dump. The final total reported
+ * to our parent process when it calls wait4 will include
+ * those sums as well as the little bit more time it takes
+ * this and each other thread to finish dying after the
+ * core dump synchronization phase.
+ */
+ jiffies_to_timeval(current->utime + current->signal->utime,
+ &prstatus.pr_utime);
+ jiffies_to_timeval(current->stime + current->signal->stime,
+ &prstatus.pr_stime);
+ } else {
+ jiffies_to_timeval(current->utime, &prstatus.pr_utime);
+ jiffies_to_timeval(current->stime, &prstatus.pr_stime);
+ }
+ jiffies_to_timeval(current->signal->cutime, &prstatus.pr_cutime);
+ jiffies_to_timeval(current->signal->cstime, &prstatus.pr_cstime);
+
if (sizeof(elf_gregset_t) != sizeof(struct pt_regs)) {
printk("sizeof(elf_gregset_t) (%d) != sizeof(struct pt_regs) "
"(%d)\n", sizeof(elf_gregset_t), sizeof(struct pt_regs));
}
static inline void handle_signal(unsigned long sig, siginfo_t *info,
- sigset_t *oldset, struct pt_regs * regs)
+ struct k_sigaction *ka, sigset_t *oldset, struct pt_regs * regs)
{
- struct k_sigaction *ka = ¤t->sighand->action[sig-1];
-
switch(regs->regs[0]) {
case ERESTARTNOHAND:
regs->regs[2] = EINTR;
else
setup_irix_frame(ka, regs, sig, oldset);
- if (ka->sa.sa_flags & SA_ONESHOT)
- ka->sa.sa_handler = SIG_DFL;
if (!(ka->sa.sa_flags & SA_NODEFER)) {
spin_lock_irq(¤t->sighand->siglock);
sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
asmlinkage int do_irix_signal(sigset_t *oldset, struct pt_regs *regs)
{
+ struct k_sigaction ka;
siginfo_t info;
int signr;
if (!oldset)
oldset = ¤t->blocked;
- signr = get_signal_to_deliver(&info, regs, NULL);
+ signr = get_signal_to_deliver(&info, &ka, regs, NULL);
if (signr > 0) {
- handle_signal(signr, &info, oldset, regs);
+ handle_signal(signr, &info, &ka, oldset, regs);
return 1;
}
}
/* This is here because of irix5_siginfo definition. */
-#define P_PID 0
-#define P_PGID 2
-#define P_ALL 7
+#define IRIX_P_PID 0
+#define IRIX_P_PGID 2
+#define IRIX_P_ALL 7
extern int getrusage(struct task_struct *, int, struct rusage __user *);
retval = -EINVAL;
goto out;
}
- if (type != P_PID && type != P_PGID && type != P_ALL) {
+ if (type != IRIX_P_PID && type != IRIX_P_PGID && type != IRIX_P_ALL) {
retval = -EINVAL;
goto out;
}
tsk = current;
list_for_each(_p,&tsk->children) {
p = list_entry(_p,struct task_struct,sibling);
- if ((type == P_PID) && p->pid != pid)
+ if ((type == IRIX_P_PID) && p->pid != pid)
continue;
- if ((type == P_PGID) && process_group(p) != pid)
+ if ((type == IRIX_P_PGID) && process_group(p) != pid)
continue;
if ((p->exit_signal != SIGCHLD))
continue;
goto end_waitsys;
case TASK_ZOMBIE:
- current->cutime += p->utime + p->cutime;
- current->cstime += p->stime + p->cstime;
+ current->signal->cutime += p->utime + p->signal->cutime;
+ current->signal->cstime += p->stime + p->signal->cstime;
if (ru != NULL)
getrusage(p, RUSAGE_BOTH, ru);
__put_user(SIGCHLD, &info->sig);
--- /dev/null
+/*
+ * Copyright (c) 2004 MIPS Inc
+ * Author: chris@mips.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <asm/ptrace.h>
+#include <linux/sched.h>
+#include <linux/kernel_stat.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/msc01_ic.h>
+
+static unsigned long _icctrl_msc;
+#define MSC01_IC_REG_BASE _icctrl_msc
+
+#define MSCIC_WRITE(reg, data) do { *(volatile u32 *)(reg) = data; } while (0)
+#define MSCIC_READ(reg, data) do { data = *(volatile u32 *)(reg); } while (0)
+
+static unsigned int irq_base;
+
+/* mask off an interrupt */
+static inline void mask_msc_irq(unsigned int irq)
+{
+ if (irq < (irq_base + 32))
+ MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base));
+ else
+ MSCIC_WRITE(MSC01_IC_DISH, 1<<(irq - irq_base - 32));
+}
+
+/* unmask an interrupt */
+static inline void unmask_msc_irq(unsigned int irq)
+{
+ if (irq < (irq_base + 32))
+ MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base));
+ else
+ MSCIC_WRITE(MSC01_IC_ENAH, 1<<(irq - irq_base - 32));
+}
+
+/*
+ * Enables the IRQ on SOC-it
+ */
+static void enable_msc_irq(unsigned int irq)
+{
+ unmask_msc_irq(irq);
+}
+
+/*
+ * Initialize the IRQ on SOC-it
+ */
+static unsigned int startup_msc_irq(unsigned int irq)
+{
+ unmask_msc_irq(irq);
+ return 0;
+}
+
+/*
+ * Disables the IRQ on SOC-it
+ */
+static void disable_msc_irq(unsigned int irq)
+{
+ mask_msc_irq(irq);
+}
+
+/*
+ * Masks and ACKs an IRQ
+ */
+static void level_mask_and_ack_msc_irq(unsigned int irq)
+{
+ mask_msc_irq(irq);
+ if (!cpu_has_ei)
+ MSCIC_WRITE(MSC01_IC_EOI, 0);
+}
+
+/*
+ * Masks and ACKs an IRQ
+ */
+static void edge_mask_and_ack_msc_irq(unsigned int irq)
+{
+ mask_msc_irq(irq);
+ if (!cpu_has_ei)
+ MSCIC_WRITE(MSC01_IC_EOI, 0);
+ else {
+ u32 r;
+ MSCIC_READ(MSC01_IC_SUP+irq*8, r);
+ MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT);
+ MSCIC_WRITE(MSC01_IC_SUP+irq*8, r);
+ }
+}
+
+/*
+ * End IRQ processing
+ */
+static void end_msc_irq(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+ unmask_msc_irq(irq);
+}
+
+/*
+ * Interrupt handler for interrupts coming from SOC-it.
+ */
+void ll_msc_irq(struct pt_regs *regs)
+{
+ unsigned int irq;
+
+ /* read the interrupt vector register */
+ MSCIC_READ(MSC01_IC_VEC, irq);
+ if (irq < 64)
+ do_IRQ(irq + irq_base, regs);
+ else {
+ /* Ignore spurious interrupt */
+ }
+}
+
+void
+msc_bind_eic_interrupt (unsigned int irq, unsigned int set)
+{
+ MSCIC_WRITE(MSC01_IC_RAMW,
+ (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF));
+}
+
+#define shutdown_msc_irq disable_msc_irq
+
+struct hw_interrupt_type msc_levelirq_type = {
+ "SOC-it-Level",
+ startup_msc_irq,
+ shutdown_msc_irq,
+ enable_msc_irq,
+ disable_msc_irq,
+ level_mask_and_ack_msc_irq,
+ end_msc_irq,
+ NULL
+};
+
+struct hw_interrupt_type msc_edgeirq_type = {
+ "SOC-it-Edge",
+ startup_msc_irq,
+ shutdown_msc_irq,
+ enable_msc_irq,
+ disable_msc_irq,
+ edge_mask_and_ack_msc_irq,
+ end_msc_irq,
+ NULL
+};
+
+
+void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq)
+{
+ extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset);
+
+ _icctrl_msc = (unsigned long) ioremap (MIPS_MSC01_IC_REG_BASE, 0x40000);
+
+ /* Reset interrupt controller - initialises all registers to 0 */
+ MSCIC_WRITE(MSC01_IC_RST, MSC01_IC_RST_RST_BIT);
+
+ board_bind_eic_interrupt = &msc_bind_eic_interrupt;
+
+ for (; nirq >= 0; nirq--, imp++) {
+ int n = imp->im_irq;
+
+ switch (imp->im_type) {
+ case MSC01_IRQ_EDGE:
+ irq_desc[base+n].handler = &msc_edgeirq_type;
+ if (cpu_has_ei)
+ MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
+ else
+ MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
+ break;
+ case MSC01_IRQ_LEVEL:
+ irq_desc[base+n].handler = &msc_levelirq_type;
+ if (cpu_has_ei)
+ MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
+ else
+ MSCIC_WRITE(MSC01_IC_SUP+n*8, imp->im_lvl);
+ }
+ }
+
+ irq_base = base;
+
+ MSCIC_WRITE(MSC01_IC_GENA, MSC01_IC_GENA_GENA_BIT); /* Enable interrupt generation */
+
+}
#include <linux/kernel_stat.h>
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/mv64340.h>
+#include <linux/mv643xx.h>
static unsigned int irq_base;
#include <asm/uaccess.h>
/*
- * Controller mappings for all interrupt sources:
+ * 'what should we do if we get a hw irq event on an illegal vector'.
+ * each architecture has to answer this themselves.
*/
-irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned = {
- [0 ... NR_IRQS-1] = {
- .handler = &no_irq_type,
- .lock = SPIN_LOCK_UNLOCKED
- }
-};
-
-static void register_irq_proc (unsigned int irq);
+void ack_bad_irq(unsigned int irq)
+{
+ printk("unexpected IRQ # %d\n", irq);
+}
-/*
- * Special irq handlers.
- */
+atomic_t irq_err_count;
-irqreturn_t no_action(int cpl, void *dev_id, struct pt_regs *regs)
-{ return IRQ_NONE; }
+#undef do_IRQ
/*
- * Generic no controller code
+ * do_IRQ handles all normal device IRQ's (the special
+ * SMP cross-CPU interrupts have their own specific
+ * handlers).
*/
-
-static void enable_none(unsigned int irq) { }
-static unsigned int startup_none(unsigned int irq) { return 0; }
-static void disable_none(unsigned int irq) { }
-static void ack_none(unsigned int irq)
+asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs)
{
- /*
- * 'what should we do if we get a hw irq event on an illegal vector'.
- * each architecture has to answer this themselves, it doesn't deserve
- * a generic callback i think.
- */
- printk("unexpected interrupt %d\n", irq);
-}
+ irq_enter();
-/* startup is the same as "enable", shutdown is same as "disable" */
-#define shutdown_none disable_none
-#define end_none enable_none
+ __do_IRQ(irq, regs);
-struct hw_interrupt_type no_irq_type = {
- "none",
- startup_none,
- shutdown_none,
- enable_none,
- disable_none,
- ack_none,
- end_none
-};
+ irq_exit();
-atomic_t irq_err_count;
+ return 1;
+}
/*
* Generic, controller-independent functions:
return 0;
}
-#ifdef CONFIG_SMP
-inline void synchronize_irq(unsigned int irq)
-{
- while (irq_desc[irq].status & IRQ_INPROGRESS)
- cpu_relax();
-}
-#endif
-
-/*
- * This should really return information about whether
- * we should do bottom half handling etc. Right now we
- * end up _always_ checking the bottom half, which is a
- * waste of time and is not what some drivers would
- * prefer.
- */
-int handle_IRQ_event(unsigned int irq, struct pt_regs * regs, struct irqaction * action)
-{
- int status = 1; /* Force the "do bottom halves" bit */
- int ret, retval = 0;
-
- if (!(action->flags & SA_INTERRUPT))
- local_irq_enable();
-
- do {
- ret = action->handler(irq, action->dev_id, regs);
- if (ret == IRQ_HANDLED)
- status |= action->flags;
- retval |= ret;
- action = action->next;
- } while (action);
- if (status & SA_SAMPLE_RANDOM)
- add_interrupt_randomness(irq);
- local_irq_disable();
-
- return retval;
-}
-
-static void __report_bad_irq(int irq, irq_desc_t *desc, irqreturn_t action_ret)
-{
- struct irqaction *action;
-
- if (action_ret != IRQ_HANDLED && action_ret != IRQ_NONE) {
- printk(KERN_ERR "irq event %d: bogus return value %x\n",
- irq, action_ret);
- } else {
- printk(KERN_ERR "irq %d: nobody cared!\n", irq);
- }
- dump_stack();
- printk(KERN_ERR "handlers:\n");
- action = desc->action;
- do {
- printk(KERN_ERR "[<%p>]", action->handler);
- print_symbol(" (%s)",
- (unsigned long)action->handler);
- printk("\n");
- action = action->next;
- } while (action);
-}
-
-static void report_bad_irq(int irq, irq_desc_t *desc, irqreturn_t action_ret)
-{
- static int count = 100;
-
- if (count) {
- count--;
- __report_bad_irq(irq, desc, action_ret);
- }
-}
-
-static int noirqdebug;
-
-static int __init noirqdebug_setup(char *str)
-{
- noirqdebug = 1;
- printk("IRQ lockup detection disabled\n");
- return 1;
-}
-
-__setup("noirqdebug", noirqdebug_setup);
-
-/*
- * If 99,900 of the previous 100,000 interrupts have not been handled then
- * assume that the IRQ is stuck in some manner. Drop a diagnostic and try to
- * turn the IRQ off.
- *
- * (The other 100-of-100,000 interrupts may have been a correctly-functioning
- * device sharing an IRQ with the failing one)
- *
- * Called under desc->lock
- */
-static void note_interrupt(int irq, irq_desc_t *desc, irqreturn_t action_ret)
-{
- if (action_ret != IRQ_HANDLED) {
- desc->irqs_unhandled++;
- if (action_ret != IRQ_NONE)
- report_bad_irq(irq, desc, action_ret);
- }
-
- desc->irq_count++;
- if (desc->irq_count < 100000)
- return;
-
- desc->irq_count = 0;
- if (desc->irqs_unhandled > 99900) {
- /*
- * The interrupt is stuck
- */
- __report_bad_irq(irq, desc, action_ret);
- /*
- * Now kill the IRQ
- */
- printk(KERN_EMERG "Disabling IRQ #%d\n", irq);
- desc->status |= IRQ_DISABLED;
- desc->handler->disable(irq);
- }
- desc->irqs_unhandled = 0;
-}
-
-/*
- * Generic enable/disable code: this just calls
- * down into the PIC-specific version for the actual
- * hardware disable after having gotten the irq
- * controller lock.
- */
-
-/**
- * disable_irq_nosync - disable an irq without waiting
- * @irq: Interrupt to disable
- *
- * Disable the selected interrupt line. Disables of an interrupt
- * stack. Unlike disable_irq(), this function does not ensure existing
- * instances of the IRQ handler have completed before returning.
- *
- * This function may be called from IRQ context.
- */
-
-void inline disable_irq_nosync(unsigned int irq)
-{
- irq_desc_t *desc = irq_desc + irq;
- unsigned long flags;
-
- spin_lock_irqsave(&desc->lock, flags);
- if (!desc->depth++) {
- desc->status |= IRQ_DISABLED;
- desc->handler->disable(irq);
- }
- spin_unlock_irqrestore(&desc->lock, flags);
-}
-
-/**
- * disable_irq - disable an irq and wait for completion
- * @irq: Interrupt to disable
- *
- * Disable the selected interrupt line. Disables of an interrupt
- * stack. That is for two disables you need two enables. This
- * function waits for any pending IRQ handlers for this interrupt
- * to complete before returning. If you use this function while
- * holding a resource the IRQ handler may need you will deadlock.
- *
- * This function may be called - with care - from IRQ context.
- */
+#ifdef CONFIG_KGDB
+extern void breakpoint(void);
+extern void set_debug_traps(void);
-void disable_irq(unsigned int irq)
+static int kgdb_flag = 1;
+static int __init nokgdb(char *str)
{
- irq_desc_t *desc = irq_desc + irq;
- disable_irq_nosync(irq);
- if (desc->action)
- synchronize_irq(irq);
-}
-
-/**
- * enable_irq - enable interrupt handling on an irq
- * @irq: Interrupt to enable
- *
- * Re-enables the processing of interrupts on this IRQ line
- * providing no disable_irq calls are now in effect.
- *
- * This function may be called from IRQ context.
- */
-
-void enable_irq(unsigned int irq)
-{
- irq_desc_t *desc = irq_desc + irq;
- unsigned long flags;
-
- spin_lock_irqsave(&desc->lock, flags);
- switch (desc->depth) {
- case 1: {
- unsigned int status = desc->status & ~(IRQ_DISABLED | IRQ_INPROGRESS);
- desc->status = status;
- if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) {
- desc->status = status | IRQ_REPLAY;
- hw_resend_irq(desc->handler,irq);
- }
- desc->handler->enable(irq);
- /* fall-through */
- }
- default:
- desc->depth--;
- break;
- case 0:
- printk("enable_irq(%u) unbalanced from %p\n", irq,
- __builtin_return_address(0));
- }
- spin_unlock_irqrestore(&desc->lock, flags);
-}
-
-/*
- * do_IRQ handles all normal device IRQ's (the special
- * SMP cross-CPU interrupts have their own specific
- * handlers).
- */
-asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs)
-{
- /*
- * We ack quickly, we don't want the irq controller
- * thinking we're snobs just because some other CPU has
- * disabled global interrupts (we have already done the
- * INT_ACK cycles, it's too late to try to pretend to the
- * controller that we aren't taking the interrupt).
- *
- * 0 return value means that this irq is already being
- * handled by some other CPU. (or is disabled)
- */
- irq_desc_t *desc = irq_desc + irq;
- struct irqaction * action;
- unsigned int status;
-
- irq_enter();
- kstat_this_cpu.irqs[irq]++;
- spin_lock(&desc->lock);
- desc->handler->ack(irq);
- /*
- REPLAY is when Linux resends an IRQ that was dropped earlier
- WAITING is used by probe to mark irqs that are being tested
- */
- status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING);
- status |= IRQ_PENDING; /* we _want_ to handle it */
-
- /*
- * If the IRQ is disabled for whatever reason, we cannot
- * use the action we have.
- */
- action = NULL;
- if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) {
- action = desc->action;
- status &= ~IRQ_PENDING; /* we commit to handling */
- status |= IRQ_INPROGRESS; /* we are handling it */
- }
- desc->status = status;
-
- /*
- * If there is no IRQ handler or it was disabled, exit early.
- Since we set PENDING, if another processor is handling
- a different instance of this same irq, the other processor
- will take care of it.
- */
- if (unlikely(!action))
- goto out;
-
- /*
- * Edge triggered interrupts need to remember
- * pending events.
- * This applies to any hw interrupts that allow a second
- * instance of the same irq to arrive while we are in do_IRQ
- * or in the handler. But the code here only handles the _second_
- * instance of the irq, not the third or fourth. So it is mostly
- * useful for irq hardware that does not mask cleanly in an
- * SMP environment.
- */
- for (;;) {
- irqreturn_t action_ret;
-
- spin_unlock(&desc->lock);
- action_ret = handle_IRQ_event(irq, regs, action);
- spin_lock(&desc->lock);
- if (!noirqdebug)
- note_interrupt(irq, desc, action_ret);
- if (likely(!(desc->status & IRQ_PENDING)))
- break;
- desc->status &= ~IRQ_PENDING;
- }
- desc->status &= ~IRQ_INPROGRESS;
-
-out:
- /*
- * The ->end() handler has to deal with interrupts which got
- * disabled while the handler was running.
- */
- desc->handler->end(irq);
- spin_unlock(&desc->lock);
-
- irq_exit();
-
+ kgdb_flag = 0;
return 1;
}
-
-/**
- * request_irq - allocate an interrupt line
- * @irq: Interrupt line to allocate
- * @handler: Function to be called when the IRQ occurs
- * @irqflags: Interrupt type flags
- * @devname: An ascii name for the claiming device
- * @dev_id: A cookie passed back to the handler function
- *
- * This call allocates interrupt resources and enables the
- * interrupt line and IRQ handling. From the point this
- * call is made your handler function may be invoked. Since
- * your handler function must clear any interrupt the board
- * raises, you must take care both to initialise your hardware
- * and to set up the interrupt handler in the right order.
- *
- * Dev_id must be globally unique. Normally the address of the
- * device data structure is used as the cookie. Since the handler
- * receives this value it makes sense to use it.
- *
- * If your interrupt is shared you must pass a non NULL dev_id
- * as this is required when freeing the interrupt.
- *
- * Flags:
- *
- * SA_SHIRQ Interrupt is shared
- *
- * SA_INTERRUPT Disable local interrupts while processing
- *
- * SA_SAMPLE_RANDOM The interrupt can be used for entropy
- *
- */
-
-int request_irq(unsigned int irq,
- irqreturn_t (*handler)(int, void *, struct pt_regs *),
- unsigned long irqflags,
- const char * devname,
- void *dev_id)
-{
- int retval;
- struct irqaction * action;
-
-#if 1
- /*
- * Sanity-check: shared interrupts should REALLY pass in
- * a real dev-ID, otherwise we'll have trouble later trying
- * to figure out which interrupt is which (messes up the
- * interrupt freeing logic etc).
- */
- if (irqflags & SA_SHIRQ) {
- if (!dev_id)
- printk("Bad boy: %s (at 0x%x) called us without a dev_id!\n", devname, (&irq)[-1]);
- }
+__setup("nokgdb", nokgdb);
#endif
- if (irq >= NR_IRQS)
- return -EINVAL;
- if (!handler)
- return -EINVAL;
-
- action = (struct irqaction *)
- kmalloc(sizeof(struct irqaction), GFP_ATOMIC);
- if (!action)
- return -ENOMEM;
-
- action->handler = handler;
- action->flags = irqflags;
- cpus_clear(action->mask);
- action->name = devname;
- action->next = NULL;
- action->dev_id = dev_id;
-
- retval = setup_irq(irq, action);
- if (retval)
- kfree(action);
- return retval;
-}
-
-EXPORT_SYMBOL(request_irq);
-
-/**
- * free_irq - free an interrupt
- * @irq: Interrupt line to free
- * @dev_id: Device identity to free
- *
- * Remove an interrupt handler. The handler is removed and if the
- * interrupt line is no longer in use by any driver it is disabled.
- * On a shared IRQ the caller must ensure the interrupt is disabled
- * on the card it drives before calling this function. The function
- * does not return until any executing interrupts for this IRQ
- * have completed.
- *
- * This function must not be called from interrupt context.
- */
-
-void free_irq(unsigned int irq, void *dev_id)
-{
- irq_desc_t *desc;
- struct irqaction **p;
- unsigned long flags;
-
- if (irq >= NR_IRQS)
- return;
-
- desc = irq_desc + irq;
- spin_lock_irqsave(&desc->lock,flags);
- p = &desc->action;
- for (;;) {
- struct irqaction * action = *p;
- if (action) {
- struct irqaction **pp = p;
- p = &action->next;
- if (action->dev_id != dev_id)
- continue;
-
- /* Found it - now remove it from the list of entries */
- *pp = action->next;
- if (!desc->action) {
- desc->status |= IRQ_DISABLED;
- desc->handler->shutdown(irq);
- }
- spin_unlock_irqrestore(&desc->lock,flags);
-
- /* Wait to make sure it's not being used on another CPU */
- synchronize_irq(irq);
- kfree(action);
- return;
- }
- printk("Trying to free free IRQ%d\n",irq);
- spin_unlock_irqrestore(&desc->lock,flags);
- return;
- }
-}
-
-EXPORT_SYMBOL(free_irq);
-
-/*
- * IRQ autodetection code..
- *
- * This depends on the fact that any interrupt that
- * comes in on to an unassigned handler will get stuck
- * with "IRQ_WAITING" cleared and the interrupt
- * disabled.
- */
-
-static DECLARE_MUTEX(probe_sem);
-
-/**
- * probe_irq_on - begin an interrupt autodetect
- *
- * Commence probing for an interrupt. The interrupts are scanned
- * and a mask of potential interrupt lines is returned.
- *
- */
-
-unsigned long probe_irq_on(void)
-{
- unsigned int i;
- irq_desc_t *desc;
- unsigned long val;
- unsigned long delay;
-
- down(&probe_sem);
- /*
- * something may have generated an irq long ago and we want to
- * flush such a longstanding irq before considering it as spurious.
- */
- for (i = NR_IRQS-1; i > 0; i--) {
- desc = irq_desc + i;
-
- spin_lock_irq(&desc->lock);
- if (!irq_desc[i].action)
- irq_desc[i].handler->startup(i);
- spin_unlock_irq(&desc->lock);
- }
-
- /* Wait for longstanding interrupts to trigger. */
- for (delay = jiffies + HZ/50; time_after(delay, jiffies); )
- /* about 20ms delay */ barrier();
-
- /*
- * enable any unassigned irqs
- * (we must startup again here because if a longstanding irq
- * happened in the previous stage, it may have masked itself)
- */
- for (i = NR_IRQS-1; i > 0; i--) {
- desc = irq_desc + i;
-
- spin_lock_irq(&desc->lock);
- if (!desc->action) {
- desc->status |= IRQ_AUTODETECT | IRQ_WAITING;
- if (desc->handler->startup(i))
- desc->status |= IRQ_PENDING;
- }
- spin_unlock_irq(&desc->lock);
- }
-
- /*
- * Wait for spurious interrupts to trigger
- */
- for (delay = jiffies + HZ/10; time_after(delay, jiffies); )
- /* about 100ms delay */ barrier();
-
- /*
- * Now filter out any obviously spurious interrupts
- */
- val = 0;
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc_t *desc = irq_desc + i;
- unsigned int status;
-
- spin_lock_irq(&desc->lock);
- status = desc->status;
-
- if (status & IRQ_AUTODETECT) {
- /* It triggered already - consider it spurious. */
- if (!(status & IRQ_WAITING)) {
- desc->status = status & ~IRQ_AUTODETECT;
- desc->handler->shutdown(i);
- } else
- if (i < 32)
- val |= 1 << i;
- }
- spin_unlock_irq(&desc->lock);
- }
-
- return val;
-}
-
-EXPORT_SYMBOL(probe_irq_on);
-
-/*
- * Return a mask of triggered interrupts (this
- * can handle only legacy ISA interrupts).
- */
-
-/**
- * probe_irq_mask - scan a bitmap of interrupt lines
- * @val: mask of interrupts to consider
- *
- * Scan the ISA bus interrupt lines and return a bitmap of
- * active interrupts. The interrupt probe logic state is then
- * returned to its previous value.
- *
- * Note: we need to scan all the irq's even though we will
- * only return ISA irq numbers - just so that we reset them
- * all to a known state.
- */
-unsigned int probe_irq_mask(unsigned long val)
-{
- int i;
- unsigned int mask;
-
- mask = 0;
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc_t *desc = irq_desc + i;
- unsigned int status;
-
- spin_lock_irq(&desc->lock);
- status = desc->status;
-
- if (status & IRQ_AUTODETECT) {
- if (i < 16 && !(status & IRQ_WAITING))
- mask |= 1 << i;
-
- desc->status = status & ~IRQ_AUTODETECT;
- desc->handler->shutdown(i);
- }
- spin_unlock_irq(&desc->lock);
- }
- up(&probe_sem);
-
- return mask & val;
-}
-
-/*
- * Return the one interrupt that triggered (this can
- * handle any interrupt source).
- */
-
-/**
- * probe_irq_off - end an interrupt autodetect
- * @val: mask of potential interrupts (unused)
- *
- * Scans the unused interrupt lines and returns the line which
- * appears to have triggered the interrupt. If no interrupt was
- * found then zero is returned. If more than one interrupt is
- * found then minus the first candidate is returned to indicate
- * there is doubt.
- *
- * The interrupt probe logic state is returned to its previous
- * value.
- *
- * BUGS: When used in a module (which arguably shouldnt happen)
- * nothing prevents two IRQ probe callers from overlapping. The
- * results of this are non-optimal.
- */
-
-int probe_irq_off(unsigned long val)
-{
- int i, irq_found, nr_irqs;
-
- nr_irqs = 0;
- irq_found = 0;
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc_t *desc = irq_desc + i;
- unsigned int status;
-
- spin_lock_irq(&desc->lock);
- status = desc->status;
-
- if (status & IRQ_AUTODETECT) {
- if (!(status & IRQ_WAITING)) {
- if (!nr_irqs)
- irq_found = i;
- nr_irqs++;
- }
- desc->status = status & ~IRQ_AUTODETECT;
- desc->handler->shutdown(i);
- }
- spin_unlock_irq(&desc->lock);
- }
- up(&probe_sem);
-
- if (nr_irqs > 1)
- irq_found = -irq_found;
- return irq_found;
-}
-
-EXPORT_SYMBOL(probe_irq_off);
-
-/* this was setup_x86_irq but it seems pretty generic */
-int setup_irq(unsigned int irq, struct irqaction * new)
-{
- int shared = 0;
- unsigned long flags;
- struct irqaction *old, **p;
- irq_desc_t *desc = irq_desc + irq;
-
- /*
- * Some drivers like serial.c use request_irq() heavily,
- * so we have to be careful not to interfere with a
- * running system.
- */
- if (new->flags & SA_SAMPLE_RANDOM) {
- /*
- * This function might sleep, we want to call it first,
- * outside of the atomic block.
- * Yes, this might clear the entropy pool if the wrong
- * driver is attempted to be loaded, without actually
- * installing a new handler, but is this really a problem,
- * only the sysadmin is able to do this.
- */
- rand_initialize_irq(irq);
- }
-
- /*
- * The following block of code has to be executed atomically
- */
- spin_lock_irqsave(&desc->lock,flags);
- p = &desc->action;
- if ((old = *p) != NULL) {
- /* Can't share interrupts unless both agree to */
- if (!(old->flags & new->flags & SA_SHIRQ)) {
- spin_unlock_irqrestore(&desc->lock,flags);
- return -EBUSY;
- }
-
- /* add new interrupt at end of irq queue */
- do {
- p = &old->next;
- old = *p;
- } while (old);
- shared = 1;
- }
-
- *p = new;
-
- if (!shared) {
- desc->depth = 0;
- desc->status &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS);
- desc->handler->startup(irq);
- }
- spin_unlock_irqrestore(&desc->lock,flags);
-
- register_irq_proc(irq);
- return 0;
-}
-
-void __init init_generic_irq(void)
+void __init init_IRQ(void)
{
int i;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
irq_desc[i].handler = &no_irq_type;
+ irq_desc[i].lock = SPIN_LOCK_UNLOCKED;
}
-}
-
-EXPORT_SYMBOL(disable_irq_nosync);
-EXPORT_SYMBOL(disable_irq);
-EXPORT_SYMBOL(enable_irq);
-EXPORT_SYMBOL(probe_irq_mask);
-static struct proc_dir_entry * root_irq_dir;
-static struct proc_dir_entry * irq_dir [NR_IRQS];
+ arch_init_irq();
-#ifdef CONFIG_SMP
-
-static struct proc_dir_entry * smp_affinity_entry [NR_IRQS];
-
-static cpumask_t irq_affinity [NR_IRQS] = { [0 ... NR_IRQS-1] = ~0UL };
-static int irq_affinity_read_proc (char *page, char **start, off_t off,
- int count, int *eof, void *data)
-{
- int len = cpumask_scnprintf(page, count, irq_affinity[(long)data]);
- if (count - len < 2)
- return -EINVAL;
- len += sprintf(page + len, "\n");
- return len;
-}
-
-static int irq_affinity_write_proc (struct file *file, const char *buffer,
- unsigned long count, void *data)
-{
- int irq = (long) data, full_count = count, err;
- cpumask_t new_value, tmp;
-
- if (!irq_desc[irq].handler->set_affinity)
- return -EIO;
-
- err = cpumask_parse(buffer, count, new_value);
-
- /*
- * Do not allow disabling IRQs completely - it's a too easy
- * way to make the system unusable accidentally :-) At least
- * one online CPU still has to be targeted.
- */
- cpus_and(tmp, new_value, cpu_online_map);
- if (cpus_empty(tmp))
- return -EINVAL;
-
- irq_affinity[irq] = new_value;
- irq_desc[irq].handler->set_affinity(irq, new_value);
-
- return full_count;
-}
-
-#endif
-
-#define MAX_NAMELEN 10
-
-static void register_irq_proc (unsigned int irq)
-{
- char name [MAX_NAMELEN];
-
- if (!root_irq_dir || (irq_desc[irq].handler == &no_irq_type) ||
- irq_dir[irq])
- return;
-
- memset(name, 0, MAX_NAMELEN);
- sprintf(name, "%d", irq);
-
- /* create /proc/irq/1234 */
- irq_dir[irq] = proc_mkdir(name, root_irq_dir);
-
-#ifdef CONFIG_SMP
- {
- struct proc_dir_entry *entry;
-
- /* create /proc/irq/1234/smp_affinity */
- entry = create_proc_entry("smp_affinity", 0600, irq_dir[irq]);
-
- if (entry) {
- entry->nlink = 1;
- entry->data = (void *)(long)irq;
- entry->read_proc = irq_affinity_read_proc;
- entry->write_proc = irq_affinity_write_proc;
- }
-
- smp_affinity_entry[irq] = entry;
+#ifdef CONFIG_KGDB
+ if (kgdb_flag) {
+ printk("Wait for gdb client connection ...\n");
+ set_debug_traps();
+ breakpoint();
}
#endif
}
-
-void init_irq_proc (void)
-{
- int i;
-
- /* create /proc/irq */
- root_irq_dir = proc_mkdir("irq", 0);
-
- /* create /proc/irq/prof_cpu_mask */
- create_prof_cpu_mask(root_irq_dir);
-
- /*
- * Create entries for all existing IRQs.
- */
- for (i = 0; i < NR_IRQS; i++)
- register_irq_proc(i);
-}
*
* Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2004 Thiemo Seufer
*/
#include <linux/config.h>
#include <linux/errno.h>
childksp = (unsigned long)ti + THREAD_SIZE - 32;
+ preempt_disable();
+
if (is_fpu_owner()) {
save_fp(p);
}
+ preempt_enable();
+
/* set up new TSS. */
childregs = (struct pt_regs *) childksp - 1;
*childregs = *regs;
/*
* Create a kernel thread
*/
+ATTRIB_NORET void kernel_thread_helper(void *arg, int (*fn)(void *))
+{
+ do_exit(fn(arg));
+}
+
long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
{
- long retval;
-
- __asm__ __volatile__(
- " move $6, $sp \n"
- " move $4, %5 \n"
- " li $2, %1 \n"
- " syscall \n"
- " beq $6, $sp, 1f \n"
-#ifdef CONFIG_MIPS32 /* On o32 the caller has to create the stackframe */
- " subu $sp, 32 \n"
-#endif
- " move $4, %3 \n"
- " jalr %4 \n"
- " move $4, $2 \n"
- " li $2, %2 \n"
- " syscall \n"
-#ifdef CONFIG_MIPS32 /* On o32 the caller has to deallocate the stackframe */
- " addiu $sp, 32 \n"
+ struct pt_regs regs;
+
+ memset(®s, 0, sizeof(regs));
+
+ regs.regs[4] = (unsigned long) arg;
+ regs.regs[5] = (unsigned long) fn;
+ regs.cp0_epc = (unsigned long) kernel_thread_helper;
+ regs.cp0_status = read_c0_status();
+#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
+ regs.cp0_status &= ~(ST0_KUP | ST0_IEC);
+ regs.cp0_status |= ST0_IEP;
+#else
+ regs.cp0_status |= ST0_EXL;
#endif
- "1: move %0, $2"
- : "=r" (retval)
- : "i" (__NR_clone), "i" (__NR_exit), "r" (arg), "r" (fn),
- "r" (flags | CLONE_VM | CLONE_UNTRACED)
- /*
- * The called subroutine might have destroyed any of the
- * at, result, argument or temporary registers ...
- */
- : "$2", "$3", "$4", "$5", "$6", "$7", "$8",
- "$9","$10","$11","$12","$13","$14","$15","$24","$25","$31");
-
- return retval;
+
+ /* Ok, create the new process.. */
+ return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
}
struct mips_frame_info {
and t0, t0, t1
LONG_S t0, ST_OFF(t3)
-#ifdef CONFIG_MIPS32
- fpu_save_double a0 t0 # clobbers t0
-#endif
-#ifdef CONFIG_MIPS64
- sll t2, t0, 5
- bgez t2, 2f
- sdc1 $f0, (THREAD_FPU + 0x00)(a0)
- fpu_save_16odd a0
-2:
- fpu_save_16even a0 t1 # clobbers t1
-#endif
+ fpu_save_double a0 t1 t0 t2 # c0_status passed in t1
+ # clobbers t0 and t2
1:
/*
* Save a thread's fp context.
*/
LEAF(_save_fp)
-#ifdef CONFIG_MIPS32
- fpu_save_double a0 t1 # clobbers t1
-#endif
#ifdef CONFIG_MIPS64
- mfc0 t0, CP0_STATUS
- sll t1, t0, 5
- bgez t1, 1f # 16 register mode?
- fpu_save_16odd a0
-1:
- fpu_save_16even a0 t1 # clobbers t1
- sdc1 $f0, (THREAD_FPU + 0x00)(a0)
+ mfc0 t1, CP0_STATUS
#endif
+ fpu_save_double a0 t1 t0 t2 # clobbers t1
jr ra
END(_save_fp)
* Restore a thread's fp context.
*/
LEAF(_restore_fp)
-#ifdef CONFIG_MIPS32
fpu_restore_double a0, t1 # clobbers t1
-#endif
-#ifdef CONFIG_MIPS64
- mfc0 t0, CP0_STATUS
- sll t1, t0, 5
- bgez t1, 1f # 16 register mode?
-
- fpu_restore_16odd a0
-1: fpu_restore_16even a0, t0 # clobbers t0
- ldc1 $f0, (THREAD_FPU + 0x00)(a0)
-#endif
-
jr ra
END(_restore_fp)
#include <asm/sysmips.h>
#include <asm/thread_info.h>
#include <asm/unistd.h>
+#include <asm/war.h>
#include <asm/offset.h>
/* Highest syscall used of any syscall flavour */
# restarting
1: sw v0, PT_R2(sp) # result
-EXPORT(o32_syscall_exit)
+o32_syscall_exit:
local_irq_disable # make sure need_resched and
# signals dont change between
# sampling and return
syscall_trace_entry:
SAVE_STATIC
- sw t2, PT_R1(sp)
+ move s0, t2
move a0, sp
li a1, 0
jal do_syscall_trace
- lw t2, PT_R1(sp)
lw a0, PT_R4(sp) # Restore argument registers
lw a1, PT_R5(sp)
lw a2, PT_R6(sp)
lw a3, PT_R7(sp)
- jalr t2
+ jalr s0
li t0, -EMAXERRNO - 1 # error?
sltu t0, t0, v0
1: ll v0, (a1)
move a0, a2
2: sc a0, (a1)
+#if R10000_LLSC_WAR
+ beqzl a0, 1b
+#else
beqz a0, 1b
+#endif
.section __ex_table,"a"
PTR 1b, bad_stack
sys sys_clock_nanosleep 4 /* 4265 */
sys sys_tgkill 3
sys sys_utimes 2
- sys sys_ni_syscall 0 /* sys_mbind */
+ sys sys_mbind 4
sys sys_ni_syscall 0 /* sys_get_mempolicy */
sys sys_ni_syscall 0 /* 4270 sys_set_mempolicy */
sys sys_mq_open 4
sys sys_mq_notify 2 /* 4275 */
sys sys_mq_getsetattr 3
sys sys_ni_syscall 0 /* sys_vserver */
+ sys sys_waitid 4
+ sys sys_ni_syscall 0 /* available, was setaltroot */
+ sys sys_add_key 5
+ sys sys_request_key 4
+ sys sys_keyctl 5
.endm
#include <asm/sysmips.h>
#include <asm/thread_info.h>
#include <asm/unistd.h>
+#include <asm/war.h>
#ifndef CONFIG_BINFMT_ELF32
/* Neither O32 nor N32, so define handle_sys here */
.set at
#endif
-FEXPORT(__handle_sys64)
- subu t0, v0, __NR_64_Linux # check syscall number
+ dsubu t0, v0, __NR_64_Linux # check syscall number
sltiu t0, t0, __NR_64_Linux_syscalls + 1
#if !defined(CONFIG_MIPS32_O32) && !defined(CONFIG_MIPS32_N32)
ld t1, PT_EPC(sp) # skip syscall on return
sd t0, PT_R7(sp) # set error flag
beqz t0, 1f
- negu v0 # error
+ dnegu v0 # error
sd v0, PT_R0(sp) # set flag for syscall
# restarting
1: sd v0, PT_R2(sp) # result
-syscall_exit:
+n64_syscall_exit:
local_irq_disable # make sure need_resched and
# signals dont change between
# sampling and return
syscall_trace_entry:
SAVE_STATIC
- sd t2,PT_R1(sp)
+ move s0, t2
move a0, sp
li a1, 0
jal do_syscall_trace
- ld t2,PT_R1(sp)
ld a0, PT_R4(sp) # Restore argument registers
ld a1, PT_R5(sp)
ld a2, PT_R6(sp)
ld a3, PT_R7(sp)
- jalr t2
+ ld a4, PT_R8(sp)
+ ld a5, PT_R9(sp)
+ jalr s0
li t0, -EMAXERRNO - 1 # error?
sltu t0, t0, v0
sd t0, PT_R7(sp) # set error flag
beqz t0, 1f
- negu v0 # error
+ dnegu v0 # error
sd v0, PT_R0(sp) # set flag for syscall restarting
1: sd v0, PT_R2(sp) # result
sd v0, PT_R2(sp)
li t0, 1 # set error flag
sd t0, PT_R7(sp)
- j syscall_exit
+ j n64_syscall_exit
END(handle_sys64)
LEAF(mips_atomic_set)
1: ll v0, (a1)
move a0, a2
2: sc a0, (a1)
+#if R10000_LLSC_WAR
+ beqzl a0, 1b
+#else
beqz a0, 1b
+#endif
.section __ex_table,"a"
PTR 1b, bad_stack
and t0, a2, t0
bnez t0, 1f
- b syscall_exit
+ j n64_syscall_exit
1: SAVE_STATIC
move a0, sp
j _sys_sysmips
END(sys_sysmips)
- LEAF(sys_syscall) /* Quick'n'dirty ... */
- move v0, a0
- move a0, a1
- move a1, a2
- move a2, a3
- move a3, a4
- move a4, a5
- move a5, a6
- j __handle_sys64
- END(sys_syscall)
-
.align 3
sys_call_table:
PTR sys_read /* 5000 */
PTR sys_clock_nanosleep
PTR sys_tgkill /* 5225 */
PTR sys_utimes
- PTR sys_ni_syscall /* sys_mbind */
+ PTR sys_mbind
PTR sys_ni_syscall /* sys_get_mempolicy */
PTR sys_ni_syscall /* sys_set_mempolicy */
PTR sys_mq_open /* 5230 */
PTR sys_mq_notify
PTR sys_mq_getsetattr /* 5235 */
PTR sys_ni_syscall /* sys_vserver */
+ PTR sys_waitid
+ PTR sys_ni_syscall /* available, was setaltroot */
+ PTR sys_add_key
+ PTR sys_request_key /* 5240 */
+ PTR sys_keyctl
.set at
#endif
- subu t0, v0, __NR_N32_Linux # check syscall number
+ dsubu t0, v0, __NR_N32_Linux # check syscall number
sltiu t0, t0, __NR_N32_Linux_syscalls + 1
#ifndef CONFIG_MIPS32_O32
sd t0, PT_R7(sp) # set error flag
beqz t0, 1f
- negu v0 # error
+ dnegu v0 # error
sd v0, PT_R0(sp) # set flag for syscall restarting
1: sd v0, PT_R2(sp) # result
-FEXPORT(n32_syscall_exit)
local_irq_disable # make sure need_resched and
# signals dont change between
# sampling and return
n32_syscall_trace_entry:
SAVE_STATIC
- sd t2,PT_R1(sp)
+ move s0, t2
move a0, sp
li a1, 0
jal do_syscall_trace
- ld t2,PT_R1(sp)
ld a0, PT_R4(sp) # Restore argument registers
ld a1, PT_R5(sp)
ld a2, PT_R6(sp)
ld a3, PT_R7(sp)
- jalr t2
+ ld a4, PT_R8(sp)
+ ld a5, PT_R9(sp)
+ jalr s0
li t0, -EMAXERRNO - 1 # error?
sltu t0, t0, v0
sd t0, PT_R7(sp) # set error flag
beqz t0, 1f
- negu v0 # error
+ dnegu v0 # error
sd v0, PT_R0(sp) # set flag for syscall restarting
1: sd v0, PT_R2(sp) # result
- j n32_syscall_exit
+ j syscall_exit
not_n32_scall:
/* This is not an n32 compatibility syscall, pass it on to
PTR sys_restart_syscall
PTR sys_semtimedop /* 6215 */
PTR sys_fadvise64_64
- PTR sys_statfs64
- PTR sys_fstatfs64
+ PTR compat_sys_statfs64
+ PTR compat_sys_fstatfs64
PTR sys_sendfile64
PTR sys_timer_create /* 6220 */
PTR sys_timer_settime
PTR compat_sys_mq_timedsend
PTR compat_sys_mq_timedreceive
PTR compat_sys_mq_notify
- PTR compat_sys_mq_getsetattr /* 6239 */
- PTR sys_ni_syscall /* sys_vserver */
+ PTR compat_sys_mq_getsetattr
+ PTR sys_ni_syscall /* 6240, sys_vserver */
+ PTR sys_waitid
+ PTR sys_ni_syscall /* available, was setaltroot */
+ PTR sys_add_key
+ PTR sys_request_key
+ PTR sys_keyctl /* 6245 */
.set at
ld t1, PT_EPC(sp) # skip syscall on return
- subu t0, v0, __NR_O32_Linux # check syscall number
+ dsubu t0, v0, __NR_O32_Linux # check syscall number
sltiu t0, t0, __NR_O32_Linux_syscalls + 1
daddiu t1, 4 # skip to next instruction
sd t1, PT_EPC(sp)
sll a2, a2, 0
sll a3, a3, 0
- /* XXX Put both in one cacheline, should save a bit. */
dsll t0, v0, 3 # offset into table
ld t2, (sys_call_table - (__NR_O32_Linux * 8))(t0)
- lbu t3, (sys_narg_table - __NR_O32_Linux)(v0)
- subu t0, t3, 5 # 5 or more arguments?
sd a3, PT_R26(sp) # save a3 for syscall restarting
- bgez t0, stackargs
-stack_done:
+ /*
+ * More than four arguments. Try to deal with it by copying the
+ * stack arguments from the user stack to the kernel stack.
+ * This Sucks (TM).
+ *
+ * We intentionally keep the kernel stack a little below the top of
+ * userspace so we don't have to do a slower byte accurate check here.
+ */
+ ld t0, PT_R29(sp) # get old user stack pointer
+ daddu t1, t0, 32
+ bltz t1, bad_stack
+
+1: lw a4, 16(t0) # argument #5 from usp
+2: lw a5, 20(t0) # argument #6 from usp
+3: lw a6, 24(t0) # argument #7 from usp
+
+ .section __ex_table,"a"
+ PTR 1b, bad_stack
+ PTR 2b, bad_stack
+ PTR 3b, bad_stack
+ .previous
+
li t1, _TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT
LONG_L t0, TI_FLAGS($28) # syscall tracing enabled?
and t0, t1, t0
sd t0, PT_R7(sp) # set error flag
beqz t0, 1f
- negu v0 # error
+ dnegu v0 # error
sd v0, PT_R0(sp) # flag for syscall restarting
1: sd v0, PT_R2(sp) # result
sd a6, PT_R10(sp)
sd a7, PT_R11(sp)
- sd t2,PT_R1(sp)
+ move s0, t2
move a0, sp
li a1, 0
jal do_syscall_trace
- ld t2,PT_R1(sp)
ld a0, PT_R4(sp) # Restore argument registers
ld a1, PT_R5(sp)
ld a3, PT_R7(sp)
ld a4, PT_R8(sp)
ld a5, PT_R9(sp)
-
- jalr t2
+ ld a6, PT_R10(sp) # For indirect syscalls
+ jalr s0
li t0, -EMAXERRNO - 1 # error?
sltu t0, t0, v0
sd t0, PT_R7(sp) # set error flag
beqz t0, 1f
- negu v0 # error
+ dnegu v0 # error
sd v0, PT_R0(sp) # set flag for syscall restarting
1: sd v0, PT_R2(sp) # result
/* ------------------------------------------------------------------------ */
- /*
- * More than four arguments. Try to deal with it by copying the
- * stack arguments from the user stack to the kernel stack.
- * This Sucks (TM).
- */
-stackargs:
- ld t0, PT_R29(sp) # get old user stack pointer
- subu t3, 4
- sll t1, t3, 2 # stack valid?
-
- addu t1, t0 # end address
- or t0, t1
- bltz t0, bad_stack # -> sp is bad
-
- ld t0, PT_R29(sp) # get old user stack pointer
- PTR_LA t1, 3f # copy 1 to 2 arguments
- sll t3, t3, 2
- subu t1, t3
- jr t1
-
- /* Ok, copy the args from the luser stack to the kernel stack */
- .set push
- .set noreorder
- .set nomacro
-1: lw a5, 20(t0) # argument #6 from usp
-2: lw a4, 16(t0) # argument #5 from usp
-3: .set pop
-
- j stack_done # go back
-
- .section __ex_table,"a"
- PTR 1b, bad_stack
- PTR 2b, bad_stack
- .previous
-
/*
* The stackpointer for a call with more than 4 arguments is bad.
*/
bad_stack:
- negu v0 # error
+ dnegu v0 # error
sd v0, PT_R0(sp)
sd v0, PT_R2(sp)
li t0, 1 # set error flag
dsll v0, a0, 3
dla v1, sys32_syscall
ld t2, (sys_call_table - (__NR_O32_Linux * 8))(v0)
- lbu t3, (sys_narg_table - __NR_O32_Linux)(a0)
li v0, -EINVAL
beq t2, v1, out # do not recurse
move a0, a1 # shift argument registers
move a1, a2
move a2, a3
-
-1: lw a3, 16(t0)
-2: lw t3, 20(t0)
-3: lw t1, 24(t0)
-
- .section __ex_table,"a"
- PTR 1b, efault
- PTR 2b, efault
- PTR 3b, efault
- .previous
-
- sw t3, 16(sp) # put into new stackframe
- sw t1, 20(sp)
-
- bnez t1, 1f # zero arguments?
- daddu a0, sp, 32 # then pass sp in a0
-1:
-
- sw t3, 16(sp)
- sw v1, 20(sp)
+ move a3, a4
+ move a4, a5
+ move a5, a6
jr t2
/* Unreached */
out: jr ra
END(sys32_syscall)
- .macro syscalltable
- sys sys32_syscall 0 /* 4000 */
- sys sys_exit 1
- sys sys_fork 0
- sys sys_read 3
- sys sys_write 3
- sys sys_open 3 /* 4005 */
- sys sys_close 1
- sys sys_waitpid 3
- sys sys_creat 2
- sys sys_link 2
- sys sys_unlink 1 /* 4010 */
- sys sys32_execve 0
- sys sys_chdir 1
- sys sys_time 1
- sys sys_mknod 3
- sys sys_chmod 2 /* 4015 */
- sys sys_lchown 3
- sys sys_ni_syscall 0
- sys sys_ni_syscall 0 /* was sys_stat */
- sys sys_lseek 3
- sys sys_getpid 0 /* 4020 */
- sys sys_mount 5
- sys sys_oldumount 1
- sys sys_setuid 1
- sys sys_getuid 0
- sys sys_stime 1 /* 4025 */
- sys sys32_ptrace 4
- sys sys_alarm 1
- sys sys_ni_syscall 0 /* was sys_fstat */
- sys sys_pause 0
- sys compat_sys_utime 2 /* 4030 */
- sys sys_ni_syscall 0
- sys sys_ni_syscall 0
- sys sys_access 2
- sys sys_nice 1
- sys sys_ni_syscall 0 /* 4035 */
- sys sys_sync 0
- sys sys_kill 2
- sys sys_rename 2
- sys sys_mkdir 2
- sys sys_rmdir 1 /* 4040 */
- sys sys_dup 1
- sys sys_pipe 0
- sys compat_sys_times 1
- sys sys_ni_syscall 0
- sys sys_brk 1 /* 4045 */
- sys sys_setgid 1
- sys sys_getgid 0
- sys sys_ni_syscall 0 /* was signal 2 */
- sys sys_geteuid 0
- sys sys_getegid 0 /* 4050 */
- sys sys_acct 0
- sys sys_umount 2
- sys sys_ni_syscall 0
- sys compat_sys_ioctl 3
- sys compat_sys_fcntl 3 /* 4055 */
- sys sys_ni_syscall 2
- sys sys_setpgid 2
- sys sys_ni_syscall, 0
- sys sys_olduname 1
- sys sys_umask 1 /* 4060 */
- sys sys_chroot 1
- sys sys32_ustat 2
- sys sys_dup2 2
- sys sys_getppid 0
- sys sys_getpgrp 0 /* 4065 */
- sys sys_setsid 0
- sys sys32_sigaction 3
- sys sys_sgetmask 0
- sys sys_ssetmask 1
- sys sys_setreuid 2 /* 4070 */
- sys sys_setregid 2
- sys sys32_sigsuspend 0
- sys compat_sys_sigpending 1
- sys sys_sethostname 2
- sys compat_sys_setrlimit 2 /* 4075 */
- sys compat_sys_getrlimit 2
- sys compat_sys_getrusage 2
- sys sys32_gettimeofday 2
- sys sys32_settimeofday 2
- sys sys_getgroups 2 /* 4080 */
- sys sys_setgroups 2
- sys sys_ni_syscall 0 /* old_select */
- sys sys_symlink 2
- sys sys_ni_syscall 0 /* was sys_lstat */
- sys sys_readlink 3 /* 4085 */
- sys sys_uselib 1
- sys sys_swapon 2
- sys sys_reboot 3
- sys sys32_readdir 3
- sys old_mmap 6 /* 4090 */
- sys sys_munmap 2
- sys sys_truncate 2
- sys sys_ftruncate 2
- sys sys_fchmod 2
- sys sys_fchown 3 /* 4095 */
- sys sys_getpriority 2
- sys sys_setpriority 3
- sys sys_ni_syscall 0
- sys compat_sys_statfs 2
- sys compat_sys_fstatfs 2 /* 4100 */
- sys sys_ni_syscall 0 /* sys_ioperm */
- sys sys32_socketcall 2
- sys sys_syslog 3
- sys compat_sys_setitimer 3
- sys compat_sys_getitimer 2 /* 4105 */
- sys compat_sys_newstat 2
- sys compat_sys_newlstat 2
- sys compat_sys_newfstat 2
- sys sys_uname 1
- sys sys_ni_syscall 0 /* sys_ioperm *//* 4110 */
- sys sys_vhangup 0
- sys sys_ni_syscall 0 /* was sys_idle */
- sys sys_ni_syscall 0 /* sys_vm86 */
- sys sys32_wait4 4
- sys sys_swapoff 1 /* 4115 */
- sys sys32_sysinfo 1
- sys sys32_ipc 6
- sys sys_fsync 1
- sys sys32_sigreturn 0
- sys sys_clone 0 /* 4120 */
- sys sys_setdomainname 2
- sys sys32_newuname 1
- sys sys_ni_syscall 0 /* sys_modify_ldt */
- sys sys32_adjtimex 1
- sys sys_mprotect 3 /* 4125 */
- sys compat_sys_sigprocmask 3
- sys sys_ni_syscall 0 /* was creat_module */
- sys sys_init_module 5
- sys sys_delete_module 1
- sys sys_ni_syscall 0 /* 4130, get_kernel_syms */
- sys sys_quotactl 0
- sys sys_getpgid 1
- sys sys_fchdir 1
- sys sys_bdflush 2
- sys sys_sysfs 3 /* 4135 */
- sys sys32_personality 1
- sys sys_ni_syscall 0 /* for afs_syscall */
- sys sys_setfsuid 1
- sys sys_setfsgid 1
- sys sys32_llseek 5 /* 4140 */
- sys sys32_getdents 3
- sys compat_sys_select 5
- sys sys_flock 2
- sys sys_msync 3
- sys compat_sys_readv 3 /* 4145 */
- sys compat_sys_writev 3
- sys sys_cacheflush 3
- sys sys_cachectl 3
- sys sys_sysmips 4
- sys sys_ni_syscall 0 /* 4150 */
- sys sys_getsid 1
- sys sys_fdatasync 0
- sys sys32_sysctl 1
- sys sys_mlock 2
- sys sys_munlock 2 /* 4155 */
- sys sys_mlockall 1
- sys sys_munlockall 0
- sys sys_sched_setparam 2
- sys sys_sched_getparam 2
- sys sys_sched_setscheduler 3 /* 4160 */
- sys sys_sched_getscheduler 1
- sys sys_sched_yield 0
- sys sys_sched_get_priority_max 1
- sys sys_sched_get_priority_min 1
- sys sys32_sched_rr_get_interval 2 /* 4165 */
- sys compat_sys_nanosleep 2
- sys sys_mremap 4
- sys sys_accept 3
- sys sys_bind 3
- sys sys_connect 3 /* 4170 */
- sys sys_getpeername 3
- sys sys_getsockname 3
- sys sys_getsockopt 5
- sys sys_listen 2
- sys sys_recv 4 /* 4175 */
- sys sys_recvfrom 6
- sys compat_sys_recvmsg 3
- sys sys_send 4
- sys compat_sys_sendmsg 3
- sys sys_sendto 6 /* 4180 */
- sys compat_sys_setsockopt 5
- sys sys_shutdown 2
- sys sys_socket 3
- sys sys_socketpair 4
- sys sys_setresuid 3 /* 4185 */
- sys sys_getresuid 3
- sys sys_ni_syscall 0 /* was query_module */
- sys sys_poll 3
- sys sys_nfsservctl 3
- sys sys_setresgid 3 /* 4190 */
- sys sys_getresgid 3
- sys sys_prctl 5
- sys sys32_rt_sigreturn 0
- sys sys32_rt_sigaction 4
- sys sys32_rt_sigprocmask 4 /* 4195 */
- sys sys32_rt_sigpending 2
- sys sys32_rt_sigtimedwait 4
- sys sys32_rt_sigqueueinfo 3
- sys sys32_rt_sigsuspend 0
- sys sys32_pread 6 /* 4200 */
- sys sys32_pwrite 6
- sys sys_chown 3
- sys sys_getcwd 2
- sys sys_capget 2
- sys sys_capset 2 /* 4205 */
- sys sys32_sigaltstack 0
- sys sys32_sendfile 4
- sys sys_ni_syscall 0
- sys sys_ni_syscall 0
- sys sys32_mmap2 6 /* 4210 */
- sys sys32_truncate64 4
- sys sys32_ftruncate64 4
- sys sys_newstat 2
- sys sys_newlstat 2
- sys sys_newfstat 2 /* 4215 */
- sys sys_pivot_root 2
- sys sys_mincore 3
- sys sys_madvise 3
- sys sys_getdents64 3
- sys compat_sys_fcntl64 3 /* 4220 */
- sys sys_ni_syscall 0
- sys sys_gettid 0
- sys sys32_readahead 5
- sys sys_setxattr 5
- sys sys_lsetxattr 5 /* 4225 */
- sys sys_fsetxattr 5
- sys sys_getxattr 4
- sys sys_lgetxattr 4
- sys sys_fgetxattr 4
- sys sys_listxattr 3 /* 4230 */
- sys sys_llistxattr 3
- sys sys_flistxattr 3
- sys sys_removexattr 2
- sys sys_lremovexattr 2
- sys sys_fremovexattr 2 /* 4235 */
- sys sys_tkill 2
- sys sys_sendfile64 5
- sys compat_sys_futex 5
- sys compat_sys_sched_setaffinity 3
- sys compat_sys_sched_getaffinity 3 /* 4240 */
- sys sys_io_setup 2
- sys sys_io_destroy 1
- sys sys_io_getevents 5
- sys sys_io_submit 3
- sys sys_io_cancel 3 /* 4245 */
- sys sys_exit_group 1
- sys sys_lookup_dcookie 3
- sys sys_epoll_create 1
- sys sys_epoll_ctl 4
- sys sys_epoll_wait 3 /* 4250 */
- sys sys_remap_file_pages 5
- sys sys_set_tid_address 1
- sys sys_restart_syscall 0
- sys sys_fadvise64_64 7
- sys sys_statfs64 3 /* 4255 */
- sys sys_fstatfs64 2
- sys sys_timer_create 3
- sys sys_timer_settime 4
- sys sys_timer_gettime 2
- sys sys_timer_getoverrun 1 /* 4260 */
- sys sys_timer_delete 1
- sys sys_clock_settime 2
- sys sys_clock_gettime 2
- sys sys_clock_getres 2
- sys sys_clock_nanosleep 4 /* 4265 */
- sys sys_tgkill 3
- sys compat_sys_utimes 2
- sys sys_ni_syscall 0 /* sys_mbind */
- sys sys_ni_syscall 0 /* sys_get_mempolicy */
- sys sys_ni_syscall 0 /* 4270 sys_set_mempolicy */
- sys compat_sys_mq_open 4
- sys sys_mq_unlink 1
- sys compat_sys_mq_timedsend 5
- sys compat_sys_mq_timedreceive 5
- sys compat_sys_mq_notify 2 /* 4275 */
- sys compat_sys_mq_getsetattr 3
- sys sys_ni_syscall 0 /* sys_vserver */
-
- .endm
-
- .macro sys function, nargs
- PTR \function
- .endm
-
.align 3
+ .type sys_call_table,@object;
sys_call_table:
- syscalltable
-
- .macro sys function, nargs
- .byte \nargs
- .endm
-
-sys_narg_table:
- syscalltable
+ PTR sys32_syscall /* 4000 */
+ PTR sys_exit
+ PTR sys_fork
+ PTR sys_read
+ PTR sys_write
+ PTR sys_open /* 4005 */
+ PTR sys_close
+ PTR sys_waitpid
+ PTR sys_creat
+ PTR sys_link
+ PTR sys_unlink /* 4010 */
+ PTR sys32_execve
+ PTR sys_chdir
+ PTR sys_time
+ PTR sys_mknod
+ PTR sys_chmod /* 4015 */
+ PTR sys_lchown
+ PTR sys_ni_syscall
+ PTR sys_ni_syscall /* was sys_stat */
+ PTR sys_lseek
+ PTR sys_getpid /* 4020 */
+ PTR sys_mount
+ PTR sys_oldumount
+ PTR sys_setuid
+ PTR sys_getuid
+ PTR sys_stime /* 4025 */
+ PTR sys32_ptrace
+ PTR sys_alarm
+ PTR sys_ni_syscall /* was sys_fstat */
+ PTR sys_pause
+ PTR compat_sys_utime /* 4030 */
+ PTR sys_ni_syscall
+ PTR sys_ni_syscall
+ PTR sys_access
+ PTR sys_nice
+ PTR sys_ni_syscall /* 4035 */
+ PTR sys_sync
+ PTR sys_kill
+ PTR sys_rename
+ PTR sys_mkdir
+ PTR sys_rmdir /* 4040 */
+ PTR sys_dup
+ PTR sys_pipe
+ PTR compat_sys_times
+ PTR sys_ni_syscall
+ PTR sys_brk /* 4045 */
+ PTR sys_setgid
+ PTR sys_getgid
+ PTR sys_ni_syscall /* was signal 2 */
+ PTR sys_geteuid
+ PTR sys_getegid /* 4050 */
+ PTR sys_acct
+ PTR sys_umount
+ PTR sys_ni_syscall
+ PTR compat_sys_ioctl
+ PTR compat_sys_fcntl /* 4055 */
+ PTR sys_ni_syscall
+ PTR sys_setpgid
+ PTR sys_ni_syscall
+ PTR sys_olduname
+ PTR sys_umask /* 4060 */
+ PTR sys_chroot
+ PTR sys32_ustat
+ PTR sys_dup2
+ PTR sys_getppid
+ PTR sys_getpgrp /* 4065 */
+ PTR sys_setsid
+ PTR sys32_sigaction
+ PTR sys_sgetmask
+ PTR sys_ssetmask
+ PTR sys_setreuid /* 4070 */
+ PTR sys_setregid
+ PTR sys32_sigsuspend
+ PTR compat_sys_sigpending
+ PTR sys_sethostname
+ PTR compat_sys_setrlimit /* 4075 */
+ PTR compat_sys_getrlimit
+ PTR compat_sys_getrusage
+ PTR sys32_gettimeofday
+ PTR sys32_settimeofday
+ PTR sys_getgroups /* 4080 */
+ PTR sys_setgroups
+ PTR sys_ni_syscall /* old_select */
+ PTR sys_symlink
+ PTR sys_ni_syscall /* was sys_lstat */
+ PTR sys_readlink /* 4085 */
+ PTR sys_uselib
+ PTR sys_swapon
+ PTR sys_reboot
+ PTR sys32_readdir
+ PTR old_mmap /* 4090 */
+ PTR sys_munmap
+ PTR sys_truncate
+ PTR sys_ftruncate
+ PTR sys_fchmod
+ PTR sys_fchown /* 4095 */
+ PTR sys_getpriority
+ PTR sys_setpriority
+ PTR sys_ni_syscall
+ PTR compat_sys_statfs
+ PTR compat_sys_fstatfs /* 4100 */
+ PTR sys_ni_syscall /* sys_ioperm */
+ PTR sys32_socketcall
+ PTR sys_syslog
+ PTR compat_sys_setitimer
+ PTR compat_sys_getitimer /* 4105 */
+ PTR compat_sys_newstat
+ PTR compat_sys_newlstat
+ PTR compat_sys_newfstat
+ PTR sys_uname
+ PTR sys_ni_syscall /* sys_ioperm *//* 4110 */
+ PTR sys_vhangup
+ PTR sys_ni_syscall /* was sys_idle */
+ PTR sys_ni_syscall /* sys_vm86 */
+ PTR sys32_wait4
+ PTR sys_swapoff /* 4115 */
+ PTR sys32_sysinfo
+ PTR sys32_ipc
+ PTR sys_fsync
+ PTR sys32_sigreturn
+ PTR sys_clone /* 4120 */
+ PTR sys_setdomainname
+ PTR sys32_newuname
+ PTR sys_ni_syscall /* sys_modify_ldt */
+ PTR sys32_adjtimex
+ PTR sys_mprotect /* 4125 */
+ PTR compat_sys_sigprocmask
+ PTR sys_ni_syscall /* was creat_module */
+ PTR sys_init_module
+ PTR sys_delete_module
+ PTR sys_ni_syscall /* 4130, get_kernel_syms */
+ PTR sys_quotactl
+ PTR sys_getpgid
+ PTR sys_fchdir
+ PTR sys_bdflush
+ PTR sys_sysfs /* 4135 */
+ PTR sys32_personality
+ PTR sys_ni_syscall /* for afs_syscall */
+ PTR sys_setfsuid
+ PTR sys_setfsgid
+ PTR sys32_llseek /* 4140 */
+ PTR sys32_getdents
+ PTR compat_sys_select
+ PTR sys_flock
+ PTR sys_msync
+ PTR compat_sys_readv /* 4145 */
+ PTR compat_sys_writev
+ PTR sys_cacheflush
+ PTR sys_cachectl
+ PTR sys_sysmips
+ PTR sys_ni_syscall /* 4150 */
+ PTR sys_getsid
+ PTR sys_fdatasync
+ PTR sys32_sysctl
+ PTR sys_mlock
+ PTR sys_munlock /* 4155 */
+ PTR sys_mlockall
+ PTR sys_munlockall
+ PTR sys_sched_setparam
+ PTR sys_sched_getparam
+ PTR sys_sched_setscheduler /* 4160 */
+ PTR sys_sched_getscheduler
+ PTR sys_sched_yield
+ PTR sys_sched_get_priority_max
+ PTR sys_sched_get_priority_min
+ PTR sys32_sched_rr_get_interval /* 4165 */
+ PTR compat_sys_nanosleep
+ PTR sys_mremap
+ PTR sys_accept
+ PTR sys_bind
+ PTR sys_connect /* 4170 */
+ PTR sys_getpeername
+ PTR sys_getsockname
+ PTR sys_getsockopt
+ PTR sys_listen
+ PTR sys_recv /* 4175 */
+ PTR sys_recvfrom
+ PTR compat_sys_recvmsg
+ PTR sys_send
+ PTR compat_sys_sendmsg
+ PTR sys_sendto /* 4180 */
+ PTR compat_sys_setsockopt
+ PTR sys_shutdown
+ PTR sys_socket
+ PTR sys_socketpair
+ PTR sys_setresuid /* 4185 */
+ PTR sys_getresuid
+ PTR sys_ni_syscall /* was query_module */
+ PTR sys_poll
+ PTR sys_nfsservctl
+ PTR sys_setresgid /* 4190 */
+ PTR sys_getresgid
+ PTR sys_prctl
+ PTR sys32_rt_sigreturn
+ PTR sys32_rt_sigaction
+ PTR sys32_rt_sigprocmask /* 4195 */
+ PTR sys32_rt_sigpending
+ PTR sys32_rt_sigtimedwait
+ PTR sys32_rt_sigqueueinfo
+ PTR sys32_rt_sigsuspend
+ PTR sys32_pread /* 4200 */
+ PTR sys32_pwrite
+ PTR sys_chown
+ PTR sys_getcwd
+ PTR sys_capget
+ PTR sys_capset /* 4205 */
+ PTR sys32_sigaltstack
+ PTR sys32_sendfile
+ PTR sys_ni_syscall
+ PTR sys_ni_syscall
+ PTR sys32_mmap2 /* 4210 */
+ PTR sys32_truncate64
+ PTR sys32_ftruncate64
+ PTR sys_newstat
+ PTR sys_newlstat
+ PTR sys_newfstat /* 4215 */
+ PTR sys_pivot_root
+ PTR sys_mincore
+ PTR sys_madvise
+ PTR sys_getdents64
+ PTR compat_sys_fcntl64 /* 4220 */
+ PTR sys_ni_syscall
+ PTR sys_gettid
+ PTR sys32_readahead
+ PTR sys_setxattr
+ PTR sys_lsetxattr /* 4225 */
+ PTR sys_fsetxattr
+ PTR sys_getxattr
+ PTR sys_lgetxattr
+ PTR sys_fgetxattr
+ PTR sys_listxattr /* 4230 */
+ PTR sys_llistxattr
+ PTR sys_flistxattr
+ PTR sys_removexattr
+ PTR sys_lremovexattr
+ PTR sys_fremovexattr /* 4235 */
+ PTR sys_tkill
+ PTR sys_sendfile64
+ PTR compat_sys_futex
+ PTR compat_sys_sched_setaffinity
+ PTR compat_sys_sched_getaffinity /* 4240 */
+ PTR sys_io_setup
+ PTR sys_io_destroy
+ PTR sys_io_getevents
+ PTR sys_io_submit
+ PTR sys_io_cancel /* 4245 */
+ PTR sys_exit_group
+ PTR sys_lookup_dcookie
+ PTR sys_epoll_create
+ PTR sys_epoll_ctl
+ PTR sys_epoll_wait /* 4250 */
+ PTR sys_remap_file_pages
+ PTR sys_set_tid_address
+ PTR sys_restart_syscall
+ PTR sys_fadvise64_64
+ PTR compat_sys_statfs64 /* 4255 */
+ PTR compat_sys_fstatfs64
+ PTR sys_timer_create
+ PTR compat_sys_timer_settime
+ PTR compat_sys_timer_gettime
+ PTR sys_timer_getoverrun /* 4260 */
+ PTR sys_timer_delete
+ PTR compat_sys_clock_settime
+ PTR compat_sys_clock_gettime
+ PTR compat_sys_clock_getres
+ PTR compat_sys_clock_nanosleep /* 4265 */
+ PTR sys_tgkill
+ PTR compat_sys_utimes
+ PTR sys_ni_syscall /* sys_mbind */
+ PTR sys_ni_syscall /* sys_get_mempolicy */
+ PTR sys_ni_syscall /* 4270 sys_set_mempolicy */
+ PTR compat_sys_mq_open
+ PTR sys_mq_unlink
+ PTR compat_sys_mq_timedsend
+ PTR compat_sys_mq_timedreceive
+ PTR compat_sys_mq_notify /* 4275 */
+ PTR compat_sys_mq_getsetattr
+ PTR sys_ni_syscall /* sys_vserver */
+ PTR sys_waitid
+ PTR sys_ni_syscall /* available, was setaltroot */
+ PTR sys_add_key /* 4280 */
+ PTR sys_request_key
+ PTR sys_keyctl
+ .size sys_call_table,.-sys_call_table
#include <linux/sched.h>
#include <linux/init.h>
#include <asm/atomic.h>
-#include <asm/semaphore.h>
+#include <asm/cpu-features.h>
#include <asm/errno.h>
-
-#ifdef CONFIG_CPU_HAS_LLSC
-
+#include <asm/semaphore.h>
+#include <asm/war.h>
/*
* Atomically update sem->count.
* This does the equivalent of the following:
* tmp = MAX(old_count, 0) + incr;
* sem->count = tmp;
* return old_count;
- */
-static inline int __sem_update_count(struct semaphore *sem, int incr)
-{
- int old_count, tmp;
-
- __asm__ __volatile__(
- "1: ll %0, %2 \n"
- " sra %1, %0, 31 \n"
- " not %1 \n"
- " and %1, %0, %1 \n"
- " add %1, %1, %3 \n"
- " sc %1, %2 \n"
- " beqz %1, 1b \n"
- : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
- : "r" (incr), "m" (sem->count));
-
- return old_count;
-}
-
-#else
-
-/*
+ *
* On machines without lld/scd we need a spinlock to make the manipulation of
* sem->count and sem->waking atomic. Scalability isn't an issue because
* this lock is used on UP only so it's just an empty variable.
*/
-static spinlock_t semaphore_lock = SPIN_LOCK_UNLOCKED;
-
static inline int __sem_update_count(struct semaphore *sem, int incr)
{
- unsigned long flags;
int old_count, tmp;
- spin_lock_irqsave(&semaphore_lock, flags);
- old_count = atomic_read(&sem->count);
- tmp = max_t(int, old_count, 0) + incr;
- atomic_set(&sem->count, tmp);
- spin_unlock_irqrestore(&semaphore_lock, flags);
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ "1: ll %0, %2 \n"
+ " sra %1, %0, 31 \n"
+ " not %1 \n"
+ " and %1, %0, %1 \n"
+ " add %1, %1, %3 \n"
+ " sc %1, %2 \n"
+ " beqzl %1, 1b \n"
+ : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
+ : "r" (incr), "m" (sem->count));
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
+ "1: ll %0, %2 \n"
+ " sra %1, %0, 31 \n"
+ " not %1 \n"
+ " and %1, %0, %1 \n"
+ " add %1, %1, %3 \n"
+ " sc %1, %2 \n"
+ " beqz %1, 1b \n"
+ : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count)
+ : "r" (incr), "m" (sem->count));
+ } else {
+ static spinlock_t semaphore_lock = SPIN_LOCK_UNLOCKED;
+ unsigned long flags;
+
+ spin_lock_irqsave(&semaphore_lock, flags);
+ old_count = atomic_read(&sem->count);
+ tmp = max_t(int, old_count, 0) + incr;
+ atomic_set(&sem->count, tmp);
+ spin_unlock_irqrestore(&semaphore_lock, flags);
+ }
return old_count;
}
-#endif
-
void __up(struct semaphore *sem)
{
/*
EXPORT_SYMBOL(PCI_DMA_BUS_IS_PHYS);
-extern void * __rd_start, * __rd_end;
-
/*
* Setup information
*
}
}
+static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_end)
+{
+ /*
+ * "rd_start=0xNNNNNNNN" defines the memory address of an initrd
+ * "rd_size=0xNN" it's size
+ */
+ unsigned long start = 0;
+ unsigned long size = 0;
+ unsigned long end;
+ char cmd_line[CL_SIZE];
+ char *start_str;
+ char *size_str;
+ char *tmp;
+
+ strcpy(cmd_line, command_line);
+ *command_line = 0;
+ tmp = cmd_line;
+ /* Ignore "rd_start=" strings in other parameters. */
+ start_str = strstr(cmd_line, "rd_start=");
+ if (start_str && start_str != cmd_line && *(start_str - 1) != ' ')
+ start_str = strstr(start_str, " rd_start=");
+ while (start_str) {
+ if (start_str != cmd_line)
+ strncat(command_line, tmp, start_str - tmp);
+ start = memparse(start_str + 9, &start_str);
+ tmp = start_str + 1;
+ start_str = strstr(start_str, " rd_start=");
+ }
+ if (*tmp)
+ strcat(command_line, tmp);
+
+ strcpy(cmd_line, command_line);
+ *command_line = 0;
+ tmp = cmd_line;
+ /* Ignore "rd_size" strings in other parameters. */
+ size_str = strstr(cmd_line, "rd_size=");
+ if (size_str && size_str != cmd_line && *(size_str - 1) != ' ')
+ size_str = strstr(size_str, " rd_size=");
+ while (size_str) {
+ if (size_str != cmd_line)
+ strncat(command_line, tmp, size_str - tmp);
+ size = memparse(size_str + 8, &size_str);
+ tmp = size_str + 1;
+ size_str = strstr(size_str, " rd_size=");
+ }
+ if (*tmp)
+ strcat(command_line, tmp);
+
+#ifdef CONFIG_MIPS64
+ /* HACK: Guess if the sign extension was forgotten */
+ if (start > 0x0000000080000000 && start < 0x00000000ffffffff)
+ start |= 0xffffffff00000000;
+#endif
+
+ end = start + size;
+ if (start && end) {
+ *rd_start = start;
+ *rd_end = end;
+ return 1;
+ }
+ return 0;
+}
#define PFN_UP(x) (((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
#define PFN_DOWN(x) ((x) >> PAGE_SHIFT)
static inline void bootmem_init(void)
{
unsigned long start_pfn;
+ unsigned long reserved_end = (unsigned long)&_end;
#ifndef CONFIG_SGI_IP27
- unsigned long bootmap_size, max_low_pfn, first_usable_pfn;
+ unsigned long first_usable_pfn;
+ unsigned long bootmap_size;
int i;
#endif
#ifdef CONFIG_BLK_DEV_INITRD
- unsigned long tmp;
- unsigned long *initrd_header;
-
- tmp = (((unsigned long)&_end + PAGE_SIZE-1) & PAGE_MASK) - 8;
- if (tmp < (unsigned long)&_end)
- tmp += PAGE_SIZE;
- initrd_header = (unsigned long *)tmp;
- if (initrd_header[0] == 0x494E5244) {
- initrd_start = (unsigned long)&initrd_header[2];
- initrd_end = initrd_start + initrd_header[1];
+ int initrd_reserve_bootmem = 0;
+
+ /* Board specific code should have set up initrd_start and initrd_end */
+ ROOT_DEV = Root_RAM0;
+ if (parse_rd_cmdline(&initrd_start, &initrd_end)) {
+ reserved_end = max(reserved_end, initrd_end);
+ initrd_reserve_bootmem = 1;
+ } else {
+ unsigned long tmp;
+ unsigned long *initrd_header;
+
+ tmp = ((reserved_end + PAGE_SIZE-1) & PAGE_MASK) - 8;
+ if (tmp < reserved_end)
+ tmp += PAGE_SIZE;
+ initrd_header = (unsigned long *)tmp;
+ if (initrd_header[0] == 0x494E5244) {
+ initrd_start = (unsigned long)&initrd_header[2];
+ initrd_end = initrd_start + initrd_header[1];
+ reserved_end = max(reserved_end, initrd_end);
+ initrd_reserve_bootmem = 1;
+ }
}
- start_pfn = PFN_UP(CPHYSADDR((&_end)+(initrd_end - initrd_start) + PAGE_SIZE));
-#else
+#endif /* CONFIG_BLK_DEV_INITRD */
+
/*
* Partially used pages are not usable - thus
* we are rounding upwards.
*/
- start_pfn = PFN_UP(CPHYSADDR(&_end));
-#endif /* CONFIG_BLK_DEV_INITRD */
+ start_pfn = PFN_UP(CPHYSADDR(reserved_end));
#ifndef CONFIG_SGI_IP27
/* Find the highest page frame number we have available. */
/* Reserve the bootmap memory. */
reserve_bootmem(PFN_PHYS(first_usable_pfn), bootmap_size);
-#endif
+#endif /* CONFIG_SGI_IP27 */
#ifdef CONFIG_BLK_DEV_INITRD
- /* Board specific code should have set up initrd_start and initrd_end */
- ROOT_DEV = Root_RAM0;
- if (&__rd_start != &__rd_end) {
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
- }
initrd_below_start_ok = 1;
if (initrd_start) {
unsigned long initrd_size = ((unsigned char *)initrd_end) - ((unsigned char *)initrd_start);
printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
- (void *)initrd_start,
- initrd_size);
+ (void *)initrd_start, initrd_size);
if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
printk("initrd extends beyond end of memory "
sizeof(long) * 2, CPHYSADDR(initrd_end),
sizeof(long) * 2, PFN_PHYS(max_low_pfn));
initrd_start = initrd_end = 0;
+ initrd_reserve_bootmem = 0;
}
+
+ if (initrd_reserve_bootmem)
+ reserve_bootmem(CPHYSADDR(initrd_start), initrd_size);
}
#endif /* CONFIG_BLK_DEV_INITRD */
}
void __init setup_arch(char **cmdline_p)
{
- unsigned int status;
-
cpu_probe();
prom_init();
cpu_report();
-#ifdef CONFIG_MIPS32
- /* Disable coprocessors and set FPU for 16/32 FPR register model */
- status = read_c0_status();
- status &= ~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
- status |= ST0_CU0;
- write_c0_status(status);
-#endif
-#ifdef CONFIG_MIPS64
- /*
- * On IP27, I am seeing the TS bit set when the kernel is loaded.
- * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
- * anyway ...
- */
- status = read_c0_status();
- status &= ~(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
- status |= (ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
- write_c0_status(status);
-#endif
-
#if defined(CONFIG_VT)
#if defined(CONFIG_VGA_CONSOLE)
conswitchp = &vga_con;
#include <linux/ptrace.h>
#include <linux/suspend.h>
#include <linux/unistd.h>
-#include <linux/bitops.h>
+#include <linux/compiler.h>
#include <asm/asm.h>
+#include <linux/bitops.h>
#include <asm/cacheflush.h>
#include <asm/fpu.h>
#include <asm/sim.h>
#ifdef CONFIG_TRAD_SIGNALS
save_static_function(sys_sigsuspend);
-static_unused int _sys_sigsuspend(struct pt_regs regs)
+__attribute_used__ noinline static int
+_sys_sigsuspend(nabi_no_regargs struct pt_regs regs)
{
sigset_t *uset, saveset, newset;
#endif
save_static_function(sys_rt_sigsuspend);
-static_unused int _sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
+__attribute_used__ noinline static int
+_sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
{
sigset_t *unewset, saveset, newset;
size_t sigsetsize;
err |= __get_user(current->used_math, &sc->sc_used_math);
+ preempt_disable();
+
if (current->used_math) {
/* restore fpu context if we have used it before */
own_fpu();
lose_fpu();
}
+ preempt_enable();
+
return err;
}
+#if PLAT_TRAMPOLINE_STUFF_LINE
+#define __tramp __attribute__((aligned(PLAT_TRAMPOLINE_STUFF_LINE)))
+#else
+#define __tramp
+#endif
+
#ifdef CONFIG_TRAD_SIGNALS
struct sigframe {
u32 sf_ass[4]; /* argument save space for o32 */
- u32 sf_code[2]; /* signal trampoline */
- struct sigcontext sf_sc;
+ u32 sf_code[2] __tramp; /* signal trampoline */
+ struct sigcontext sf_sc __tramp;
sigset_t sf_mask;
};
#endif
struct rt_sigframe {
u32 rs_ass[4]; /* argument save space for o32 */
- u32 rs_code[2]; /* signal trampoline */
- struct siginfo rs_info;
+ u32 rs_code[2] __tramp; /* signal trampoline */
+ struct siginfo rs_info __tramp;
struct ucontext rs_uc;
};
* Save FPU state to signal context. Signal handler will "inherit"
* current FPU state.
*/
+ preempt_disable();
+
if (!is_fpu_owner()) {
own_fpu();
restore_fp(current);
}
err |= save_fp_context(sc);
+ preempt_enable();
+
out:
return err;
}
static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
size_t frame_size)
{
- unsigned long sp;
+ unsigned long sp, almask;
/* Default to using normal stack */
sp = regs->regs[29];
if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0))
sp = current->sas_ss_sp + current->sas_ss_size;
- return (void *)((sp - frame_size) & ALMASK);
+ if (PLAT_TRAMPOLINE_STUFF_LINE)
+ almask = ~(PLAT_TRAMPOLINE_STUFF_LINE - 1);
+ else
+ almask = ALMASK;
+
+ return (void *)((sp - frame_size) & ~(PLAT_TRAMPOLINE_STUFF_LINE - 1));
}
#ifdef CONFIG_TRAD_SIGNALS
* li v0, __NR_sigreturn
* syscall
*/
+ if (PLAT_TRAMPOLINE_STUFF_LINE)
+ __builtin_memset(frame->sf_code, '0',
+ PLAT_TRAMPOLINE_STUFF_LINE);
err |= __put_user(0x24020000 + __NR_sigreturn, frame->sf_code + 0);
err |= __put_user(0x0000000c , frame->sf_code + 1);
flush_cache_sigtramp((unsigned long) frame->sf_code);
* li v0, __NR_rt_sigreturn
* syscall
*/
+ if (PLAT_TRAMPOLINE_STUFF_LINE)
+ __builtin_memset(frame->rs_code, '0',
+ PLAT_TRAMPOLINE_STUFF_LINE);
err |= __put_user(0x24020000 + __NR_rt_sigreturn, frame->rs_code + 0);
err |= __put_user(0x0000000c , frame->rs_code + 1);
flush_cache_sigtramp((unsigned long) frame->rs_code);
setup_frame(ka, regs, sig, oldset);
#endif
- if (ka->sa.sa_flags & SA_ONESHOT)
- ka->sa.sa_handler = SIG_DFL;
if (!(ka->sa.sa_flags & SA_NODEFER)) {
spin_lock_irq(¤t->sighand->siglock);
sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
#include <linux/ptrace.h>
#include <linux/compat.h>
#include <linux/suspend.h>
-#include <linux/bitops.h>
+#include <linux/compiler.h>
#include <asm/asm.h>
+#include <linux/bitops.h>
#include <asm/cacheflush.h>
#include <asm/sim.h>
#include <asm/uaccess.h>
#include <asm/system.h>
#include <asm/fpu.h>
+#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3)
+
+typedef union sigval32 {
+ int sival_int;
+ s32 sival_ptr;
+} sigval_t32;
+
+typedef struct siginfo32 {
+ int si_signo;
+ int si_code;
+ int si_errno;
+
+ union {
+ int _pad[SI_PAD_SIZE32];
+
+ /* kill() */
+ struct {
+ compat_pid_t _pid; /* sender's pid */
+ compat_uid_t _uid; /* sender's uid */
+ } _kill;
+
+ /* SIGCHLD */
+ struct {
+ compat_pid_t _pid; /* which child */
+ compat_uid_t _uid; /* sender's uid */
+ int _status; /* exit code */
+ compat_clock_t _utime;
+ compat_clock_t _stime;
+ } _sigchld;
+
+ /* IRIX SIGCHLD */
+ struct {
+ compat_pid_t _pid; /* which child */
+ compat_clock_t _utime;
+ int _status; /* exit code */
+ compat_clock_t _stime;
+ } _irix_sigchld;
+
+ /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
+ struct {
+ s32 _addr; /* faulting insn/memory ref. */
+ } _sigfault;
+
+ /* SIGPOLL, SIGXFSZ (To do ...) */
+ struct {
+ int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
+ int _fd;
+ } _sigpoll;
+
+ /* POSIX.1b timers */
+ struct {
+ unsigned int _timer1;
+ unsigned int _timer2;
+ } _timer;
+
+ /* POSIX.1b signals */
+ struct {
+ compat_pid_t _pid; /* sender's pid */
+ compat_uid_t _uid; /* sender's uid */
+ sigval_t32 _sigval;
+ } _rt;
+
+ } _sifields;
+} siginfo_t32;
+
/*
* Including <asm/unistd.h> would give use the 64-bit syscall numbers ...
*/
* Atomically swap in the new signal mask, and wait for a signal.
*/
save_static_function(sys32_sigsuspend);
-static_unused int _sys32_sigsuspend(nabi_no_regargs struct pt_regs regs)
+__attribute_used__ noinline static int
+_sys32_sigsuspend(nabi_no_regargs struct pt_regs regs)
{
compat_sigset_t *uset;
sigset_t newset, saveset;
}
save_static_function(sys32_rt_sigsuspend);
-static_unused int _sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
+__attribute_used__ noinline static int
+_sys32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs)
{
compat_sigset_t *uset;
sigset_t newset, saveset;
err |= __get_user(current->used_math, &sc->sc_used_math);
+ preempt_disable();
+
if (current->used_math) {
/* restore fpu context if we have used it before */
own_fpu();
lose_fpu();
}
+ preempt_enable();
+
return err;
}
* Save FPU state to signal context. Signal handler will "inherit"
* current FPU state.
*/
+ preempt_disable();
+
if (!is_fpu_owner()) {
own_fpu();
restore_fp(current);
}
err |= save_fp_context32(sc);
+ preempt_enable();
+
out:
return err;
}
}
static inline void handle_signal(unsigned long sig, siginfo_t *info,
- sigset_t *oldset, struct pt_regs * regs)
+ struct k_sigaction *ka, sigset_t *oldset, struct pt_regs * regs)
{
- struct k_sigaction *ka = ¤t->sighand->action[sig-1];
-
switch (regs->regs[0]) {
case ERESTART_RESTARTBLOCK:
case ERESTARTNOHAND:
else
setup_frame(ka, regs, sig, oldset);
- if (ka->sa.sa_flags & SA_ONESHOT)
- ka->sa.sa_handler = SIG_DFL;
if (!(ka->sa.sa_flags & SA_NODEFER)) {
spin_lock_irq(¤t->sighand->siglock);
sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
asmlinkage int do_signal32(sigset_t *oldset, struct pt_regs *regs)
{
+ struct k_sigaction ka;
siginfo_t info;
int signr;
if (!oldset)
oldset = ¤t->blocked;
- signr = get_signal_to_deliver(&info, regs, NULL);
+ signr = get_signal_to_deliver(&info, &ka, regs, NULL);
if (signr > 0) {
- handle_signal(signr, &info, oldset, regs);
+ handle_signal(signr, &info, &ka, oldset, regs);
return 1;
}
int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
+EXPORT_SYMBOL(phys_cpu_present_map);
EXPORT_SYMBOL(cpu_online_map);
cycles_t cacheflush_time;
init_new_context(current, &init_mm);
current_thread_info()->cpu = 0;
smp_tune_scheduling();
- prom_build_cpu_map();
prom_prepare_cpus(max_cpus);
}
#include <linux/sem.h>
#include <linux/msg.h>
#include <linux/shm.h>
+#include <linux/compiler.h>
#include <asm/branch.h>
#include <asm/cachectl.h>
int do_color_align;
unsigned long task_size;
-#if CONFIG_MIPS32
+#ifdef CONFIG_MIPS32
task_size = TASK_SIZE;
#else
task_size = (current->thread.mflags & MF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE;
}
save_static_function(sys_fork);
-static_unused int _sys_fork(nabi_no_regargs struct pt_regs regs)
+__attribute_used__ noinline static int
+_sys_fork(nabi_no_regargs struct pt_regs regs)
{
return do_fork(SIGCHLD, regs.regs[29], ®s, 0, NULL, NULL);
}
save_static_function(sys_clone);
-static_unused int _sys_clone(nabi_no_regargs struct pt_regs regs)
+__attribute_used__ noinline static int
+_sys_clone(nabi_no_regargs struct pt_regs regs)
{
unsigned long clone_flags;
unsigned long newsp;
return error;
down_read(&uts_sem);
- if(len > (__NEW_UTS_LEN - 1))
- len = __NEW_UTS_LEN - 1;
+ if (len > __NEW_UTS_LEN)
+ len = __NEW_UTS_LEN;
error = 0;
if (copy_to_user(name, system_utsname.domainname, len))
error = -EFAULT;
/*
* Copyright 2001 MontaVista Software Inc.
* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- * Copyright (c) 2003 Maciej W. Rozycki
+ * Copyright (c) 2003, 2004 Maciej W. Rozycki
*
* Common time service routines for MIPS machines. See
* Documentation/mips/time.README.
#include <linux/module.h>
#include <asm/bootinfo.h>
+#include <asm/compiler.h>
#include <asm/cpu.h>
#include <asm/cpu-features.h>
#include <asm/div64.h>
spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
-/*
- * whether we emulate local_timer_interrupts for SMP machines.
- */
-int emulate_local_timer_interrupt;
-
-
/*
* By default we provide the null RTC ops
*/
__asm__("multu %1,%2"
: "=h" (res)
: "r" (count), "r" (sll32_usecs_per_cycle)
- : "lo", "accum");
+ : "lo", GCC_REG_ACCUM);
/*
* Due to possible jiffies inconsistencies, we need to check
__asm__("multu %1,%2"
: "=h" (res)
: "r" (count), "r" (quotient)
- : "lo", "accum");
+ : "lo", GCC_REG_ACCUM);
/*
* Due to possible jiffies inconsistencies, we need to check
: "r" (timerhi), "m" (timerlo),
"r" (tmp), "r" (USECS_PER_JIFFY),
"r" (USECS_PER_JIFFY_FRAC)
- : "hi", "lo", "accum");
+ : "hi", "lo", GCC_REG_ACCUM);
cached_quotient = quotient;
}
}
__asm__("multu %1,%2"
: "=h" (res)
: "r" (count), "r" (quotient)
- : "lo", "accum");
+ : "lo", GCC_REG_ACCUM);
/*
* Due to possible jiffies inconsistencies, we need to check
}
}
-#if !defined(CONFIG_SMP)
/*
* In UP mode, we call local_timer_interrupt() to do profiling
* and process accouting.
*/
local_timer_interrupt(irq, dev_id, regs);
-#else /* CONFIG_SMP */
-
- if (emulate_local_timer_interrupt) {
- /*
- * this is the place where we send out inter-process
- * interrupts and let each CPU do its own profiling
- * and process accouting.
- *
- * Obviously we need to call local_timer_interrupt() for
- * the current CPU too.
- */
- panic("Not implemented yet!!!");
- }
-#endif /* CONFIG_SMP */
-
return IRQ_HANDLED;
}
goto sig;
}
+ preempt_disable();
+
if (ll_task == NULL || ll_task == current) {
ll_bit = 1;
} else {
}
ll_task = current;
+ preempt_enable();
+
regs->regs[(opcode & RT) >> 16] = value;
compute_return_epc(regs);
signal = SIGBUS;
goto sig;
}
+
+ preempt_disable();
+
if (ll_bit == 0 || ll_task != current) {
regs->regs[reg] = 0;
+ preempt_enable();
compute_return_epc(regs);
return;
}
+ preempt_enable();
+
if (put_user(regs->regs[reg], vaddr)) {
signal = SIGSEGV;
goto sig;
if (fcr31 & FPU_CSR_UNI_X) {
int sig;
+ preempt_disable();
+
/*
* Unimplemented operation exception. If we've got the full
* software emulator on-board, let's use it...
/* Restore the hardware register state */
restore_fp(current);
+ preempt_enable();
+
/* If something went wrong, signal */
if (sig)
force_sig(sig, current);
break;
case 1:
+ preempt_disable();
+
own_fpu();
if (current->used_math) { /* Using the FPU again. */
restore_fp(current);
force_sig(sig, current);
}
+ preempt_enable();
+
return;
case 2:
void __init per_cpu_trap_init(void)
{
unsigned int cpu = smp_processor_id();
+ unsigned int status_set = ST0_CU0;
- /* Some firmware leaves the BEV flag set, clear it. */
- clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_BEV);
+ /*
+ * Disable coprocessors and select 32-bit or 64-bit addressing
+ * and the 16/32 or 32/32 FPR register model. Reset the BEV
+ * flag that some firmware may have left set and the TS bit (for
+ * IP27). Set XX for ISA IV code to work.
+ */
#ifdef CONFIG_MIPS64
- set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
+ status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX;
#endif
-
if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
- set_c0_status(ST0_XX);
+ status_set |= ST0_XX;
+ change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
+ status_set);
/*
* Some MIPS CPUs have a dedicated interrupt vector which reduces the
set_except_vector(24, handle_mcheck);
if (cpu_has_vce)
- memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x80);
+ /* Special exception: R4[04]00 uses also the divec space. */
+ memcpy((void *)(CAC_BASE + 0x180), &except_vec3_r4000, 0x100);
else if (cpu_has_4kex)
memcpy((void *)(CAC_BASE + 0x180), &except_vec3_generic, 0x80);
else
/* will be freed after init */
. = ALIGN(4096); /* Init code and data */
__init_begin = .;
- /* /DISCARD/ doesn't work for .reginfo */
- .reginfo : { *(.reginfo) }
.init.text : {
_sinittext = .;
*(.init.text)
*(.exit.text)
*(.exit.data)
*(.exitcall.exit)
+
+ /* ABI crap starts here */
+ *(.comment)
+ *(.MIPS.options)
+ *(.note)
+ *(.options)
+ *(.pdr)
+ *(.reginfo)
}
/* This is the MIPS specific mdebug section. */
}
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
int i;
- init_generic_irq();
-
switch (mips_machtype) {
case MACH_LASAT_100:
lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
*lasat_int_mask &= 0xffff;
break;
default:
- panic("init_IRQ: mips_machtype incorrect");
+ panic("arch_init_irq: mips_machtype incorrect");
}
/* Now safe to set the exception vector. */
memset(&s, 0, sizeof(s));
- s.flags = STD_COM_FLAGS|UPF_RESOURCES;
+ s.flags = STD_COM_FLAGS;
s.iotype = SERIAL_IO_MEM;
if (mips_machtype == MACH_LASAT_100) {
pgd = pgd_offset(current->mm, addr);
pmd = pmd_offset(pgd, addr);
pte = pte_offset(pmd, addr);
- paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
+ paddr = (CKSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
paddr |= (addr & ~PAGE_MASK);
return paddr;
* Copyright (C) 1994, 1995 Waldorf Electronics GmbH
* Copyright (C) 1998, 1999 Ralf Baechle
*/
-#include <net/checksum.h>
+#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/byteorder.h>
#include <asm/string.h>
#include <asm/uaccess.h>
+#include <net/checksum.h>
/*
* copy while checksumming, otherwise like csum_partial
{
int missing;
+ might_sleep();
missing = copy_from_user(dst, src, len);
if (missing) {
memset(dst + len - missing, 0, missing);
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
+ * Copyright (c) 1996, 1998, 1999, 2004 by Ralf Baechle
* Copyright (c) 1999 Silicon Graphics, Inc.
*/
#include <asm/asm.h>
#include <asm/offset.h>
#include <asm/regdef.h>
-#include <asm/sgidefs.h>
#define EX(insn,reg,addr,handler) \
9: insn reg, addr; \
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 1996, 1998, 1999 by Ralf Baechle
+ * Copyright (c) 1996, 1998, 1999, 2004 by Ralf Baechle
* Copyright (c) 1999 Silicon Graphics, Inc.
*/
#include <asm/asm.h>
#include <asm/offset.h>
#include <asm/regdef.h>
-#include <asm/sgidefs.h>
#define EX(insn,reg,addr,handler) \
9: insn reg, addr; \
if (MIPSInst_FUNC(ir) != movc_op)
return SIGILL;
cond = fpucondbit[MIPSInst_RT(ir) >> 2];
- if (((ctx->fcr31 & cond) != 0) != ((MIPSInst_RT(ir) & 1) != 0))
- return 0;
- xcp->regs[MIPSInst_RD(ir)] = xcp->regs[MIPSInst_RS(ir)];
+ if (((ctx->fcr31 & cond) != 0) == ((MIPSInst_RT(ir) & 1) != 0))
+ xcp->regs[MIPSInst_RD(ir)] =
+ xcp->regs[MIPSInst_RS(ir)];
break;
#endif
do_IRQ(irq, regs);
}
-#ifdef CONFIG_KGDB
-extern void breakpoint(void);
-extern int remote_debug;
-#endif
-
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
int i;
irq_desc[i].handler = &atlas_irq_type;
spin_lock_init(&irq_desc[i].lock);
}
-
-#ifdef CONFIG_KGDB
- if (remote_debug) {
- set_debug_traps();
- breakpoint();
- }
-#endif
}
#endif
s.irq = ATLASINT_UART;
s.uartclk = ATLAS_BASE_BAUD * 16;
- s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | UPF_RESOURCES | ASYNC_AUTO_IRQ;
+ s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
s.iotype = SERIAL_IO_PORT;
s.regshift = 3;
extern int saa9730_kgdb_hook(int);
extern int saa9730_putDebugChar(char);
extern char saa9730_getDebugChar(void);
-
-int remote_debug = 0;
#endif
int prom_argc;
generic_putDebugChar (*s++);
}
- remote_debug = 1;
+ kgdb_enabled = 1;
/* Breakpoint is invoked after interrupts are initialised */
}
}
mdesc[1].base = 0x00001000;
mdesc[1].size = 0x000ef000;
-#if (CONFIG_MIPS_MALTA)
+#ifdef CONFIG_MIPS_MALTA
/*
* The area 0x000f0000-0x000fffff is allocated for BIOS memory by the
* south bridge and PCI access always forwarded to the ISA Bus and
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999, 2000 MIPS Technologies, Inc. All rights reserved.
*
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ *
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
#include <linux/init.h>
#include <asm/mips-boards/generic.h>
-#include <asm/pci_channel.h>
#include <asm/gt64120.h>
#include <asm/mips-boards/bonito64.h>
#include <asm/mips-boards/msc01_pci.h>
extern asmlinkage void mipsIRQ(void);
-#ifdef CONFIG_KGDB
-extern void breakpoint(void);
-extern void set_debug_traps(void);
-extern int remote_debug;
-#endif
-
static spinlock_t mips_irq_lock = SPIN_LOCK_UNLOCKED;
static inline int mips_pcibios_iack(void)
die("CoreHi interrupt", regs);
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
set_except_vector(0, mipsIRQ);
- init_generic_irq();
init_i8259_irqs();
-
-#ifdef CONFIG_KGDB
- if (remote_debug) {
- set_debug_traps();
- breakpoint();
- }
-#endif
}
-
-
#include <linux/pci.h>
#include <linux/tty.h>
+#ifdef CONFIG_MTD
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#endif
+
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
{ "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
};
+#ifdef CONFIG_MTD
+static struct mtd_partition malta_mtd_partitions[] = {
+ {
+ .name = "YAMON",
+ .offset = 0x0,
+ .size = 0x100000,
+ .mask_flags = MTD_WRITEABLE
+ },
+ {
+ .name = "User FS",
+ .offset = 0x100000,
+ .size = 0x2e0000
+ },
+ {
+ .name = "Board Config",
+ .offset = 0x3e0000,
+ .size = 0x020000,
+ .mask_flags = MTD_WRITEABLE
+ }
+};
+
+#define number_partitions (sizeof(malta_mtd_partitions)/sizeof(struct mtd_partition))
+#endif
+
const char *get_system_type(void)
{
return "MIPS Malta";
}
}
else
- panic ("Hardware DMA cache coherency not supported\n");
+ panic("Hardware DMA cache coherency not supported");
#endif
}
#ifdef CONFIG_DMA_COHERENT
else {
- panic ("Hardware DMA cache coherency not supported\n");
+ panic("Hardware DMA cache coherency not supported");
}
#endif
};
#endif
#endif
+
+#ifdef CONFIG_MTD
+ /*
+ * Support for MTD on Malta. Use the generic physmap driver
+ */
+ physmap_configure(0x1e000000, 0x400000, 4, NULL);
+ physmap_set_partitions(malta_mtd_partitions, number_partitions);
+#endif
+
mips_reboot_setup();
board_time_init = mips_time_init;
do_IRQ(SEADINT_UART1, regs);
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
/*
* Mask out all interrupt
/* Now safe to set the exception vector. */
set_except_vector(0, mipsIRQ);
- init_generic_irq();
mips_cpu_irq_init(0);
}
#endif
s.irq = SEADINT_UART0;
s.uartclk = SEAD_BASE_BAUD * 16;
- s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | UPF_RESOURCES | ASYNC_AUTO_IRQ;
+ s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
s.iotype = 0;
s.regshift = 3;
# Makefile for the Linux/MIPS-specific parts of the memory manager.
#
-obj-y += cache.o extable.o fault.o init.o pgtable.o
+obj-y += cache.o extable.o fault.o init.o pgtable.o \
+ tlbex.o
obj-$(CONFIG_MIPS32) += ioremap.o pgtable-32.o
obj-$(CONFIG_MIPS64) += pgtable-64.o
obj-$(CONFIG_CPU_RM7000) += tlbex32-r4k.o
obj-$(CONFIG_CPU_RM9000) += tlbex32-r4k.o
obj-$(CONFIG_CPU_R10000) += tlbex32-r4k.o
-obj-$(CONFIG_CPU_MIPS32) += tlbex32-r4k.o
+obj-$(CONFIG_CPU_MIPS32) += tlbex32-mips32.o
obj-$(CONFIG_CPU_MIPS64) += tlbex32-r4k.o
obj-$(CONFIG_CPU_SB1) += tlbex32-r4k.o
obj-$(CONFIG_CPU_TX39XX) += tlbex32-r3k.o
endif
ifdef CONFIG_MIPS64
-obj-$(CONFIG_CPU_R4300) += tlb64-glue-r4k.o tlbex64-r4k.o
-obj-$(CONFIG_CPU_R4X00) += tlb64-glue-r4k.o tlbex64-r4k.o
-obj-$(CONFIG_CPU_R5000) += tlb64-glue-r4k.o tlbex64-r4k.o
-obj-$(CONFIG_CPU_NEVADA) += tlb64-glue-r4k.o tlbex64-r4k.o
-obj-$(CONFIG_CPU_R5432) += tlb64-glue-r4k.o tlbex64-r4k.o
-obj-$(CONFIG_CPU_RM7000) += tlb64-glue-r4k.o tlbex64-r4k.o
-obj-$(CONFIG_CPU_RM9000) += tlb64-glue-r4k.o tlbex64-r4k.o
-obj-$(CONFIG_CPU_R10000) += tlb64-glue-r4k.o tlbex64-r4k.o
-obj-$(CONFIG_CPU_SB1) += tlb64-glue-sb1.o tlbex64-r4k.o
-obj-$(CONFIG_CPU_MIPS64) += tlb64-glue-r4k.o tlbex64-r4k.o
+obj-$(CONFIG_CPU_R4300) += tlb64-glue-r4k.o
+obj-$(CONFIG_CPU_R4X00) += tlb64-glue-r4k.o
+obj-$(CONFIG_CPU_R5000) += tlb64-glue-r4k.o
+obj-$(CONFIG_CPU_NEVADA) += tlb64-glue-r4k.o
+obj-$(CONFIG_CPU_R5432) += tlb64-glue-r4k.o
+obj-$(CONFIG_CPU_RM7000) += tlb64-glue-r4k.o
+obj-$(CONFIG_CPU_RM9000) += tlb64-glue-r4k.o
+obj-$(CONFIG_CPU_R10000) += tlb64-glue-r4k.o
+obj-$(CONFIG_CPU_SB1) += tlb64-glue-sb1.o
+obj-$(CONFIG_CPU_MIPS64) += tlb64-glue-r4k.o
endif
* Tx39XX R4k style caches added. HK
* Copyright (C) 1998, 1999, 2000 Harald Koerfgen
* Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- * Copyright (C) 2001 Maciej W. Rozycki
+ * Copyright (C) 2001, 2004 Maciej W. Rozycki
*/
#include <linux/init.h>
#include <linux/kernel.h>
flush_data_cache_page = r3k_flush_data_cache_page;
_dma_cache_wback_inv = r3k_dma_cache_wback_inv;
+ _dma_cache_wback = r3k_dma_cache_wback_inv;
+ _dma_cache_inv = r3k_dma_cache_wback_inv;
printk("Primary instruction cache %ldkB, linesize %ld bytes.\n",
icache_size >> 10, icache_lsize);
#define R4600_HIT_CACHEOP_WAR_IMPL \
do { \
if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) \
- *(volatile unsigned long *)KSEG1; \
+ *(volatile unsigned long *)CKSEG1; \
if (R4600_V1_HIT_CACHEOP_WAR) \
__asm__ __volatile__("nop;nop;nop;nop"); \
} while (0)
static void (* r4k_blast_dcache)(void);
-static void r4k_blast_dcache_setup(void)
+static inline void r4k_blast_dcache_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
r4k_blast_scache = blast_scache128;
}
+/*
+ * This is former mm's flush_cache_all() which really should be
+ * flush_cache_vunmap these days ...
+ */
+static inline void local_r4k_flush_cache_all(void * args)
+{
+ r4k_blast_dcache();
+ r4k_blast_icache();
+}
+
static void r4k_flush_cache_all(void)
{
if (!cpu_has_dc_aliases)
return;
- r4k_blast_dcache();
- r4k_blast_icache();
+ on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
}
-static void r4k___flush_cache_all(void)
+static inline void local_r4k___flush_cache_all(void * args)
{
r4k_blast_dcache();
r4k_blast_icache();
}
}
-static void r4k_flush_cache_range(struct vm_area_struct *vma,
- unsigned long start, unsigned long end)
+static void r4k___flush_cache_all(void)
{
+ on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
+}
+
+static inline void local_r4k_flush_cache_range(void * args)
+{
+ struct vm_area_struct *vma = args;
int exec;
if (!(cpu_context(smp_processor_id(), vma->vm_mm)))
r4k_blast_icache();
}
-static void r4k_flush_cache_mm(struct mm_struct *mm)
+static void r4k_flush_cache_range(struct vm_area_struct *vma,
+ unsigned long start, unsigned long end)
{
+ on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
+}
+
+static inline void local_r4k_flush_cache_mm(void * args)
+{
+ struct mm_struct *mm = args;
+
if (!cpu_has_dc_aliases)
return;
r4k_blast_scache();
}
-static void r4k_flush_cache_page(struct vm_area_struct *vma,
- unsigned long page)
+static void r4k_flush_cache_mm(struct mm_struct *mm)
+{
+ on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
+}
+
+struct flush_cache_page_args {
+ struct vm_area_struct *vma;
+ unsigned long page;
+};
+
+static inline void local_r4k_flush_cache_page(void *args)
{
+ struct flush_cache_page_args *fcp_args = args;
+ struct vm_area_struct *vma = fcp_args->vma;
+ unsigned long page = fcp_args->page;
int exec = vma->vm_flags & VM_EXEC;
struct mm_struct *mm = vma->vm_mm;
pgd_t *pgdp;
}
}
+static void r4k_flush_cache_page(struct vm_area_struct *vma,
+ unsigned long page)
+{
+ struct flush_cache_page_args args;
+
+ args.vma = vma;
+ args.page = page;
+
+ on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
+}
+
+static inline void local_r4k_flush_data_cache_page(void * addr)
+{
+ r4k_blast_dcache_page((unsigned long) addr);
+}
+
static void r4k_flush_data_cache_page(unsigned long addr)
{
- r4k_blast_dcache_page(addr);
+ on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
}
-static void r4k_flush_icache_range(unsigned long start, unsigned long end)
+struct flush_icache_range_args {
+ unsigned long start;
+ unsigned long end;
+};
+
+static inline void local_r4k_flush_icache_range(void *args)
{
+ struct flush_icache_range_args *fir_args = args;
unsigned long dc_lsize = current_cpu_data.dcache.linesz;
+ unsigned long ic_lsize = current_cpu_data.icache.linesz;
+ unsigned long start = fir_args->start;
+ unsigned long end = fir_args->end;
unsigned long addr, aend;
if (!cpu_has_ic_fills_f_dc) {
if (end - start > icache_size)
r4k_blast_icache();
else {
- addr = start & ~(dc_lsize - 1);
- aend = (end - 1) & ~(dc_lsize - 1);
+ addr = start & ~(ic_lsize - 1);
+ aend = (end - 1) & ~(ic_lsize - 1);
while (1) {
/* Hit_Invalidate_I */
protected_flush_icache_line(addr);
if (addr == aend)
break;
- addr += dc_lsize;
+ addr += ic_lsize;
}
}
}
+static void r4k_flush_icache_range(unsigned long start, unsigned long end)
+{
+ struct flush_icache_range_args args;
+
+ args.start = start;
+ args.end = end;
+
+ on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
+}
+
/*
* Ok, this seriously sucks. We use them to flush a user page but don't
* know the virtual address, so we have to blast away the whole icache
* least know the kernel address of the page so we can flush it
* selectivly.
*/
-static void r4k_flush_icache_page(struct vm_area_struct *vma, struct page *page)
+
+struct flush_icache_page_args {
+ struct vm_area_struct *vma;
+ struct page *page;
+};
+
+static inline void local_r4k_flush_icache_page(void *args)
{
- /*
- * If there's no context yet, or the page isn't executable, no icache
- * flush is needed.
- */
- if (!(vma->vm_flags & VM_EXEC))
- return;
+ struct flush_icache_page_args *fip_args = args;
+ struct vm_area_struct *vma = fip_args->vma;
+ struct page *page = fip_args->page;
/*
* Tricky ... Because we don't know the virtual address we've got the
r4k_blast_icache();
}
+static void r4k_flush_icache_page(struct vm_area_struct *vma,
+ struct page *page)
+{
+ struct flush_icache_page_args args;
+
+ /*
+ * If there's no context yet, or the page isn't executable, no I-cache
+ * flush is needed.
+ */
+ if (!(vma->vm_flags & VM_EXEC))
+ return;
+
+ args.vma = vma;
+ args.page = page;
+
+ on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
+}
+
+
#ifdef CONFIG_DMA_NONCOHERENT
static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
* very much about what happens in that case. Usually a segmentation
* fault will dump the process later on anyway ...
*/
-static void r4k_flush_cache_sigtramp(unsigned long addr)
+static void local_r4k_flush_cache_sigtramp(void * arg)
{
unsigned long ic_lsize = current_cpu_data.icache.linesz;
unsigned long dc_lsize = current_cpu_data.dcache.linesz;
+ unsigned long addr = (unsigned long) arg;
R4600_HIT_CACHEOP_WAR_IMPL;
protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
".set push\n\t"
".set noat\n\t"
".set mips3\n\t"
-#if CONFIG_MIPS32
+#ifdef CONFIG_MIPS32
"la $at,1f\n\t"
#endif
-#if CONFIG_MIPS64
+#ifdef CONFIG_MIPS64
"dla $at,1f\n\t"
#endif
"cache %0,($at)\n\t"
__asm__ __volatile__ ("sync");
}
+static void r4k_flush_cache_sigtramp(unsigned long addr)
+{
+ on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
+}
+
static void r4k_flush_icache_all(void)
{
if (cpu_has_vtag_icache)
cpu_has_vtag_icache ? "virtually tagged" : "physically tagged",
way_string[c->icache.ways], c->icache.linesz);
- printk("Primary data cache %ldkB %s, linesize %d bytes.\n",
+ printk("Primary data cache %ldkB, %s, linesize %d bytes.\n",
dcache_size >> 10, way_string[c->dcache.ways], c->dcache.linesz);
}
case CPU_R4000MC:
case CPU_R4400SC:
case CPU_R4400MC:
- probe_scache_kseg1 = (probe_func_t) (KSEG1ADDR(&probe_scache));
+ probe_scache_kseg1 = (probe_func_t) (CKSEG1ADDR(&probe_scache));
sc_present = probe_scache_kseg1(config);
if (sc_present)
c->options |= MIPS_CPU_CACHE_CDEX_S;
*/
#include <linux/config.h>
#include <linux/init.h>
-#include <asm/mmu_context.h>
+
+#include <asm/asm.h>
#include <asm/bootinfo.h>
#include <asm/cacheops.h>
#include <asm/cpu.h>
+#include <asm/mipsregs.h>
+#include <asm/mmu_context.h>
#include <asm/uaccess.h>
extern void sb1_dma_init(void);
static unsigned long icache_size;
static unsigned long dcache_size;
-static unsigned long icache_line_size;
-static unsigned long dcache_line_size;
+static unsigned short icache_line_size;
+static unsigned short dcache_line_size;
static unsigned int icache_index_mask;
static unsigned int dcache_index_mask;
-static unsigned long icache_assoc;
-static unsigned long dcache_assoc;
+static unsigned short icache_assoc;
+static unsigned short dcache_assoc;
-static unsigned int icache_sets;
-static unsigned int dcache_sets;
+static unsigned short icache_sets;
+static unsigned short dcache_sets;
static unsigned int icache_range_cutoff;
static unsigned int dcache_range_cutoff;
* 9:7 Dcache Associativity
*/
+static char *way_string[] = {
+ "direct mapped", "2-way", "3-way", "4-way",
+ "5-way", "6-way", "7-way", "8-way",
+};
+
static __init void probe_cache_sizes(void)
{
u32 config1;
*/
icache_range_cutoff = icache_sets * icache_line_size;
dcache_range_cutoff = (dcache_sets / 2) * icache_line_size;
+
+ printk("Primary instruction cache %ldkB, %s, linesize %d bytes.\n",
+ icache_size >> 10, way_string[icache_assoc - 1],
+ icache_line_size);
+ printk("Primary data cache %ldkB, %s, linesize %d bytes.\n",
+ dcache_size >> 10, way_string[dcache_assoc - 1],
+ dcache_line_size);
}
/*
* before subsequent instruction fetch.
*/
__asm__ __volatile__(
+ ".set push \n"
" .set noat \n"
" .set noreorder \n"
- " .set mips3\n\t \n"
- " la $1, 1f \n"
- " mtc0 $1, $14 \n"
+ " .set mips3 \n"
+ " " STR(PTR_LA) " $1, 1f \n"
+ " " STR(MTC0) " $1, $14 \n"
" eret \n"
- "1: .set mips0\n\t \n"
- " .set at \n"
- " .set reorder"
+ "1: .set pop"
:
:
: "memory");
current_cpu_data.icache.waybit = 0;
current_cpu_data.dcache.waybit = 0;
- printk("Primary instruction cache %ldkb, linesize %d bytes\n",
+ printk("Primary instruction cache %ldkB, linesize %d bytes\n",
icache_size >> 10, current_cpu_data.icache.linesz);
- printk("Primary data cache %ldkb, linesize %d bytes\n",
+ printk("Primary data cache %ldkB, linesize %d bytes\n",
dcache_size >> 10, current_cpu_data.dcache.linesz);
build_clear_page();
return error;
}
+/*
+ * Allow physical addresses to be fixed up to help 36 bit peripherals.
+ */
+phys_t __attribute__ ((weak))
+fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+{
+ return phys_addr;
+}
+
/*
* Generic mapping function (not visible outside):
*/
* caller shouldn't need to know that small detail.
*/
-#define IS_LOW512(addr) (!((phys_t)(addr) & ~0x1fffffffUL))
+#define IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL))
void * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags)
{
phys_t last_addr;
void * addr;
+ phys_addr = fixup_bigphys_addr(phys_addr, size);
+
/* Don't allow wraparound or zero size */
last_addr = phys_addr + size - 1;
if (!size || last_addr < phys_addr)
#define IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == KSEG1)
-void __iounmap(void *addr)
+void __iounmap(volatile void __iomem *addr)
{
struct vm_struct *p;
if (IS_KSEG1(addr))
return;
- vfree((void *) (PAGE_MASK & (unsigned long) addr));
- p = remove_vm_area((void *) (PAGE_MASK & (unsigned long) addr));
+ p = remove_vm_area((void *) (PAGE_MASK & (unsigned long __force) addr));
if (!p) {
printk(KERN_ERR "iounmap: bad address %p\n", addr);
return;
emit_instruction(mi);
}
-static void __build_store_reg(int reg)
+static void __init __build_store_reg(int reg)
{
union mips_instruction mi;
unsigned int width;
case CPU_R10000:
case CPU_R12000:
pref_src_mode = Pref_LoadStreamed;
- pref_dst_mode = Pref_StoreRetained;
+ pref_dst_mode = Pref_StoreStreamed;
break;
default:
void __init pagetable_init(void)
{
- pmd_t *pmd;
- pte_t *pte;
- int i;
-
/* Initialize the entire pgd. */
pgd_init((unsigned long)swapper_pg_dir);
pmd_init((unsigned long)invalid_pmd_table, (unsigned long)invalid_pte_table);
memset((void *)invalid_pte_table, 0, sizeof(pte_t) * PTRS_PER_PTE);
-
- memset((void *)kptbl, 0, PAGE_SIZE << PGD_ORDER);
- memset((void *)kpmdtbl, 0, PAGE_SIZE);
- set_pgd(swapper_pg_dir, __pgd((unsigned long)kpmdtbl));
-
- /*
- * The 64-bit kernel uses a flat pagetable for it's kernel mappings ...
- */
- pmd = kpmdtbl;
- pte = kptbl;
- i = 0;
- while (i < (1 << PGD_ORDER)) {
- pmd_val(*pmd) = (unsigned long)pte;
- pte += PTRS_PER_PTE;
- pmd++;
- i++;
- }
}
#include <asm/system.h>
#include <asm/mmu_context.h>
-extern void except_vec0_generic(void);
-extern void except_vec0_r4000(void);
-extern void except_vec1_generic(void);
-extern void except_vec1_r10k(void);
+extern void build_tlb_refill_handler(void);
#define NTLB_ENTRIES 64
#define NTLB_ENTRIES_HALF 32
idx = read_c0_index();
write_c0_entrylo0(0);
write_c0_entrylo1(0);
- write_c0_entryhi(KSEG0);
+ write_c0_entryhi(CKSEG0);
if(idx < 0)
continue;
tlb_write_indexed();
idx = read_c0_index();
write_c0_entrylo0(0);
write_c0_entrylo1(0);
- write_c0_entryhi(KSEG0 + (idx << (PAGE_SHIFT+1)));
+ write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT+1)));
if (idx < 0)
continue;
tlb_write_indexed();
idx = read_c0_index();
write_c0_entrylo0(0);
write_c0_entrylo1(0);
- write_c0_entryhi(KSEG0);
+ write_c0_entryhi(CKSEG0);
if (idx < 0)
goto finish;
tlb_write_indexed();
write_c0_entrylo1(0);
if (idx >= 0) {
/* Make sure all entries differ. */
- write_c0_entryhi(KSEG0+(idx<<(PAGE_SHIFT+1)));
+ write_c0_entryhi(CKSEG0+(idx<<(PAGE_SHIFT+1)));
tlb_write_indexed();
}
write_c0_entryhi(oldpid);
/* Did I tell you that ARC SUCKS? */
-#ifdef CONFIG_MIPS32
- memcpy((void *)KSEG0, &except_vec0_r4000, 0x80);
- memcpy((void *)(KSEG0 + 0x080), &except_vec1_generic, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x100);
-#endif
-#ifdef CONFIG_MIPS64
- memcpy((void *)(CKSEG0 + 0x000), &except_vec0_generic, 0x80);
- memcpy((void *)(CKSEG0 + 0x080), except_vec1_r10k, 0x80);
- flush_icache_range(CKSEG0 + 0x80, CKSEG0 + 0x100);
-#endif
+ build_tlb_refill_handler();
}
#undef DEBUG_TLB
-extern char except_vec0_r2300;
+extern void build_tlb_refill_handler(void);
/* CP0 hazard avoidance. */
#define BARRIER \
void __init tlb_init(void)
{
local_flush_tlb_all();
- memcpy((void *)KSEG0, &except_vec0_r2300, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x80);
+
+ build_tlb_refill_handler();
}
#include <asm/pgtable.h>
#include <asm/system.h>
-extern void except_vec0_generic(void);
-extern void except_vec0_nevada(void);
-extern void except_vec0_r4000(void);
-extern void except_vec0_r4600(void);
-extern void except_vec1_generic(void);
-extern void except_vec1_r4k(void);
+extern void build_tlb_refill_handler(void);
/* CP0 hazard avoidance. */
#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
idx = read_c0_index();
ptep = pte_offset_map(pmdp, address);
- write_c0_entrylo0(pte_val(*ptep++) >> 6);
- write_c0_entrylo1(pte_val(*ptep) >> 6);
+ #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+ write_c0_entrylo0(ptep->pte_high);
+ ptep++;
+ write_c0_entrylo1(ptep->pte_high);
+#else
+ write_c0_entrylo0(pte_val(*ptep++) >> 6);
+ write_c0_entrylo1(pte_val(*ptep) >> 6);
+#endif
write_c0_entryhi(address | pid);
mtc0_tlbw_hazard();
if (idx < 0)
temp_tlb_entry = current_cpu_data.tlbsize - 1;
local_flush_tlb_all();
-#ifdef CONFIG_MIPS32
- if (current_cpu_data.cputype == CPU_NEVADA)
- memcpy((void *)KSEG0, &except_vec0_nevada, 0x80);
- else if (current_cpu_data.cputype == CPU_R4600)
- memcpy((void *)KSEG0, &except_vec0_r4600, 0x80);
- else
- memcpy((void *)KSEG0, &except_vec0_r4000, 0x80);
- memcpy((void *)(KSEG0 + 0x080), &except_vec1_generic, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x100);
-#endif
-#ifdef CONFIG_MIPS64
- memcpy((void *)(CKSEG0 + 0x00), &except_vec0_generic, 0x80);
- memcpy((void *)(CKSEG0 + 0x80), except_vec1_r4k, 0x80);
- flush_icache_range(CKSEG0 + 0x80, CKSEG0 + 0x100);
-#endif
+ build_tlb_refill_handler();
}
#include <asm/pgtable.h>
#include <asm/system.h>
-extern void except_vec0_generic(void);
-extern void except_vec1_r8k(void);
+extern void build_tlb_refill_handler(void);
#define TFP_TLB_SIZE 384
#define TFP_TLB_SET_SHIFT 7
local_flush_tlb_all();
- memcpy((void *)(CKSEG0 + 0x00), &except_vec0_generic, 0x80);
- memcpy((void *)(CKSEG0 + 0x80), except_vec1_r8k, 0x80);
- flush_icache_range(CKSEG0 + 0x80, CKSEG0 + 0x100);
+ build_tlb_refill_handler();
}
#include <asm/bootinfo.h>
#include <asm/cpu.h>
-#ifdef CONFIG_MIPS32
-extern void except_vec0_sb1(void);
-extern void except_vec1_generic(void);
-#endif
-#ifdef CONFIG_MIPS64
-extern void except_vec0_generic(void);
-extern void except_vec1_sb1(void);
-#endif
+extern void build_tlb_refill_handler(void);
#define UNIQUE_ENTRYHI(idx) (KSEG0 + ((idx) << (PAGE_SHIFT + 1)))
these entries, we just bump the asid. */
void local_flush_tlb_mm(struct mm_struct *mm)
{
- int cpu = smp_processor_id();
+ int cpu;
+
+ preempt_disable();
+
+ cpu = smp_processor_id();
+
if (cpu_context(cpu, mm) != 0) {
drop_mmu_context(mm, cpu);
}
+
+ preempt_enable();
}
/* Stolen from mips32 routines */
*/
sb1_sanitize_tlb();
-#ifdef CONFIG_MIPS32
- memcpy((void *)KSEG0, &except_vec0_sb1, 0x80);
- memcpy((void *)(KSEG0 + 0x080), &except_vec1_generic, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x100);
-#endif
-#ifdef CONFIG_MIPS64
- memcpy((void *)CKSEG0, &except_vec0_generic, 0x80);
- memcpy((void *)(CKSEG0 + 0x80), &except_vec1_sb1, 0x80);
- flush_icache_range(CKSEG0, CKSEG0 + 0x100);
-#endif
+ build_tlb_refill_handler();
}
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Synthesize TLB refill handlers at runtime.
+ *
+ * Copyright (C) 2004 by Thiemo Seufer
+ */
+
+#include <stdarg.h>
+
+#include <linux/config.h>
+#include <linux/mm.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/init.h>
+
+#include <asm/pgtable.h>
+#include <asm/cacheflush.h>
+#include <asm/cacheflush.h>
+#include <asm/mmu_context.h>
+#include <asm/inst.h>
+#include <asm/elf.h>
+#include <asm/smp.h>
+
+/* #define DEBUG_TLB */
+
+static __init int __attribute__((unused)) r45k_bvahwbug(void)
+{
+ /* XXX: We should probe for the presence of this bug, but we don't. */
+ return 0;
+}
+
+static __init int __attribute__((unused)) r4k_250MHZhwbug(void)
+{
+ /* XXX: We should probe for the presence of this bug, but we don't. */
+ return 0;
+}
+
+static __init int __attribute__((unused)) bcm1250_m3_war(void)
+{
+ return BCM1250_M3_WAR;
+}
+
+/*
+ * A little micro-assembler, intended for TLB refill handler
+ * synthesizing. It is intentionally kept simple, does only support
+ * a subset of instructions, and does not try to hide pipeline effects
+ * like branch delay slots.
+ */
+
+enum fields
+{
+ RS = 0x001,
+ RT = 0x002,
+ RD = 0x004,
+ RE = 0x008,
+ SIMM = 0x010,
+ UIMM = 0x020,
+ BIMM = 0x040,
+ JIMM = 0x080,
+ FUNC = 0x100,
+};
+
+#define OP_MASK 0x2f
+#define OP_SH 26
+#define RS_MASK 0x1f
+#define RS_SH 21
+#define RT_MASK 0x1f
+#define RT_SH 16
+#define RD_MASK 0x1f
+#define RD_SH 11
+#define RE_MASK 0x1f
+#define RE_SH 6
+#define IMM_MASK 0xffff
+#define IMM_SH 0
+#define JIMM_MASK 0x3ffffff
+#define JIMM_SH 0
+#define FUNC_MASK 0x2f
+#define FUNC_SH 0
+
+enum opcode {
+ insn_invalid,
+ insn_addu, insn_addiu, insn_and, insn_andi, insn_beq,
+ insn_bgez, insn_bgezl, insn_bltz, insn_bltzl, insn_bne,
+ insn_daddu, insn_daddiu, insn_dmfc0, insn_dmtc0,
+ insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32,
+ insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr, insn_ld,
+ insn_lui, insn_lw, insn_mfc0, insn_mtc0, insn_ori, insn_rfe,
+ insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw,
+ insn_tlbp, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori
+};
+
+struct insn {
+ enum opcode opcode;
+ u32 match;
+ enum fields fields;
+};
+
+/* This macro sets the non-variable bits of an instruction. */
+#define M(a, b, c, d, e, f) \
+ ((a) << OP_SH \
+ | (b) << RS_SH \
+ | (c) << RT_SH \
+ | (d) << RD_SH \
+ | (e) << RE_SH \
+ | (f) << FUNC_SH)
+
+static __initdata struct insn insn_table[] = {
+ { insn_addiu, M(addiu_op,0,0,0,0,0), RS | RT | SIMM },
+ { insn_addu, M(spec_op,0,0,0,0,addu_op), RS | RT | RD },
+ { insn_and, M(spec_op,0,0,0,0,and_op), RS | RT | RD },
+ { insn_andi, M(andi_op,0,0,0,0,0), RS | RT | UIMM },
+ { insn_beq, M(beq_op,0,0,0,0,0), RS | RT | BIMM },
+ { insn_bgez, M(bcond_op,0,bgez_op,0,0,0), RS | BIMM },
+ { insn_bgezl, M(bcond_op,0,bgezl_op,0,0,0), RS | BIMM },
+ { insn_bltz, M(bcond_op,0,bltz_op,0,0,0), RS | BIMM },
+ { insn_bltzl, M(bcond_op,0,bltzl_op,0,0,0), RS | BIMM },
+ { insn_bne, M(bne_op,0,0,0,0,0), RS | RT | BIMM },
+ { insn_daddiu, M(daddiu_op,0,0,0,0,0), RS | RT | SIMM },
+ { insn_daddu, M(spec_op,0,0,0,0,daddu_op), RS | RT | RD },
+ { insn_dmfc0, M(cop0_op,dmfc_op,0,0,0,0), RT | RD },
+ { insn_dmtc0, M(cop0_op,dmtc_op,0,0,0,0), RT | RD },
+ { insn_dsll, M(spec_op,0,0,0,0,dsll_op), RT | RD | RE },
+ { insn_dsll32, M(spec_op,0,0,0,0,dsll32_op), RT | RD | RE },
+ { insn_dsra, M(spec_op,0,0,0,0,dsra_op), RT | RD | RE },
+ { insn_dsrl, M(spec_op,0,0,0,0,dsrl_op), RT | RD | RE },
+ { insn_dsrl32, M(spec_op,0,0,0,0,dsrl32_op), RT | RD | RE },
+ { insn_dsubu, M(spec_op,0,0,0,0,dsubu_op), RS | RT | RD },
+ { insn_eret, M(cop0_op,cop_op,0,0,0,eret_op), 0 },
+ { insn_j, M(j_op,0,0,0,0,0), JIMM },
+ { insn_jal, M(jal_op,0,0,0,0,0), JIMM },
+ { insn_jr, M(spec_op,0,0,0,0,jr_op), RS },
+ { insn_ld, M(ld_op,0,0,0,0,0), RS | RT | SIMM },
+ { insn_lui, M(lui_op,0,0,0,0,0), RT | SIMM },
+ { insn_lw, M(lw_op,0,0,0,0,0), RS | RT | SIMM },
+ { insn_mfc0, M(cop0_op,mfc_op,0,0,0,0), RT | RD },
+ { insn_mtc0, M(cop0_op,mtc_op,0,0,0,0), RT | RD },
+ { insn_ori, M(ori_op,0,0,0,0,0), RS | RT | UIMM },
+ { insn_rfe, M(cop0_op,cop_op,0,0,0,rfe_op), 0 },
+ { insn_sd, M(sd_op,0,0,0,0,0), RS | RT | SIMM },
+ { insn_sll, M(spec_op,0,0,0,0,sll_op), RT | RD | RE },
+ { insn_sra, M(spec_op,0,0,0,0,sra_op), RT | RD | RE },
+ { insn_srl, M(spec_op,0,0,0,0,srl_op), RT | RD | RE },
+ { insn_subu, M(spec_op,0,0,0,0,subu_op), RS | RT | RD },
+ { insn_sw, M(sw_op,0,0,0,0,0), RS | RT | SIMM },
+ { insn_tlbp, M(cop0_op,cop_op,0,0,0,tlbp_op), 0 },
+ { insn_tlbwi, M(cop0_op,cop_op,0,0,0,tlbwi_op), 0 },
+ { insn_tlbwr, M(cop0_op,cop_op,0,0,0,tlbwr_op), 0 },
+ { insn_xor, M(spec_op,0,0,0,0,xor_op), RS | RT | RD },
+ { insn_xori, M(xori_op,0,0,0,0,0), RS | RT | UIMM },
+ { insn_invalid, 0, 0 }
+};
+
+#undef M
+
+static __init u32 build_rs(u32 arg)
+{
+ if (arg & ~RS_MASK)
+ printk(KERN_WARNING "TLB synthesizer field overflow\n");
+
+ return (arg & RS_MASK) << RS_SH;
+}
+
+static __init u32 build_rt(u32 arg)
+{
+ if (arg & ~RT_MASK)
+ printk(KERN_WARNING "TLB synthesizer field overflow\n");
+
+ return (arg & RT_MASK) << RT_SH;
+}
+
+static __init u32 build_rd(u32 arg)
+{
+ if (arg & ~RD_MASK)
+ printk(KERN_WARNING "TLB synthesizer field overflow\n");
+
+ return (arg & RD_MASK) << RD_SH;
+}
+
+static __init u32 build_re(u32 arg)
+{
+ if (arg & ~RE_MASK)
+ printk(KERN_WARNING "TLB synthesizer field overflow\n");
+
+ return (arg & RE_MASK) << RE_SH;
+}
+
+static __init u32 build_simm(s32 arg)
+{
+ if (arg > 0x7fff || arg < -0x8000)
+ printk(KERN_WARNING "TLB synthesizer field overflow\n");
+
+ return arg & 0xffff;
+}
+
+static __init u32 build_uimm(u32 arg)
+{
+ if (arg & ~IMM_MASK)
+ printk(KERN_WARNING "TLB synthesizer field overflow\n");
+
+ return arg & IMM_MASK;
+}
+
+static __init u32 build_bimm(s32 arg)
+{
+ if (arg > 0x1ffff || arg < -0x20000)
+ printk(KERN_WARNING "TLB synthesizer field overflow\n");
+
+ if (arg & 0x3)
+ printk(KERN_WARNING "Invalid TLB synthesizer branch target\n");
+
+ return ((arg < 0) ? (1 << 15) : 0) | ((arg >> 2) & 0x7fff);
+}
+
+static __init u32 build_jimm(u32 arg)
+{
+ if (arg & ~((JIMM_MASK) << 2))
+ printk(KERN_WARNING "TLB synthesizer field overflow\n");
+
+ return (arg >> 2) & JIMM_MASK;
+}
+
+static __init u32 build_func(u32 arg)
+{
+ if (arg & ~FUNC_MASK)
+ printk(KERN_WARNING "TLB synthesizer field overflow\n");
+
+ return arg & FUNC_MASK;
+}
+
+/*
+ * The order of opcode arguments is implicitly left to right,
+ * starting with RS and ending with FUNC or IMM.
+ */
+static void __init build_insn(u32 **buf, enum opcode opc, ...)
+{
+ struct insn *ip = NULL;
+ unsigned int i;
+ va_list ap;
+ u32 op;
+
+ for (i = 0; insn_table[i].opcode != insn_invalid; i++)
+ if (insn_table[i].opcode == opc) {
+ ip = &insn_table[i];
+ break;
+ }
+
+ if (!ip)
+ panic("Unsupported TLB synthesizer instruction %d", opc);
+
+ op = ip->match;
+ va_start(ap, opc);
+ if (ip->fields & RS) op |= build_rs(va_arg(ap, u32));
+ if (ip->fields & RT) op |= build_rt(va_arg(ap, u32));
+ if (ip->fields & RD) op |= build_rd(va_arg(ap, u32));
+ if (ip->fields & RE) op |= build_re(va_arg(ap, u32));
+ if (ip->fields & SIMM) op |= build_simm(va_arg(ap, s32));
+ if (ip->fields & UIMM) op |= build_uimm(va_arg(ap, u32));
+ if (ip->fields & BIMM) op |= build_bimm(va_arg(ap, s32));
+ if (ip->fields & JIMM) op |= build_jimm(va_arg(ap, u32));
+ if (ip->fields & FUNC) op |= build_func(va_arg(ap, u32));
+ va_end(ap);
+
+ **buf = op;
+ (*buf)++;
+}
+
+#define I_u1u2u3(op) \
+ static inline void i##op(u32 **buf, unsigned int a, \
+ unsigned int b, unsigned int c) \
+ { \
+ build_insn(buf, insn##op, a, b, c); \
+ }
+
+#define I_u2u1u3(op) \
+ static inline void i##op(u32 **buf, unsigned int a, \
+ unsigned int b, unsigned int c) \
+ { \
+ build_insn(buf, insn##op, b, a, c); \
+ }
+
+#define I_u3u1u2(op) \
+ static inline void i##op(u32 **buf, unsigned int a, \
+ unsigned int b, unsigned int c) \
+ { \
+ build_insn(buf, insn##op, b, c, a); \
+ }
+
+#define I_u1u2s3(op) \
+ static inline void i##op(u32 **buf, unsigned int a, \
+ unsigned int b, signed int c) \
+ { \
+ build_insn(buf, insn##op, a, b, c); \
+ }
+
+#define I_u2s3u1(op) \
+ static inline void i##op(u32 **buf, unsigned int a, \
+ signed int b, unsigned int c) \
+ { \
+ build_insn(buf, insn##op, c, a, b); \
+ }
+
+#define I_u2u1s3(op) \
+ static inline void i##op(u32 **buf, unsigned int a, \
+ unsigned int b, signed int c) \
+ { \
+ build_insn(buf, insn##op, b, a, c); \
+ }
+
+#define I_u1u2(op) \
+ static inline void i##op(u32 **buf, unsigned int a, \
+ unsigned int b) \
+ { \
+ build_insn(buf, insn##op, a, b); \
+ }
+
+#define I_u1s2(op) \
+ static inline void i##op(u32 **buf, unsigned int a, \
+ signed int b) \
+ { \
+ build_insn(buf, insn##op, a, b); \
+ }
+
+#define I_u1(op) \
+ static inline void i##op(u32 **buf, unsigned int a) \
+ { \
+ build_insn(buf, insn##op, a); \
+ }
+
+#define I_0(op) \
+ static inline void i##op(u32 **buf) \
+ { \
+ build_insn(buf, insn##op); \
+ }
+
+I_u2u1s3(_addiu);
+I_u3u1u2(_addu);
+I_u2u1u3(_andi);
+I_u3u1u2(_and);
+I_u1u2s3(_beq);
+I_u1s2(_bgez);
+I_u1s2(_bgezl);
+I_u1s2(_bltz);
+I_u1s2(_bltzl);
+I_u1u2s3(_bne);
+I_u1u2(_dmfc0);
+I_u1u2(_dmtc0);
+I_u2u1s3(_daddiu);
+I_u3u1u2(_daddu);
+I_u2u1u3(_dsll);
+I_u2u1u3(_dsll32);
+I_u2u1u3(_dsra);
+I_u2u1u3(_dsrl);
+I_u2u1u3(_dsrl32);
+I_u3u1u2(_dsubu);
+I_0(_eret);
+I_u1(_j);
+I_u1(_jal);
+I_u1(_jr);
+I_u2s3u1(_ld);
+I_u1s2(_lui);
+I_u2s3u1(_lw);
+I_u1u2(_mfc0);
+I_u1u2(_mtc0);
+I_u2u1u3(_ori);
+I_0(_rfe);
+I_u2s3u1(_sd);
+I_u2u1u3(_sll);
+I_u2u1u3(_sra);
+I_u2u1u3(_srl);
+I_u3u1u2(_subu);
+I_u2s3u1(_sw);
+I_0(_tlbp);
+I_0(_tlbwi);
+I_0(_tlbwr);
+I_u3u1u2(_xor)
+I_u2u1u3(_xori);
+
+/*
+ * handling labels
+ */
+
+enum label_id {
+ label_invalid,
+ label_second_part,
+ label_leave,
+ label_vmalloc,
+ label_vmalloc_done,
+ label_tlbwr_hazard,
+ label_split
+};
+
+struct label {
+ u32 *addr;
+ enum label_id lab;
+};
+
+static __init void build_label(struct label **lab, u32 *addr,
+ enum label_id l)
+{
+ (*lab)->addr = addr;
+ (*lab)->lab = l;
+ (*lab)++;
+}
+
+#define L_LA(lb) \
+ static inline void l##lb(struct label **lab, u32 *addr) \
+ { \
+ build_label(lab, addr, label##lb); \
+ }
+
+L_LA(_second_part)
+L_LA(_leave)
+L_LA(_vmalloc)
+L_LA(_vmalloc_done)
+L_LA(_tlbwr_hazard)
+L_LA(_split)
+
+/* convenience macros for instructions */
+#ifdef CONFIG_MIPS64
+# define i_LW(buf, rs, rt, off) i_ld(buf, rs, rt, off)
+# define i_SW(buf, rs, rt, off) i_sd(buf, rs, rt, off)
+# define i_SLL(buf, rs, rt, sh) i_dsll(buf, rs, rt, sh)
+# define i_SRA(buf, rs, rt, sh) i_dsra(buf, rs, rt, sh)
+# define i_SRL(buf, rs, rt, sh) i_dsrl(buf, rs, rt, sh)
+# define i_MFC0(buf, rt, rd) i_dmfc0(buf, rt, rd)
+# define i_MTC0(buf, rt, rd) i_dmtc0(buf, rt, rd)
+# define i_ADDIU(buf, rs, rt, val) i_daddiu(buf, rs, rt, val)
+# define i_ADDU(buf, rs, rt, rd) i_daddu(buf, rs, rt, rd)
+# define i_SUBU(buf, rs, rt, rd) i_dsubu(buf, rs, rt, rd)
+#else
+# define i_LW(buf, rs, rt, off) i_lw(buf, rs, rt, off)
+# define i_SW(buf, rs, rt, off) i_sw(buf, rs, rt, off)
+# define i_SLL(buf, rs, rt, sh) i_sll(buf, rs, rt, sh)
+# define i_SRA(buf, rs, rt, sh) i_sra(buf, rs, rt, sh)
+# define i_SRL(buf, rs, rt, sh) i_srl(buf, rs, rt, sh)
+# define i_MFC0(buf, rt, rd) i_mfc0(buf, rt, rd)
+# define i_MTC0(buf, rt, rd) i_mtc0(buf, rt, rd)
+# define i_ADDIU(buf, rs, rt, val) i_addiu(buf, rs, rt, val)
+# define i_ADDU(buf, rs, rt, rd) i_addu(buf, rs, rt, rd)
+# define i_SUBU(buf, rs, rt, rd) i_subu(buf, rs, rt, rd)
+#endif
+
+#define i_b(buf, off) i_beq(buf, 0, 0, off)
+#define i_bnez(buf, rs, off) i_bne(buf, rs, 0, off)
+#define i_move(buf, a, b) i_ADDU(buf, a, 0, b)
+#define i_nop(buf) i_sll(buf, 0, 0, 0)
+#define i_ssnop(buf) i_sll(buf, 0, 0, 1)
+#define i_ehb(buf) i_sll(buf, 0, 0, 3)
+
+#if CONFIG_MIPS64
+static __init int in_compat_space_p(long addr)
+{
+ /* Is this address in 32bit compat space? */
+ return (((addr) & 0xffffffff00000000) == 0xffffffff00000000);
+}
+
+static __init int rel_highest(long val)
+{
+ return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
+}
+
+static __init int rel_higher(long val)
+{
+ return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
+}
+#endif
+
+static __init int rel_hi(long val)
+{
+ return ((((val + 0x8000L) >> 16) & 0xffff) ^ 0x8000) - 0x8000;
+}
+
+static __init int rel_lo(long val)
+{
+ return ((val & 0xffff) ^ 0x8000) - 0x8000;
+}
+
+static __init void i_LA_mostly(u32 **buf, unsigned int rs, long addr)
+{
+#if CONFIG_MIPS64
+ if (!in_compat_space_p(addr)) {
+ i_lui(buf, rs, rel_highest(addr));
+ if (rel_higher(addr))
+ i_daddiu(buf, rs, rs, rel_higher(addr));
+ if (rel_hi(addr)) {
+ i_dsll(buf, rs, rs, 16);
+ i_daddiu(buf, rs, rs, rel_hi(addr));
+ i_dsll(buf, rs, rs, 16);
+ } else
+ i_dsll32(buf, rs, rs, 0);
+ } else
+#endif
+ i_lui(buf, rs, rel_hi(addr));
+}
+
+static __init void __attribute__((unused)) i_LA(u32 **buf, unsigned int rs,
+ long addr)
+{
+ i_LA_mostly(buf, rs, addr);
+ if (rel_lo(addr))
+ i_ADDIU(buf, rs, rs, rel_lo(addr));
+}
+
+/*
+ * handle relocations
+ */
+
+struct reloc {
+ u32 *addr;
+ unsigned int type;
+ enum label_id lab;
+};
+
+static __init void r_mips_pc16(struct reloc **rel, u32 *addr,
+ enum label_id l)
+{
+ (*rel)->addr = addr;
+ (*rel)->type = R_MIPS_PC16;
+ (*rel)->lab = l;
+ (*rel)++;
+}
+
+static inline void __resolve_relocs(struct reloc *rel, struct label *lab)
+{
+ long laddr = (long)lab->addr;
+ long raddr = (long)rel->addr;
+
+ switch (rel->type) {
+ case R_MIPS_PC16:
+ *rel->addr |= build_bimm(laddr - (raddr + 4));
+ break;
+
+ default:
+ panic("Unsupported TLB synthesizer relocation %d",
+ rel->type);
+ }
+}
+
+static __init void resolve_relocs(struct reloc *rel, struct label *lab)
+{
+ struct label *l;
+
+ for (; rel->lab != label_invalid; rel++)
+ for (l = lab; l->lab != label_invalid; l++)
+ if (rel->lab == l->lab)
+ __resolve_relocs(rel, l);
+}
+
+static __init void copy_handler(struct reloc *rel, struct label *lab,
+ u32 *first, u32 *end, u32* target)
+{
+ long off = (long)(target - first);
+
+ memcpy(target, first, (end - first) * sizeof(u32));
+
+ for (; rel->lab != label_invalid; rel++)
+ if (rel->addr >= first && rel->addr < end)
+ rel->addr += off;
+
+ for (; lab->lab != label_invalid; lab++)
+ if (lab->addr >= first && lab->addr < end)
+ lab->addr += off;
+}
+
+static __init int __attribute__((unused)) insn_has_bdelay(struct reloc *rel,
+ u32 *addr)
+{
+ for (; rel->lab != label_invalid; rel++) {
+ if (rel->addr == addr
+ && (rel->type == R_MIPS_PC16
+ || rel->type == R_MIPS_26))
+ return 1;
+ }
+
+ return 0;
+}
+
+/* convenience functions for labeled branches */
+static void __attribute__((unused)) il_bltz(u32 **p, struct reloc **r,
+ unsigned int reg, enum label_id l)
+{
+ r_mips_pc16(r, *p, l);
+ i_bltz(p, reg, 0);
+}
+
+static void __attribute__((unused)) il_b(u32 **p, struct reloc **r,
+ enum label_id l)
+{
+ r_mips_pc16(r, *p, l);
+ i_b(p, 0);
+}
+
+static void il_bnez(u32 **p, struct reloc **r, unsigned int reg,
+ enum label_id l)
+{
+ r_mips_pc16(r, *p, l);
+ i_bnez(p, reg, 0);
+}
+
+static void il_bgezl(u32 **p, struct reloc **r, unsigned int reg,
+ enum label_id l)
+{
+ r_mips_pc16(r, *p, l);
+ i_bgezl(p, reg, 0);
+}
+
+/* The only registers allowed in TLB handlers. */
+#define K0 26
+#define K1 27
+
+/* Some CP0 registers */
+#define C0_INDEX 0
+#define C0_ENTRYLO0 2
+#define C0_ENTRYLO1 3
+#define C0_CONTEXT 4
+#define C0_BADVADDR 8
+#define C0_ENTRYHI 10
+#define C0_EPC 14
+#define C0_XCONTEXT 20
+
+#ifdef CONFIG_MIPS64
+# define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_XCONTEXT)
+#else
+# define GET_CONTEXT(buf, reg) i_MFC0(buf, reg, C0_CONTEXT)
+#endif
+
+/* The worst case length of the handler is around 18 instructions for
+ * R3000-style TLBs and up to 63 instructions for R4000-style TLBs.
+ * Maximum space available is 32 instructions for R3000 and 64
+ * instructions for R4000.
+ *
+ * We deliberately chose a buffer size of 128, so we won't scribble
+ * over anything important on overflow before we panic.
+ */
+static __initdata u32 tlb_handler[128];
+
+/* simply assume worst case size for labels and relocs */
+static __initdata struct label labels[128];
+static __initdata struct reloc relocs[128];
+
+#ifdef CONFIG_MIPS32
+/*
+ * The R3000 TLB handler is simple.
+ */
+static void __init build_r3000_tlb_refill_handler(void)
+{
+ long pgdc = (long)pgd_current;
+ u32 *p;
+
+ memset(tlb_handler, 0, sizeof(tlb_handler));
+ p = tlb_handler;
+
+ i_mfc0(&p, K0, C0_BADVADDR);
+ i_lui(&p, K1, rel_hi(pgdc)); /* cp0 delay */
+ i_lw(&p, K1, rel_lo(pgdc), K1);
+ i_srl(&p, K0, K0, 22); /* load delay */
+ i_sll(&p, K0, K0, 2);
+ i_addu(&p, K1, K1, K0);
+ i_mfc0(&p, K0, C0_CONTEXT);
+ i_lw(&p, K1, 0, K1); /* cp0 delay */
+ i_andi(&p, K0, K0, 0xffc); /* load delay */
+ i_addu(&p, K1, K1, K0);
+ i_lw(&p, K0, 0, K1);
+ i_nop(&p); /* load delay */
+ i_mtc0(&p, K0, C0_ENTRYLO0);
+ i_mfc0(&p, K1, C0_EPC); /* cp0 delay */
+ i_tlbwr(&p); /* cp0 delay */
+ i_jr(&p, K1);
+ i_rfe(&p); /* branch delay */
+
+ if (p > tlb_handler + 32)
+ panic("TLB refill handler space exceeded");
+
+ printk("Synthesized TLB handler (%u instructions).\n",
+ p - tlb_handler);
+#ifdef DEBUG_TLB
+ {
+ int i;
+ for (i = 0; i < (p - tlb_handler); i++)
+ printk("%08x\n", tlb_handler[i]);
+ }
+#endif
+
+ memcpy((void *)CAC_BASE, tlb_handler, 0x80);
+ flush_icache_range(CAC_BASE, CAC_BASE + 0x80);
+}
+#endif /* CONFIG_MIPS32 */
+
+/*
+ * The R4000 TLB handler is much more complicated. We have two
+ * consecutive handler areas with 32 instructions space each.
+ * Since they aren't used at the same time, we can overflow in the
+ * other one.To keep things simple, we first assume linear space,
+ * then we relocate it to the final handler layout as needed.
+ */
+static __initdata u32 final_handler[64];
+
+/*
+ * Hazards
+ *
+ * From the IDT errata for the QED RM5230 (Nevada), processor revision 1.0:
+ * 2. A timing hazard exists for the TLBP instruction.
+ *
+ * stalling_instruction
+ * TLBP
+ *
+ * The JTLB is being read for the TLBP throughout the stall generated by the
+ * previous instruction. This is not really correct as the stalling instruction
+ * can modify the address used to access the JTLB. The failure symptom is that
+ * the TLBP instruction will use an address created for the stalling instruction
+ * and not the address held in C0_ENHI and thus report the wrong results.
+ *
+ * The software work-around is to not allow the instruction preceding the TLBP
+ * to stall - make it an NOP or some other instruction guaranteed not to stall.
+ *
+ * Errata 2 will not be fixed. This errata is also on the R5000.
+ *
+ * As if we MIPS hackers wouldn't know how to nop pipelines happy ...
+ */
+static __init void __attribute__((unused)) build_tlb_probe_entry(u32 **p)
+{
+ switch (current_cpu_data.cputype) {
+ case CPU_R5000:
+ case CPU_R5000A:
+ case CPU_NEVADA:
+ i_nop(p);
+ i_tlbp(p);
+ break;
+
+ default:
+ i_tlbp(p);
+ break;
+ }
+}
+
+/*
+ * Write random TLB entry, and care about the hazards from the
+ * preceeding mtc0 and for the following eret.
+ */
+static __init void build_tlb_write_random_entry(u32 **p, struct label **l,
+ struct reloc **r)
+{
+ switch (current_cpu_data.cputype) {
+ case CPU_R4000PC:
+ case CPU_R4000SC:
+ case CPU_R4000MC:
+ case CPU_R4400PC:
+ case CPU_R4400SC:
+ case CPU_R4400MC:
+ /*
+ * This branch uses up a mtc0 hazard nop slot and saves
+ * two nops after the tlbwr.
+ */
+ il_bgezl(p, r, 0, label_tlbwr_hazard);
+ i_tlbwr(p);
+ l_tlbwr_hazard(l, *p);
+ i_nop(p);
+ break;
+
+ case CPU_R4600:
+ case CPU_R4700:
+ case CPU_R5000:
+ case CPU_R5000A:
+ case CPU_5KC:
+ case CPU_AU1000:
+ case CPU_AU1100:
+ case CPU_AU1500:
+ case CPU_AU1550:
+ i_nop(p);
+ i_tlbwr(p);
+ break;
+
+ case CPU_R10000:
+ case CPU_R12000:
+ case CPU_4KC:
+ case CPU_SB1:
+ case CPU_4KSC:
+ case CPU_20KC:
+ case CPU_25KF:
+ i_tlbwr(p);
+ break;
+
+ case CPU_NEVADA:
+ i_nop(p); /* QED specifies 2 nops hazard */
+ /*
+ * This branch uses up a mtc0 hazard nop slot and saves
+ * a nop after the tlbwr.
+ */
+ il_bgezl(p, r, 0, label_tlbwr_hazard);
+ i_tlbwr(p);
+ l_tlbwr_hazard(l, *p);
+ break;
+
+ case CPU_4KEC:
+ case CPU_24K:
+ i_ehb(p);
+ i_tlbwr(p);
+ break;
+
+ case CPU_RM9000:
+ /*
+ * When the JTLB is updated by tlbwi or tlbwr, a subsequent
+ * use of the JTLB for instructions should not occur for 4
+ * cpu cycles and use for data translations should not occur
+ * for 3 cpu cycles.
+ */
+ i_ssnop(p);
+ i_ssnop(p);
+ i_ssnop(p);
+ i_ssnop(p);
+ i_tlbwr(p);
+ i_ssnop(p);
+ i_ssnop(p);
+ i_ssnop(p);
+ i_ssnop(p);
+ break;
+
+ default:
+ panic("No TLB refill handler yet (CPU type: %d)",
+ current_cpu_data.cputype);
+ break;
+ }
+}
+
+#if CONFIG_MIPS64
+/*
+ * TMP and PTR are scratch.
+ * TMP will be clobbered, PTR will hold the pmd entry.
+ */
+static __init void
+build_get_pmde64(u32 **p, struct label **l, struct reloc **r,
+ unsigned int tmp, unsigned int ptr)
+{
+ long pgdc = (long)pgd_current;
+
+ /*
+ * The vmalloc handling is not in the hotpath.
+ */
+ i_dmfc0(p, tmp, C0_BADVADDR);
+ il_bltz(p, r, tmp, label_vmalloc);
+ /* No i_nop needed here, since the next insn doesn't touch TMP. */
+
+# ifdef CONFIG_SMP
+ /*
+ * 64 bit SMP has the lower part of &pgd_current[smp_processor_id()]
+ * stored in CONTEXT.
+ */
+ if (in_compat_space_p(pgdc)) {
+ i_dmfc0(p, ptr, C0_CONTEXT);
+ i_dsra(p, ptr, ptr, 23);
+ } else {
+ i_dmfc0(p, ptr, C0_CONTEXT);
+ i_lui(p, tmp, rel_highest(pgdc));
+ i_dsll(p, ptr, ptr, 9);
+ i_daddiu(p, tmp, tmp, rel_higher(pgdc));
+ i_dsrl32(p, ptr, ptr, 0);
+ i_and(p, ptr, ptr, tmp);
+ i_dmfc0(p, tmp, C0_BADVADDR);
+ }
+ i_ld(p, ptr, 0, ptr);
+# else
+ i_LA_mostly(p, ptr, pgdc);
+ i_ld(p, ptr, rel_lo(pgdc), ptr);
+# endif
+
+ l_vmalloc_done(l, *p);
+ i_dsrl(p, tmp, tmp, PGDIR_SHIFT-3); /* get pgd offset in bytes */
+ i_andi(p, tmp, tmp, (PTRS_PER_PGD - 1)<<3);
+ i_daddu(p, ptr, ptr, tmp); /* add in pgd offset */
+ i_dmfc0(p, tmp, C0_BADVADDR); /* get faulting address */
+ i_ld(p, ptr, 0, ptr); /* get pmd pointer */
+ i_dsrl(p, tmp, tmp, PMD_SHIFT-3); /* get pmd offset in bytes */
+ i_andi(p, tmp, tmp, (PTRS_PER_PMD - 1)<<3);
+ i_daddu(p, ptr, ptr, tmp); /* add in pmd offset */
+}
+
+/*
+ * BVADDR is the faulting address, PTR is scratch.
+ * PTR will hold the pgd for vmalloc.
+ */
+static __init void
+build_get_pgd_vmalloc64(u32 **p, struct label **l, struct reloc **r,
+ unsigned int bvaddr, unsigned int ptr)
+{
+ long swpd = (long)swapper_pg_dir;
+
+ l_vmalloc(l, *p);
+ i_LA(p, ptr, VMALLOC_START);
+ i_dsubu(p, bvaddr, bvaddr, ptr);
+
+ if (in_compat_space_p(swpd) && !rel_lo(swpd)) {
+ il_b(p, r, label_vmalloc_done);
+ i_lui(p, ptr, rel_hi(swpd));
+ } else {
+ i_LA_mostly(p, ptr, swpd);
+ il_b(p, r, label_vmalloc_done);
+ i_daddiu(p, ptr, ptr, rel_lo(swpd));
+ }
+}
+
+#else /* CONFIG_MIPS32 */
+
+/*
+ * TMP and PTR are scratch.
+ * TMP will be clobbered, PTR will hold the pgd entry.
+ */
+static __init void build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
+{
+ long pgdc = (long)pgd_current;
+
+ /* 32 bit SMP has smp_processor_id() stored in CONTEXT. */
+#ifdef CONFIG_SMP
+ i_mfc0(p, ptr, C0_CONTEXT);
+ i_LA_mostly(p, tmp, pgdc);
+ i_srl(p, ptr, ptr, 23);
+ i_sll(p, ptr, ptr, 2);
+ i_addu(p, ptr, tmp, ptr);
+#else
+ i_LA_mostly(p, ptr, pgdc);
+#endif
+ i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
+ i_lw(p, ptr, rel_lo(pgdc), ptr);
+ i_srl(p, tmp, tmp, PGDIR_SHIFT); /* get pgd only bits */
+ i_sll(p, tmp, tmp, PGD_T_LOG2);
+ i_addu(p, ptr, ptr, tmp); /* add in pgd offset */
+}
+#endif /* CONFIG_MIPS32 */
+
+static __init void build_adjust_context(u32 **p, unsigned int ctx)
+{
+ unsigned int shift = 0;
+ unsigned int mask = 0xff0;
+
+#if !defined(CONFIG_MIPS64) && !defined(CONFIG_64BIT_PHYS_ADDR)
+ shift++;
+ mask |= 0x008;
+#endif
+
+ switch (current_cpu_data.cputype) {
+ case CPU_VR41XX:
+ case CPU_VR4111:
+ case CPU_VR4121:
+ case CPU_VR4122:
+ case CPU_VR4131:
+ case CPU_VR4181:
+ case CPU_VR4181A:
+ case CPU_VR4133:
+ shift += 2;
+ break;
+
+ default:
+ break;
+ }
+
+ if (shift)
+ i_SRL(p, ctx, ctx, shift);
+ i_andi(p, ctx, ctx, mask);
+}
+
+static __init void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
+{
+ /*
+ * Bug workaround for the Nevada. It seems as if under certain
+ * circumstances the move from cp0_context might produce a
+ * bogus result when the mfc0 instruction and its consumer are
+ * in a different cacheline or a load instruction, probably any
+ * memory reference, is between them.
+ */
+ switch (current_cpu_data.cputype) {
+ case CPU_NEVADA:
+ i_LW(p, ptr, 0, ptr);
+ GET_CONTEXT(p, tmp); /* get context reg */
+ break;
+
+ default:
+ GET_CONTEXT(p, tmp); /* get context reg */
+ i_LW(p, ptr, 0, ptr);
+ break;
+ }
+
+ build_adjust_context(p, tmp);
+ i_ADDU(p, ptr, ptr, tmp); /* add in offset */
+}
+
+static __init void build_update_entries(u32 **p, unsigned int tmp,
+ unsigned int ptep)
+{
+ /*
+ * 64bit address support (36bit on a 32bit CPU) in a 32bit
+ * Kernel is a special case. Only a few CPUs use it.
+ */
+#ifdef CONFIG_64BIT_PHYS_ADDR
+ if (cpu_has_64bit_gp_regs) {
+ i_ld(p, tmp, 0, ptep); /* get even pte */
+ i_ld(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
+ i_dsrl(p, tmp, tmp, 6); /* convert to entrylo0 */
+ i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */
+ i_dsrl(p, ptep, ptep, 6); /* convert to entrylo1 */
+ i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */
+ } else {
+ int pte_off_even = sizeof(pte_t) / 2;
+ int pte_off_odd = pte_off_even + sizeof(pte_t);
+
+ /* The pte entries are pre-shifted */
+ i_lw(p, tmp, pte_off_even, ptep); /* get even pte */
+ i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */
+ i_lw(p, ptep, pte_off_odd, ptep); /* get odd pte */
+ i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */
+ }
+#else
+ i_LW(p, tmp, 0, ptep); /* get even pte */
+ i_LW(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
+ if (r45k_bvahwbug())
+ build_tlb_probe_entry(p);
+ i_SRL(p, tmp, tmp, 6); /* convert to entrylo0 */
+ if (r4k_250MHZhwbug())
+ i_mtc0(p, 0, C0_ENTRYLO0);
+ i_mtc0(p, tmp, C0_ENTRYLO0); /* load it */
+ i_SRL(p, ptep, ptep, 6); /* convert to entrylo1 */
+ if (r45k_bvahwbug())
+ i_mfc0(p, tmp, C0_INDEX);
+ if (r4k_250MHZhwbug())
+ i_mtc0(p, 0, C0_ENTRYLO1);
+ i_mtc0(p, ptep, C0_ENTRYLO1); /* load it */
+#endif
+}
+
+static void __init build_r4000_tlb_refill_handler(void)
+{
+ u32 *p = tlb_handler;
+ struct label *l = labels;
+ struct reloc *r = relocs;
+ u32 *f;
+ unsigned int final_len;
+
+ memset(tlb_handler, 0, sizeof(tlb_handler));
+ memset(labels, 0, sizeof(labels));
+ memset(relocs, 0, sizeof(relocs));
+ memset(final_handler, 0, sizeof(final_handler));
+
+ /*
+ * create the plain linear handler
+ */
+ if (bcm1250_m3_war()) {
+ i_MFC0(&p, K0, C0_BADVADDR);
+ i_MFC0(&p, K1, C0_ENTRYHI);
+ i_xor(&p, K0, K0, K1);
+ i_SRL(&p, K0, K0, PAGE_SHIFT+1);
+ il_bnez(&p, &r, K0, label_leave);
+ /* No need for i_nop */
+ }
+
+#ifdef CONFIG_MIPS64
+ build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd ptr in K1 */
+#else
+ build_get_pgde32(&p, K0, K1); /* get pgd ptr in K1 */
+#endif
+
+ build_get_ptep(&p, K0, K1);
+ build_update_entries(&p, K0, K1);
+ build_tlb_write_random_entry(&p, &l, &r);
+ l_leave(&l, p);
+ i_eret(&p); /* return from trap */
+
+#ifdef CONFIG_MIPS64
+ build_get_pgd_vmalloc64(&p, &l, &r, K0, K1);
+#endif
+
+ /*
+ * Overflow check: For the 64bit handler, we need at least one
+ * free instruction slot for the wrap-around branch. In worst
+ * case, if the intended insertion point is a delay slot, we
+ * need three, with the the second nop'ed and the third being
+ * unused.
+ */
+#ifdef CONFIG_MIPS32
+ if ((p - tlb_handler) > 64)
+ panic("TLB refill handler space exceeded");
+#else
+ if (((p - tlb_handler) > 63)
+ || (((p - tlb_handler) > 61)
+ && insn_has_bdelay(relocs, tlb_handler + 29)))
+ panic("TLB refill handler space exceeded");
+#endif
+
+ /*
+ * Now fold the handler in the TLB refill handler space.
+ */
+#ifdef CONFIG_MIPS32
+ f = final_handler;
+ /* Simplest case, just copy the handler. */
+ copy_handler(relocs, labels, tlb_handler, p, f);
+ final_len = p - tlb_handler;
+#else /* CONFIG_MIPS64 */
+ f = final_handler + 32;
+ if ((p - tlb_handler) <= 32) {
+ /* Just copy the handler. */
+ copy_handler(relocs, labels, tlb_handler, p, f);
+ final_len = p - tlb_handler;
+ } else {
+ u32 *split = tlb_handler + 30;
+
+ /*
+ * Find the split point.
+ */
+ if (insn_has_bdelay(relocs, split - 1))
+ split--;
+
+ /* Copy first part of the handler. */
+ copy_handler(relocs, labels, tlb_handler, split, f);
+ f += split - tlb_handler;
+
+ /* Insert branch. */
+ l_split(&l, final_handler);
+ il_b(&f, &r, label_split);
+ if (insn_has_bdelay(relocs, split))
+ i_nop(&f);
+ else {
+ copy_handler(relocs, labels, split, split + 1, f);
+ f++;
+ split++;
+ }
+
+ /* Copy the rest of the handler. */
+ copy_handler(relocs, labels, split, p, final_handler);
+ final_len = (f - (final_handler + 32)) + (p - split);
+ }
+#endif /* CONFIG_MIPS64 */
+
+ resolve_relocs(relocs, labels);
+ printk("Synthesized TLB handler (%u instructions).\n", final_len);
+
+#ifdef DEBUG_TLB
+ {
+ int i;
+
+ for (i = 0; i < 64; i++)
+ printk("%08x\n", final_handler[i]);
+ }
+#endif
+
+ memcpy((void *)CAC_BASE, final_handler, 0x100);
+ flush_icache_range(CAC_BASE, CAC_BASE + 0x100);
+}
+
+void __init build_tlb_refill_handler(void)
+{
+ switch (current_cpu_data.cputype) {
+#ifdef CONFIG_MIPS32
+ case CPU_R2000:
+ case CPU_R3000:
+ case CPU_R3000A:
+ case CPU_R3081E:
+ case CPU_TX3912:
+ case CPU_TX3922:
+ case CPU_TX3927:
+ build_r3000_tlb_refill_handler();
+ break;
+
+ case CPU_R6000:
+ case CPU_R6000A:
+ panic("No R6000 TLB refill handler yet");
+ break;
+#endif
+
+ case CPU_R8000:
+ panic("No R8000 TLB refill handler yet");
+ break;
+
+ default:
+ build_r4000_tlb_refill_handler();
+ }
+}
--- /dev/null
+/*
+ * TLB exception handling code for MIPS32 CPUs.
+ *
+ * Copyright (C) 1994, 1995, 1996 by Ralf Baechle and Andreas Busse
+ *
+ * Multi-cpu abstraction and reworking:
+ * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * Pete Popov, ppopov@pacbell.net
+ * Added 36 bit phys address support.
+ * Copyright (C) 2002 MontaVista Software, Inc.
+ */
+#include <linux/init.h>
+#include <asm/asm.h>
+#include <asm/cachectl.h>
+#include <asm/fpregdef.h>
+#include <asm/mipsregs.h>
+#include <asm/page.h>
+#include <asm/pgtable-bits.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+#define TLB_OPTIMIZE /* If you are paranoid, disable this. */
+
+#ifdef CONFIG_64BIT_PHYS_ADDR
+
+/* We really only support 36 bit physical addresses on MIPS32 */
+#define PTE_L lw
+#define PTE_S sw
+#define PTE_SRL srl
+#define P_MTC0 mtc0
+#define PTE_HALF 4 /* pte_high contains pre-shifted, ready to go entry */
+#define PTE_SIZE 8
+#define PTEP_INDX_MSK 0xff0
+#define PTE_INDX_MSK 0xff8
+#define PTE_INDX_SHIFT 9
+#define CONVERT_PTE(pte)
+#define PTE_MAKEWRITE_HIGH(pte, ptr) \
+ lw pte, PTE_HALF(ptr); \
+ ori pte, (_PAGE_VALID | _PAGE_DIRTY); \
+ sw pte, PTE_HALF(ptr); \
+ lw pte, 0(ptr);
+
+#define PTE_MAKEVALID_HIGH(pte, ptr) \
+ lw pte, PTE_HALF(ptr); \
+ ori pte, pte, _PAGE_VALID; \
+ sw pte, PTE_HALF(ptr); \
+ lw pte, 0(ptr);
+
+#else
+
+#define PTE_L lw
+#define PTE_S sw
+#define PTE_SRL srl
+#define P_MTC0 mtc0
+#define PTE_HALF 0
+#define PTE_SIZE 4
+#define PTEP_INDX_MSK 0xff8
+#define PTE_INDX_MSK 0xffc
+#define PTE_INDX_SHIFT 10
+#define CONVERT_PTE(pte) srl pte, pte, 6
+#define PTE_MAKEWRITE_HIGH(pte, ptr)
+#define PTE_MAKEVALID_HIGH(pte, ptr)
+
+#endif /* CONFIG_64BIT_PHYS_ADDR */
+
+#ifdef CONFIG_64BIT_PHYS_ADDR
+#define GET_PTE_OFF(reg)
+#else
+#define GET_PTE_OFF(reg) srl reg, reg, 1
+#endif
+
+/*
+ * ABUSE of CPP macros 101.
+ *
+ * After this macro runs, the pte faulted on is
+ * in register PTE, a ptr into the table in which
+ * the pte belongs is in PTR.
+ */
+
+#ifdef CONFIG_SMP
+#define GET_PGD(scratch, ptr) \
+ mfc0 ptr, CP0_CONTEXT; \
+ la scratch, pgd_current;\
+ srl ptr, 23; \
+ sll ptr, 2; \
+ addu ptr, scratch, ptr; \
+ lw ptr, (ptr);
+#else
+#define GET_PGD(scratch, ptr) \
+ lw ptr, pgd_current;
+#endif
+
+#define LOAD_PTE(pte, ptr) \
+ GET_PGD(pte, ptr) \
+ mfc0 pte, CP0_BADVADDR; \
+ srl pte, pte, _PGDIR_SHIFT; \
+ sll pte, pte, 2; \
+ addu ptr, ptr, pte; \
+ mfc0 pte, CP0_BADVADDR; \
+ lw ptr, (ptr); \
+ srl pte, pte, PTE_INDX_SHIFT; \
+ and pte, pte, PTE_INDX_MSK; \
+ addu ptr, ptr, pte; \
+ PTE_L pte, (ptr);
+
+ /* This places the even/odd pte pair in the page
+ * table at PTR into ENTRYLO0 and ENTRYLO1 using
+ * TMP as a scratch register.
+ */
+#define PTE_RELOAD(ptr, tmp) \
+ ori ptr, ptr, PTE_SIZE; \
+ xori ptr, ptr, PTE_SIZE; \
+ PTE_L tmp, (PTE_HALF+PTE_SIZE)(ptr); \
+ CONVERT_PTE(tmp); \
+ P_MTC0 tmp, CP0_ENTRYLO1; \
+ PTE_L ptr, PTE_HALF(ptr); \
+ CONVERT_PTE(ptr); \
+ P_MTC0 ptr, CP0_ENTRYLO0;
+
+#define DO_FAULT(write) \
+ .set noat; \
+ SAVE_ALL; \
+ mfc0 a2, CP0_BADVADDR; \
+ KMODE; \
+ .set at; \
+ move a0, sp; \
+ jal do_page_fault; \
+ li a1, write; \
+ j ret_from_exception; \
+ nop; \
+ .set noat;
+
+ /* Check is PTE is present, if not then jump to LABEL.
+ * PTR points to the page table where this PTE is located,
+ * when the macro is done executing PTE will be restored
+ * with it's original value.
+ */
+#define PTE_PRESENT(pte, ptr, label) \
+ andi pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
+ xori pte, pte, (_PAGE_PRESENT | _PAGE_READ); \
+ bnez pte, label; \
+ PTE_L pte, (ptr);
+
+ /* Make PTE valid, store result in PTR. */
+#define PTE_MAKEVALID(pte, ptr) \
+ ori pte, pte, (_PAGE_VALID | _PAGE_ACCESSED); \
+ PTE_S pte, (ptr);
+
+ /* Check if PTE can be written to, if not branch to LABEL.
+ * Regardless restore PTE with value from PTR when done.
+ */
+#define PTE_WRITABLE(pte, ptr, label) \
+ andi pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
+ xori pte, pte, (_PAGE_PRESENT | _PAGE_WRITE); \
+ bnez pte, label; \
+ PTE_L pte, (ptr);
+
+ /* Make PTE writable, update software status bits as well,
+ * then store at PTR.
+ */
+#define PTE_MAKEWRITE(pte, ptr) \
+ ori pte, pte, (_PAGE_ACCESSED | _PAGE_MODIFIED | \
+ _PAGE_VALID | _PAGE_DIRTY); \
+ PTE_S pte, (ptr);
+
+ .set noreorder
+
+ .align 5
+ NESTED(handle_tlbl, PT_SIZE, sp)
+ .set noat
+invalid_tlbl:
+#ifdef TLB_OPTIMIZE
+ /* Test present bit in entry. */
+ LOAD_PTE(k0, k1)
+ tlbp
+ PTE_PRESENT(k0, k1, nopage_tlbl)
+ PTE_MAKEVALID_HIGH(k0, k1)
+ PTE_MAKEVALID(k0, k1)
+ PTE_RELOAD(k1, k0)
+ nop
+ b 1f
+ tlbwi
+1:
+ nop
+ .set mips3
+ eret
+ .set mips0
+#endif
+
+nopage_tlbl:
+ DO_FAULT(0)
+ END(handle_tlbl)
+
+ .align 5
+ NESTED(handle_tlbs, PT_SIZE, sp)
+ .set noat
+#ifdef TLB_OPTIMIZE
+ .set mips3
+ li k0,0
+ LOAD_PTE(k0, k1)
+ tlbp # find faulting entry
+ PTE_WRITABLE(k0, k1, nopage_tlbs)
+ PTE_MAKEWRITE(k0, k1)
+ PTE_MAKEWRITE_HIGH(k0, k1)
+ PTE_RELOAD(k1, k0)
+ nop
+ b 1f
+ tlbwi
+1:
+ nop
+ .set mips3
+ eret
+ .set mips0
+#endif
+
+nopage_tlbs:
+ DO_FAULT(1)
+ END(handle_tlbs)
+
+ .align 5
+ NESTED(handle_mod, PT_SIZE, sp)
+ .set noat
+#ifdef TLB_OPTIMIZE
+ .set mips3
+ LOAD_PTE(k0, k1)
+ tlbp # find faulting entry
+ andi k0, k0, _PAGE_WRITE
+ beqz k0, nowrite_mod
+ PTE_L k0, (k1)
+
+ /* Present and writable bits set, set accessed and dirty bits. */
+ PTE_MAKEWRITE(k0, k1)
+ PTE_MAKEWRITE_HIGH(k0, k1)
+ /* Now reload the entry into the tlb. */
+ PTE_RELOAD(k1, k0)
+ nop
+ b 1f
+ tlbwi
+1:
+ nop
+ .set mips3
+ eret
+ .set mips0
+#endif
+
+nowrite_mod:
+ DO_FAULT(1)
+ END(handle_mod)
+
#define TLB_OPTIMIZE /* If you are paranoid, disable this. */
- .text
- .set mips1
- .set noreorder
-
- __INIT
-
- /* TLB refill, R[23]00 version */
- LEAF(except_vec0_r2300)
- .set noat
- .set mips1
- mfc0 k0, CP0_BADVADDR
- lw k1, pgd_current # get pgd pointer
- srl k0, k0, 22
- sll k0, k0, 2
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
- and k0, k0, 0xffc
- addu k1, k1, k0
- lw k0, (k1)
- nop
- mtc0 k0, CP0_ENTRYLO0
- mfc0 k1, CP0_EPC
- tlbwr
- jr k1
- rfe
- END(except_vec0_r2300)
-
- __FINIT
-
/* ABUSE of CPP macros 101. */
/* After this macro runs, the pte faulted on is
_PAGE_VALID | _PAGE_DIRTY); \
PTE_S pte, (ptr);
- __INIT
-
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define GET_PTE_OFF(reg)
-#elif CONFIG_CPU_VR41XX
-#define GET_PTE_OFF(reg) srl reg, reg, 3
-#else
-#define GET_PTE_OFF(reg) srl reg, reg, 1
-#endif
-
-/*
- * These handlers much be written in a relocatable manner
- * because based upon the cpu type an arbitrary one of the
- * following pieces of code will be copied to the KSEG0
- * vector location.
- */
- /* TLB refill, EXL == 0, R4xx0, non-R4600 version */
- .set noreorder
- .set noat
- LEAF(except_vec0_r4000)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR # Get faulting address
- srl k0, k0, _PGDIR_SHIFT # get pgd only bits
-
- sll k0, k0, 2
- addu k1, k1, k0 # add in pgd offset
- mfc0 k0, CP0_CONTEXT # get context reg
- lw k1, (k1)
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0 # add in offset
- PTE_L k0, 0(k1) # get even pte
- PTE_L k1, PTE_SIZE(k1) # get odd pte
- PTE_SRL k0, k0, 6 # convert to entrylo0
- P_MTC0 k0, CP0_ENTRYLO0 # load it
- PTE_SRL k1, k1, 6 # convert to entrylo1
- P_MTC0 k1, CP0_ENTRYLO1 # load it
- mtc0_tlbw_hazard
- tlbwr # write random tlb entry
- tlbw_eret_hazard
- eret # return from trap
- END(except_vec0_r4000)
-
- /* TLB refill, EXL == 0, R4600 version */
- LEAF(except_vec0_r4600)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- PTE_SRL k0, k0, 6
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- P_MTC0 k1, CP0_ENTRYLO1
- nop
- tlbwr
- nop
- eret
- END(except_vec0_r4600)
-
- /* TLB refill, EXL == 0, R52x0 "Nevada" version */
- /*
- * This version has a bug workaround for the Nevada. It seems
- * as if under certain circumstances the move from cp0_context
- * might produce a bogus result when the mfc0 instruction and
- * it's consumer are in a different cacheline or a load instruction,
- * probably any memory reference, is between them. This is
- * potencially slower than the R4000 version, so we use this
- * special version.
- */
- .set noreorder
- .set noat
- LEAF(except_vec0_nevada)
- .set mips3
- mfc0 k0, CP0_BADVADDR # Get faulting address
- srl k0, k0, _PGDIR_SHIFT # get pgd only bits
- lw k1, pgd_current # get pgd pointer
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0 # add in pgd offset
- lw k1, (k1)
- mfc0 k0, CP0_CONTEXT # get context reg
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0 # add in offset
- PTE_L k0, 0(k1) # get even pte
- PTE_L k1, PTE_SIZE(k1) # get odd pte
- PTE_SRL k0, k0, 6 # convert to entrylo0
- P_MTC0 k0, CP0_ENTRYLO0 # load it
- PTE_SRL k1, k1, 6 # convert to entrylo1
- P_MTC0 k1, CP0_ENTRYLO1 # load it
- nop # QED specified nops
- nop
- tlbwr # write random tlb entry
- nop # traditional nop
- eret # return from trap
- END(except_vec0_nevada)
-
- /* TLB refill, EXL == 0, SB1 with M3 errata handling version */
- LEAF(except_vec0_sb1)
-#if BCM1250_M3_WAR
- mfc0 k0, CP0_BADVADDR
- mfc0 k1, CP0_ENTRYHI
- xor k0, k1
- srl k0, k0, PAGE_SHIFT+1
- bnez k0, 1f
-#endif
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR # Get faulting address
- srl k0, k0, _PGDIR_SHIFT # get pgd only bits
- sll k0, k0, 2
- addu k1, k1, k0 # add in pgd offset
- mfc0 k0, CP0_CONTEXT # get context reg
- lw k1, (k1)
- GET_PTE_OFF(k0) # get pte offset
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0 # add in offset
- PTE_L k0, 0(k1) # get even pte
- PTE_L k1, PTE_SIZE(k1) # get odd pte
- PTE_SRL k0, k0, 6 # convert to entrylo0
- P_MTC0 k0, CP0_ENTRYLO0 # load it
- PTE_SRL k1, k1, 6 # convert to entrylo1
- P_MTC0 k1, CP0_ENTRYLO1 # load it
- tlbwr # write random tlb entry
-1: eret # return from trap
- END(except_vec0_sb1)
-
- /* TLB refill, EXL == 0, R4[40]00/R5000 badvaddr hwbug version */
- LEAF(except_vec0_r45k_bvahwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- nop /* XXX */
- tlbp
- PTE_SRL k0, k0, 6
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- mfc0 k0, CP0_INDEX
- P_MTC0 k1, CP0_ENTRYLO1
- bltzl k0, 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r45k_bvahwbug)
-
-#ifdef CONFIG_SMP
- /* TLB refill, EXL == 0, R4000 MP badvaddr hwbug version */
- LEAF(except_vec0_r4k_mphwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- nop /* XXX */
- tlbp
- PTE_SRL k0, k0, 6
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- mfc0 k0, CP0_INDEX
- P_MTC0 k1, CP0_ENTRYLO1
- bltzl k0, 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r4k_mphwbug)
-#endif
-
- /* TLB refill, EXL == 0, R4000 UP 250MHZ entrylo[01] hwbug version */
- LEAF(except_vec0_r4k_250MHZhwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- PTE_SRL k0, k0, 6
- P_MTC0 zero, CP0_ENTRYLO0
- P_MTC0 k0, CP0_ENTRYLO0
- PTE_SRL k1, k1, 6
- P_MTC0 zero, CP0_ENTRYLO1
- P_MTC0 k1, CP0_ENTRYLO1
- b 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r4k_250MHZhwbug)
-
-#ifdef CONFIG_SMP
- /* TLB refill, EXL == 0, R4000 MP 250MHZ entrylo[01]+badvaddr bug version */
- LEAF(except_vec0_r4k_MP250MHZhwbug)
- .set mips3
- GET_PGD(k0, k1) # get pgd pointer
- mfc0 k0, CP0_BADVADDR
- srl k0, k0, _PGDIR_SHIFT
- sll k0, k0, 2 # log2(sizeof(pgd_t)
- addu k1, k1, k0
- mfc0 k0, CP0_CONTEXT
- lw k1, (k1)
-#ifndef CONFIG_64BIT_PHYS_ADDR
- srl k0, k0, 1
-#endif
- and k0, k0, PTEP_INDX_MSK
- addu k1, k1, k0
- PTE_L k0, 0(k1)
- PTE_L k1, PTE_SIZE(k1)
- nop /* XXX */
- tlbp
- PTE_SRL k0, k0, 6
- P_MTC0 zero, CP0_ENTRYLO0
- P_MTC0 k0, CP0_ENTRYLO0
- mfc0 k0, CP0_INDEX
- PTE_SRL k1, k1, 6
- P_MTC0 zero, CP0_ENTRYLO1
- P_MTC0 k1, CP0_ENTRYLO1
- bltzl k0, 1f
- tlbwr
-1:
- nop
- eret
- END(except_vec0_r4k_MP250MHZhwbug)
-#endif
-
- __FINIT
.set noreorder
PTE_RELOAD(k1, k0)
mtc0_tlbw_hazard
tlbwi
+ nop
tlbw_eret_hazard
.set mips3
eret
PTE_RELOAD(k1, k0)
mtc0_tlbw_hazard
tlbwi
+ nop
tlbw_eret_hazard
.set mips3
eret
PTE_RELOAD(k1, k0)
mtc0_tlbw_hazard
tlbwi
+ nop
tlbw_eret_hazard
.set mips3
eret
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Silicon Graphics, Inc.
- * Written by Ulf Carlsson (ulfc@engr.sgi.com)
- * Copyright (C) 2002 Maciej W. Rozycki
- */
-#include <linux/config.h>
-#include <linux/init.h>
-#include <linux/threads.h>
-
-#include <asm/asm.h>
-#include <asm/hazards.h>
-#include <asm/regdef.h>
-#include <asm/mipsregs.h>
-#include <asm/stackframe.h>
-#include <asm/war.h>
-
-#define _VMALLOC_START 0xc000000000000000
-
- /*
- * After this macro runs we have a pointer to the pte of the address
- * that caused the fault in PTR.
- */
- .macro LOAD_PTE2, ptr, tmp, kaddr
-#ifdef CONFIG_SMP
- dmfc0 \ptr, CP0_CONTEXT
- dmfc0 \tmp, CP0_BADVADDR
- dsra \ptr, 23 # get pgd_current[cpu]
-#else
- dmfc0 \tmp, CP0_BADVADDR
- dla \ptr, pgd_current
-#endif
- bltz \tmp, \kaddr
- ld \ptr, (\ptr)
- dsrl \tmp, (_PGDIR_SHIFT-3) # get pgd offset in bytes
- andi \tmp, ((_PTRS_PER_PGD - 1)<<3)
- daddu \ptr, \tmp # add in pgd offset
- dmfc0 \tmp, CP0_BADVADDR
- ld \ptr, (\ptr) # get pmd pointer
- dsrl \tmp, (_PMD_SHIFT-3) # get pmd offset in bytes
- andi \tmp, ((_PTRS_PER_PMD - 1)<<3)
- daddu \ptr, \tmp # add in pmd offset
- dmfc0 \tmp, CP0_XCONTEXT
- ld \ptr, (\ptr) # get pte pointer
- andi \tmp, 0xff0 # get pte offset
- daddu \ptr, \tmp
- .endm
-
-
- /*
- * Ditto for the kernel table.
- */
- .macro LOAD_KPTE2, ptr, tmp, not_vmalloc
- /*
- * First, determine that the address is in/above vmalloc range.
- */
- dmfc0 \tmp, CP0_BADVADDR
- dli \ptr, _VMALLOC_START
-
- /*
- * Now find offset into kptbl.
- */
- dsubu \tmp, \tmp, \ptr
- dla \ptr, kptbl
- dsrl \tmp, (_PAGE_SHIFT+1) # get vpn2
- dsll \tmp, 4 # byte offset of pte
- daddu \ptr, \ptr, \tmp
-
- /*
- * Determine that fault address is within vmalloc range.
- */
- dla \tmp, ekptbl
- slt \tmp, \ptr, \tmp
- beqz \tmp, \not_vmalloc # not vmalloc
- nop
- .endm
-
-
- /*
- * This places the even/odd pte pair in the page table at the pte
- * entry pointed to by PTE into ENTRYLO0 and ENTRYLO1.
- */
- .macro PTE_RELOAD, pte0, pte1
- dsrl \pte0, 6 # convert to entrylo0
- dmtc0 \pte0, CP0_ENTRYLO0 # load it
- dsrl \pte1, 6 # convert to entrylo1
- dmtc0 \pte1, CP0_ENTRYLO1 # load it
- .endm
-
-
- .text
- .set noreorder
- .set mips3
-
- __INIT
-
- /*
- * TLB refill handlers for the R4000 and SB1.
- * Attention: We may only use 32 instructions / 128 bytes.
- */
- .align 5
-LEAF(except_vec1_r4k)
- .set noat
- dla k0, handle_vec1_r4k
- jr k0
- nop
-END(except_vec1_r4k)
-
-LEAF(except_vec1_sb1)
-#if BCM1250_M3_WAR
- dmfc0 k0, CP0_BADVADDR
- dmfc0 k1, CP0_ENTRYHI
- xor k0, k1
- dsrl k0, k0, _PAGE_SHIFT+1
- bnez k0, 1f
-#endif
- .set noat
- dla k0, handle_vec1_r4k
- jr k0
- nop
-
-1: eret
- nop
-END(except_vec1_sb1)
-
- __FINIT
-
- .align 5
-LEAF(handle_vec1_r4k)
- .set noat
- LOAD_PTE2 k1 k0 9f
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- mtc0_tlbw_hazard
- tlbwr
- tlbw_eret_hazard
- eret
-
-9: # handle the vmalloc range
- LOAD_KPTE2 k1 k0 invalid_vmalloc_address
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- mtc0_tlbw_hazard
- tlbwr
- tlbw_eret_hazard
- eret
-END(handle_vec1_r4k)
-
-
- __INIT
-
- /*
- * TLB refill handler for the R10000.
- * Attention: We may only use 32 instructions / 128 bytes.
- */
- .align 5
-LEAF(except_vec1_r10k)
- .set noat
- dla k0, handle_vec1_r10k
- jr k0
- nop
-END(except_vec1_r10k)
-
- __FINIT
-
- .align 5
-LEAF(handle_vec1_r10k)
- .set noat
- LOAD_PTE2 k1 k0 9f
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- nop
- tlbwr
- eret
-
-9: # handle the vmalloc range
- LOAD_KPTE2 k1 k0 invalid_vmalloc_address
- ld k0, 0(k1) # get even pte
- ld k1, 8(k1) # get odd pte
- PTE_RELOAD k0 k1
- nop
- tlbwr
- eret
-END(handle_vec1_r10k)
-
-
- .align 5
-LEAF(invalid_vmalloc_address)
- .set noat
- SAVE_ALL
- CLI
- dmfc0 t0, CP0_BADVADDR
- sd t0, PT_BVADDR(sp)
- move a0, sp
- jal show_regs
- PANIC("Invalid kernel address")
-END(invalid_vmalloc_address)
no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
};
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
/*
* Clear all of the interrupts while we change the able around a bit.
/* Sets the first-level interrupt dispatcher. */
set_except_vector(0, jaguar_handle_int);
- init_generic_irq();
mips_cpu_irq_init(0);
rm7k_cpu_irq_init(8);
* BRIEF MODULE DESCRIPTION
* Momentum Computer Jaguar-ATX board dependent boot routines
*
- * Copyright (C) 1996, 1997, 2001 Ralf Baechle
+ * Copyright (C) 1996, 1997, 2001, 2004 Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2000 RidgeRun, Inc.
* Copyright (C) 2001 Red Hat, Inc.
* Copyright (C) 2002 Momentum Computer
#include <asm/page.h>
#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/pci_channel.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/reboot.h>
--- /dev/null
+#
+# Makefile for Momentum Computer's Ocelot-3 board.
+#
+# Note! Dependencies are done automagically by 'make dep', which also
+# removes any old dependencies. DON'T put your own dependencies here
+# unless it's something special (ie not a .c file).
+#
+obj-y += int-handler.o irq.o prom.o reset.o setup.o
--- /dev/null
+/*
+ * Copyright 2002 Momentum Computer Inc.
+ * Author: Matthew Dharm <mdharm@momenco.com>
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * Copyright 2004 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ *
+ * First-level interrupt dispatcher for Ocelot-3 board.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <asm/asm.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/regdef.h>
+#include <asm/stackframe.h>
+
+/*
+ * First level interrupt dispatcher for Ocelot-3 board
+ */
+ .align 5
+ NESTED(ocelot3_handle_int, PT_SIZE, sp)
+ SAVE_ALL
+ CLI
+ .set at
+
+ mfc0 t0, CP0_CAUSE
+ mfc0 t2, CP0_STATUS
+
+ and t0, t2
+
+ andi t1, t0, STATUSF_IP0 /* sw0 software interrupt (IRQ0) */
+ bnez t1, ll_sw0_irq
+
+ andi t1, t0, STATUSF_IP1 /* sw1 software interrupt (IRQ1) */
+ bnez t1, ll_sw1_irq
+
+ andi t1, t0, STATUSF_IP2 /* int0 hardware line (IRQ2) */
+ bnez t1, ll_pci0slot1_irq
+
+ andi t1, t0, STATUSF_IP3 /* int1 hardware line (IRQ3) */
+ bnez t1, ll_pci0slot2_irq
+
+ andi t1, t0, STATUSF_IP4 /* int2 hardware line (IRQ4) */
+ bnez t1, ll_pci1slot1_irq
+
+ andi t1, t0, STATUSF_IP5 /* int3 hardware line (IRQ5) */
+ bnez t1, ll_pci1slot2_irq
+
+ andi t1, t0, STATUSF_IP6 /* int4 hardware line (IRQ6) */
+ bnez t1, ll_uart_irq
+
+ andi t1, t0, STATUSF_IP7 /* cpu timer (IRQ7) */
+ bnez t1, ll_cputimer_irq
+
+ /* now look at extended interrupts */
+ mfc0 t0, CP0_CAUSE
+ cfc0 t1, CP0_S1_INTCONTROL
+
+ /* shift the mask 8 bits left to line up the bits */
+ sll t2, t1, 8
+
+ and t0, t2
+ srl t0, t0, 16
+
+ andi t1, t0, STATUSF_IP8 /* int6 hardware line (IRQ9) */
+ bnez t1, ll_mv64340_decode_irq
+
+ .set reorder
+
+ /* wrong alarm or masked ... */
+ j spurious_interrupt
+ nop
+ END(ocelot3_handle_int)
+
+ .align 5
+ll_sw0_irq:
+ li a0, 0 /* IRQ 1 */
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+ll_sw1_irq:
+ li a0, 1 /* IRQ 2 */
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_pci0slot1_irq:
+ li a0, 2 /* IRQ 3 */
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_pci0slot2_irq:
+ li a0, 3 /* IRQ 4 */
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_pci1slot1_irq:
+ li a0, 4 /* IRQ 5 */
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_pci1slot2_irq:
+ li a0, 5 /* IRQ 6 */
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_uart_irq:
+ li a0, 6 /* IRQ 7 */
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_cputimer_irq:
+ li a0, 7 /* IRQ 8 */
+ move a1, sp
+ jal do_IRQ
+ j ret_from_irq
+
+ll_mv64340_decode_irq:
+ move a0, sp
+ jal ll_mv64340_irq
+ j ret_from_irq
+
--- /dev/null
+/*
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Author: RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
+ *
+ * Copyright 2004 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ *
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/timex.h>
+#include <linux/slab.h>
+#include <linux/random.h>
+#include <asm/bitops.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+
+extern asmlinkage void ocelot3_handle_int(void);
+
+static struct irqaction cascade_mv64340 = {
+ no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
+};
+
+void __init arch_init_irq(void)
+{
+ /*
+ * Clear all of the interrupts while we change the able around a bit.
+ * int-handler is not on bootstrap
+ */
+ clear_c0_status(ST0_IM | ST0_BEV);
+
+ /* Sets the first-level interrupt dispatcher. */
+ set_except_vector(0, ocelot3_handle_int);
+ mips_cpu_irq_init(0);
+ rm7k_cpu_irq_init(8);
+
+ /* set up the cascading interrupts */
+ setup_irq(8, &cascade_mv64340); /* unmask intControl IM8, IRQ 9 */
+ mv64340_irq_init(16);
+
+ set_c0_status(ST0_IM); /* IE in the status register */
+
+}
--- /dev/null
+/*
+ * Ocelot-3 Board Register Definitions
+ *
+ * (C) 2002 Momentum Computer Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ */
+
+#ifndef __OCELOT_3_FPGA_H__
+#define __OCELOT_3_FPGA_H__
+
+#define OCELOT_3_REG_BOARDREV 0x0
+#define OCELOT_3_REG_FPGA_REV 0x1
+#define OCELOT_3_REG_FPGA_TYPE 0x2
+#define OCELOT_3_REG_RESET_STATUS 0x3
+#define OCELOT_3_REG_BOARD_STATUS 0x4
+#define OCELOT_3_REG_CPCI_ID 0x5
+#define OCELOT_3_REG_SET 0x6
+#define OCELOT_3_REG_CLR 0x7
+#define OCELOT_3_REG_EEPROM_MODE 0x9
+#define OCELOT_3_REG_INTMASK 0xa
+#define OCELOT_3_REG_INTSTAT 0xb
+#define OCELOT_3_REG_UART_INTMASK 0xc
+#define OCELOT_3_REG_UART_INTSTAT 0xd
+#define OCELOT_3_REG_INTSET 0xe
+#define OCELOT_3_REG_INTCLR 0xf
+
+extern unsigned long ocelot_fpga_base;
+
+#define OCELOT_FPGA_WRITE(x, y) writeb(x, ocelot_fpga_base + OCELOT_3_REG_##y)
+#define OCELOT_FPGA_READ(x) readb(ocelot_fpga_base + OCELOT_3_REG_##x)
+
+#endif
--- /dev/null
+/*
+ * Copyright 2002 Momentum Computer Inc.
+ * Author: Matthew Dharm <mdharm@momenco.com>
+ *
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
+ *
+ * Copyright 2004 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * Based on Ocelot Linux port, which is
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/mv643xx.h>
+
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/pmon.h>
+#include "ocelot_3_fpga.h"
+
+struct callvectors* debug_vectors;
+extern unsigned long marvell_base;
+extern unsigned long cpu_clock;
+
+#ifdef CONFIG_MV643XX_ETH
+extern unsigned char prom_mac_addr_base[6];
+#endif
+
+const char *get_system_type(void)
+{
+ return "Momentum Ocelot-3";
+}
+
+#ifdef CONFIG_MV643XX_ETH
+void burn_clocks(void)
+{
+ int i;
+
+ /* this loop should burn at least 1us -- this should be plenty */
+ for (i = 0; i < 0x10000; i++)
+ ;
+}
+
+u8 exchange_bit(u8 val, u8 cs)
+{
+ /* place the data */
+ OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
+ burn_clocks();
+
+ /* turn the clock on */
+ OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
+ burn_clocks();
+
+ /* turn the clock off and read-strobe */
+ OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
+
+ /* return the data */
+ return ((OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1);
+}
+
+void get_mac(char dest[6])
+{
+ u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+ int i,j;
+
+ for (i = 0; i < 12; i++)
+ exchange_bit(read_opcode[i], 1);
+
+ for (j = 0; j < 6; j++) {
+ dest[j] = 0;
+ for (i = 0; i < 8; i++) {
+ dest[j] <<= 1;
+ dest[j] |= exchange_bit(0, 1);
+ }
+ }
+
+ /* turn off CS */
+ exchange_bit(0,0);
+}
+#endif
+
+
+#ifdef CONFIG_MIPS64
+
+unsigned long signext(unsigned long addr)
+{
+ addr &= 0xffffffff;
+ return (unsigned long)((int)addr);
+}
+
+void *get_arg(unsigned long args, int arc)
+{
+ unsigned long ul;
+ unsigned char *puc, uc;
+
+ args += (arc * 4);
+ ul = (unsigned long)signext(args);
+ puc = (unsigned char *)ul;
+ if (puc == 0)
+ return (void *)0;
+
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+ uc = *puc++;
+ ul = (unsigned long)uc;
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 8);
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 16);
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 24);
+#else /* CONFIG_CPU_LITTLE_ENDIAN */
+ uc = *puc++;
+ ul = ((unsigned long)uc) << 24;
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 16);
+ uc = *puc++;
+ ul |= (((unsigned long)uc) << 8);
+ uc = *puc++;
+ ul |= ((unsigned long)uc);
+#endif /* CONFIG_CPU_LITTLE_ENDIAN */
+ ul = signext(ul);
+ return (void *)ul;
+}
+
+char *arg64(unsigned long addrin, int arg_index)
+{
+ unsigned long args;
+ char *p;
+
+ args = signext(addrin);
+ p = (char *)get_arg(args, arg_index);
+
+ return p;
+}
+#endif /* CONFIG_MIPS64 */
+
+void __init prom_init(void)
+{
+ int argc = fw_arg0;
+ char **arg = (char **) fw_arg1;
+ char **env = (char **) fw_arg2;
+ struct callvectors *cv = (struct callvectors *) fw_arg3;
+ int i;
+
+#ifdef CONFIG_MIPS64
+ char *ptr;
+ printk("prom_init - MIPS64\n");
+
+ /* save the PROM vectors for debugging use */
+ debug_vectors = (struct callvectors *)signext((unsigned long)cv);
+
+ /* arg[0] is "g", the rest is boot parameters */
+ arcs_cmdline[0] = '\0';
+
+ for (i = 1; i < argc; i++) {
+ ptr = (char *)arg64((unsigned long)arg, i);
+ if ((strlen(arcs_cmdline) + strlen(ptr) + 1) >=
+ sizeof(arcs_cmdline))
+ break;
+ strcat(arcs_cmdline, ptr);
+ strcat(arcs_cmdline, " ");
+ }
+ i = 0;
+
+ while (1) {
+ ptr = (char *)arg64((unsigned long)env, i);
+ if (! ptr)
+ break;
+
+ if (strncmp("gtbase", ptr, strlen("gtbase")) == 0) {
+ marvell_base = simple_strtol(ptr + strlen("gtbase="),
+ NULL, 16);
+
+ if ((marvell_base & 0xffffffff00000000) == 0)
+ marvell_base |= 0xffffffff00000000;
+
+ printk("marvell_base set to 0x%016lx\n", marvell_base);
+ }
+ if (strncmp("cpuclock", ptr, strlen("cpuclock")) == 0) {
+ cpu_clock = simple_strtol(ptr + strlen("cpuclock="),
+ NULL, 10);
+ printk("cpu_clock set to %d\n", cpu_clock);
+ }
+ i++;
+ }
+ printk("arcs_cmdline: %s\n", arcs_cmdline);
+
+#else /* CONFIG_MIPS64 */
+
+ /* save the PROM vectors for debugging use */
+ debug_vectors = cv;
+
+ /* arg[0] is "g", the rest is boot parameters */
+ arcs_cmdline[0] = '\0';
+ for (i = 1; i < argc; i++) {
+ if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
+ >= sizeof(arcs_cmdline))
+ break;
+ strcat(arcs_cmdline, arg[i]);
+ strcat(arcs_cmdline, " ");
+ }
+
+ while (*env) {
+ if (strncmp("gtbase", *env, strlen("gtbase")) == 0) {
+ marvell_base = simple_strtol(*env + strlen("gtbase="),
+ NULL, 16);
+ }
+ if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) {
+ cpu_clock = simple_strtol(*env + strlen("cpuclock="),
+ NULL, 10);
+ }
+ env++;
+ }
+#endif /* CONFIG_MIPS64 */
+
+ mips_machgroup = MACH_GROUP_MOMENCO;
+ mips_machtype = MACH_MOMENCO_OCELOT_3;
+
+#ifdef CONFIG_MV643XX_ETH
+ /* get the base MAC address for on-board ethernet ports */
+ get_mac(prom_mac_addr_base);
+#endif
+
+#ifndef CONFIG_MIPS64
+ debug_vectors->printf("Booting Linux kernel...\n");
+#endif
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
+
+void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
+{
+}
--- /dev/null
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Copyright (C) 1997, 2001 Ralf Baechle
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * Copyright (C) 2002 Momentum Computer Inc.
+ * Author: Matthew Dharm <mdharm@momenco.com>
+ *
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
+ *
+ * Copyright 2004 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ */
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/system.h>
+
+void momenco_ocelot_restart(char *command)
+{
+ /* base address of timekeeper portion of part */
+ void *nvram = (void *) 0xfc807000L;
+
+ /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */
+ writeb(0x84, nvram + 0xff7);
+
+ /* wait for the watchdog to go off */
+ mdelay(100+(1000/16));
+
+ /* if the watchdog fails for some reason, let people know */
+ printk(KERN_NOTICE "Watchdog reset failed\n");
+}
+
+void momenco_ocelot_halt(void)
+{
+ printk(KERN_NOTICE "\n** You can safely turn off the power\n");
+ while (1)
+ __asm__(".set\tmips3\n\t"
+ "wait\n\t"
+ ".set\tmips0");
+}
+
+void momenco_ocelot_power_off(void)
+{
+ momenco_ocelot_halt();
+}
--- /dev/null
+/*
+ * setup.c
+ *
+ * BRIEF MODULE DESCRIPTION
+ * Momentum Computer Ocelot-3 board dependent boot routines
+ *
+ * Copyright (C) 1996, 1997, 2001 Ralf Baechle
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Copyright (C) 2001 Red Hat, Inc.
+ * Copyright (C) 2002 Momentum Computer
+ *
+ * Author: Matthew Dharm, Momentum Computer
+ * mdharm@momenco.com
+ *
+ * Louis Hamilton, Red Hat, Inc.
+ * hamilton@redhat.com [MIPS64 modifications]
+ *
+ * Author: RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * Copyright 2004 PMC-Sierra
+ * Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/mc146818rtc.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/timex.h>
+#include <linux/bootmem.h>
+#include <linux/mv643xx.h>
+#include <asm/time.h>
+#include <asm/page.h>
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/pci.h>
+#include <asm/processor.h>
+#include <asm/ptrace.h>
+#include <asm/reboot.h>
+#include <asm/mc146818rtc.h>
+#include <asm/tlbflush.h>
+#include "ocelot_3_fpga.h"
+
+/* Marvell Discovery Register Base */
+unsigned long marvell_base = (signed)0xf4000000;
+
+/* CPU clock */
+unsigned long cpu_clock;
+
+/* RTC/NVRAM */
+unsigned char* rtc_base = (unsigned char*)(signed)0xfc800000;
+
+/* FPGA Base */
+unsigned long ocelot_fpga_base = (signed)0xfc000000;
+
+/* Serial base */
+unsigned long uart_base = (signed)0xfd000000;
+
+/*
+ * Marvell Discovery SRAM. This is one place where Ethernet
+ * Tx and Rx descriptors can be placed to improve performance
+ */
+extern unsigned long mv64340_sram_base;
+
+/* These functions are used for rebooting or halting the machine*/
+extern void momenco_ocelot_restart(char *command);
+extern void momenco_ocelot_halt(void);
+extern void momenco_ocelot_power_off(void);
+
+void momenco_time_init(void);
+static char reset_reason;
+
+void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
+ unsigned long entryhi, unsigned long pagemask);
+
+static inline unsigned long ENTRYLO(unsigned long paddr)
+{
+ return ((paddr & PAGE_MASK) |
+ (_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL |
+ _CACHE_UNCACHED)) >> 6;
+}
+
+void __init bus_error_init(void)
+{
+ /* nothing */
+}
+
+/*
+ * setup code for a handoff from a version 2 PMON 2000 PROM
+ */
+void setup_wired_tlb_entries(void)
+{
+ write_c0_wired(0);
+ local_flush_tlb_all();
+
+ /* marvell and extra space */
+ add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), (signed)0xf4000000, PM_64K);
+
+ /* fpga, rtc, and uart */
+ add_wired_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfd000000), (signed)0xfc000000, PM_16M);
+}
+
+#define CONV_BCD_TO_BIN(val) (((val) & 0xf) + (((val) >> 4) * 10))
+#define CONV_BIN_TO_BCD(val) (((val) % 10) + (((val) / 10) << 4))
+
+unsigned long m48t37y_get_time(void)
+{
+ unsigned int year, month, day, hour, min, sec;
+
+ /* stop the update */
+ rtc_base[0x7ff8] = 0x40;
+
+ year = CONV_BCD_TO_BIN(rtc_base[0x7fff]);
+ year += CONV_BCD_TO_BIN(rtc_base[0x7ff1]) * 100;
+
+ month = CONV_BCD_TO_BIN(rtc_base[0x7ffe]);
+
+ day = CONV_BCD_TO_BIN(rtc_base[0x7ffd]);
+
+ hour = CONV_BCD_TO_BIN(rtc_base[0x7ffb]);
+ min = CONV_BCD_TO_BIN(rtc_base[0x7ffa]);
+ sec = CONV_BCD_TO_BIN(rtc_base[0x7ff9]);
+
+ /* start the update */
+ rtc_base[0x7ff8] = 0x00;
+
+ return mktime(year, month, day, hour, min, sec);
+}
+
+int m48t37y_set_time(unsigned long sec)
+{
+ struct rtc_time tm;
+
+ /* convert to a more useful format -- note months count from 0 */
+ to_tm(sec, &tm);
+ tm.tm_mon += 1;
+
+ /* enable writing */
+ rtc_base[0x7ff8] = 0x80;
+
+ /* year */
+ rtc_base[0x7fff] = CONV_BIN_TO_BCD(tm.tm_year % 100);
+ rtc_base[0x7ff1] = CONV_BIN_TO_BCD(tm.tm_year / 100);
+
+ /* month */
+ rtc_base[0x7ffe] = CONV_BIN_TO_BCD(tm.tm_mon);
+
+ /* day */
+ rtc_base[0x7ffd] = CONV_BIN_TO_BCD(tm.tm_mday);
+
+ /* hour/min/sec */
+ rtc_base[0x7ffb] = CONV_BIN_TO_BCD(tm.tm_hour);
+ rtc_base[0x7ffa] = CONV_BIN_TO_BCD(tm.tm_min);
+ rtc_base[0x7ff9] = CONV_BIN_TO_BCD(tm.tm_sec);
+
+ /* day of week -- not really used, but let's keep it up-to-date */
+ rtc_base[0x7ffc] = CONV_BIN_TO_BCD(tm.tm_wday + 1);
+
+ /* disable writing */
+ rtc_base[0x7ff8] = 0x00;
+
+ return 0;
+}
+
+void momenco_timer_setup(struct irqaction *irq)
+{
+ setup_irq(7, irq); /* Timer interrupt, unmask status IM7 */
+}
+
+void momenco_time_init(void)
+{
+ setup_wired_tlb_entries();
+
+ /*
+ * Ocelot-3 board has been built with both
+ * the Rm7900 and the Rm7065C
+ */
+ mips_hpt_frequency = cpu_clock / 2;
+ board_timer_setup = momenco_timer_setup;
+
+ rtc_get_time = m48t37y_get_time;
+ rtc_set_time = m48t37y_set_time;
+}
+
+/*
+ * PCI Support for Ocelot-3
+ */
+
+/* Bus #0 IO and MEM space */
+#define OCELOT_3_PCI_IO_0_START 0xe0000000
+#define OCELOT_3_PCI_IO_0_SIZE 0x08000000
+#define OCELOT_3_PCI_MEM_0_START 0xc0000000
+#define OCELOT_3_PCI_MEM_0_SIZE 0x10000000
+
+/* Bus #1 IO and MEM space */
+#define OCELOT_3_PCI_IO_1_START 0xe8000000
+#define OCELOT_3_PCI_IO_1_SIZE 0x08000000
+#define OCELOT_3_PCI_MEM_1_START 0xd0000000
+#define OCELOT_3_PCI_MEM_1_SIZE 0x10000000
+
+static struct resource mv_pci_io_mem0_resource = {
+ .name = "MV64340 PCI0 IO MEM",
+ .start = OCELOT_3_PCI_IO_0_START,
+ .end = OCELOT_3_PCI_IO_0_START + OCELOT_3_PCI_IO_0_SIZE - 1,
+ .flags = IORESOURCE_IO,
+};
+
+static struct resource mv_pci_io_mem1_resource = {
+ .name = "MV64340 PCI1 IO MEM",
+ .start = OCELOT_3_PCI_IO_1_START,
+ .end = OCELOT_3_PCI_IO_1_START + OCELOT_3_PCI_IO_1_SIZE - 1,
+ .flags = IORESOURCE_IO,
+};
+
+static struct resource mv_pci_mem0_resource = {
+ .name = "MV64340 PCI0 MEM",
+ .start = OCELOT_3_PCI_MEM_0_START,
+ .end = OCELOT_3_PCI_MEM_0_START + OCELOT_3_PCI_MEM_0_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct resource mv_pci_mem1_resource = {
+ .name = "MV64340 PCI1 MEM",
+ .start = OCELOT_3_PCI_MEM_1_START,
+ .end = OCELOT_3_PCI_MEM_1_START + OCELOT_3_PCI_MEM_1_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct mv_pci_controller mv_bus0_controller = {
+ .pcic = {
+ .pci_ops = &mv_pci_ops,
+ .mem_resource = &mv_pci_mem0_resource,
+ .io_resource = &mv_pci_io_mem0_resource,
+ },
+ .config_addr = MV64340_PCI_0_CONFIG_ADDR,
+ .config_vreg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG,
+};
+
+static struct mv_pci_controller mv_bus1_controller = {
+ .pcic = {
+ .pci_ops = &mv_pci_ops,
+ .mem_resource = &mv_pci_mem1_resource,
+ .io_resource = &mv_pci_io_mem1_resource,
+ },
+ .config_addr = MV64340_PCI_1_CONFIG_ADDR,
+ .config_vreg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG,
+};
+
+static __init int __init ja_pci_init(void)
+{
+ uint32_t enable;
+ extern int pci_probe_only;
+
+ /* PMON will assign PCI resources */
+ pci_probe_only = 1;
+
+ enable = ~MV_READ(MV64340_BASE_ADDR_ENABLE);
+ /*
+ * We require at least one enabled I/O or PCI memory window or we
+ * will ignore this PCI bus. We ignore PCI windows 1, 2 and 3.
+ */
+ if (enable & (0x01 << 9) || enable & (0x01 << 10))
+ register_pci_controller(&mv_bus0_controller.pcic);
+
+ if (enable & (0x01 << 14) || enable & (0x01 << 15))
+ register_pci_controller(&mv_bus1_controller.pcic);
+
+ ioport_resource.end = OCELOT_3_PCI_IO_0_START + OCELOT_3_PCI_IO_0_SIZE +
+ OCELOT_3_PCI_IO_1_SIZE - 1;
+
+ iomem_resource.end = OCELOT_3_PCI_MEM_0_START + OCELOT_3_PCI_MEM_0_SIZE +
+ OCELOT_3_PCI_MEM_1_SIZE - 1;
+
+ set_io_port_base(OCELOT_3_PCI_IO_0_START); /* mips_io_port_base */
+
+ return 0;
+}
+
+arch_initcall(ja_pci_init);
+
+static int __init momenco_ocelot_3_setup(void)
+{
+ unsigned int tmpword;
+
+ board_time_init = momenco_time_init;
+
+ _machine_restart = momenco_ocelot_restart;
+ _machine_halt = momenco_ocelot_halt;
+ _machine_power_off = momenco_ocelot_power_off;
+
+ /* Wired TLB entries */
+ setup_wired_tlb_entries();
+
+ /* shut down ethernet ports, just to be sure our memory doesn't get
+ * corrupted by random ethernet traffic.
+ */
+ MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8);
+ MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8);
+ MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8);
+ MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8);
+ do {}
+ while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff);
+ do {}
+ while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff);
+ do {}
+ while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff);
+ do {}
+ while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff);
+ MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0),
+ MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1);
+ MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1),
+ MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1);
+
+ /* Turn off the Bit-Error LED */
+ OCELOT_FPGA_WRITE(0x80, CLR);
+
+ tmpword = OCELOT_FPGA_READ(BOARDREV);
+ if (tmpword < 26)
+ printk("Momenco Ocelot-3: Board Assembly Rev. %c\n",
+ 'A'+tmpword);
+ else
+ printk("Momenco Ocelot-3: Board Assembly Revision #0x%x\n",
+ tmpword);
+
+ tmpword = OCELOT_FPGA_READ(FPGA_REV);
+ printk("FPGA Rev: %d.%d\n", tmpword>>4, tmpword&15);
+ tmpword = OCELOT_FPGA_READ(RESET_STATUS);
+ printk("Reset reason: 0x%x\n", tmpword);
+ switch (tmpword) {
+ case 0x1:
+ printk(" - Power-up reset\n");
+ break;
+ case 0x2:
+ printk(" - Push-button reset\n");
+ break;
+ case 0x4:
+ printk(" - cPCI bus reset\n");
+ break;
+ case 0x8:
+ printk(" - Watchdog reset\n");
+ break;
+ case 0x10:
+ printk(" - Software reset\n");
+ break;
+ default:
+ printk(" - Unknown reset cause\n");
+ }
+ reset_reason = tmpword;
+ OCELOT_FPGA_WRITE(0xff, RESET_STATUS);
+
+ tmpword = OCELOT_FPGA_READ(CPCI_ID);
+ printk("cPCI ID register: 0x%02x\n", tmpword);
+ printk(" - Slot number: %d\n", tmpword & 0x1f);
+ printk(" - PCI bus present: %s\n", tmpword & 0x40 ? "yes" : "no");
+ printk(" - System Slot: %s\n", tmpword & 0x20 ? "yes" : "no");
+
+ tmpword = OCELOT_FPGA_READ(BOARD_STATUS);
+ printk("Board Status register: 0x%02x\n", tmpword);
+ printk(" - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent");
+ printk(" - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent");
+ printk(" - L3 cache size: %d MB\n", (1<<((tmpword&12) >> 2))&~1);
+
+ /* Support for 128 MB memory */
+ add_memory_region(0x0, 0x08000000, BOOT_MEM_RAM);
+
+ return 0;
+}
+
+early_initcall(momenco_ocelot_3_setup);
#include <linux/config.h>
-#if defined(CONFIG_KGDB)
+#ifdef CONFIG_KGDB
#include <asm/serial.h> /* For the serial port location and base baud */
no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL
};
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
/*
* Clear all of the interrupts while we change the able around a bit.
/* Sets the first-level interrupt dispatcher. */
set_except_vector(0, ocelot_handle_int);
- init_generic_irq();
mips_cpu_irq_init(0);
/* set up the cascading interrupts */
mv64340_irq_init(16);
uart_irq_init();
cpci_irq_init();
-
-#ifdef CONFIG_KGDB
- printk("start kgdb ...\n");
- set_debug_traps();
- breakpoint(); /* you may move this line to whereever you want :-) */
-#endif
}
#include <linux/config.h>
-#if defined(CONFIG_KGDB)
+#ifdef CONFIG_KGDB
#include <asm/serial.h> /* For the serial port location and base baud */
*/
void gt64240_time_init(void)
{
- extern irq_desc_t irq_desc[NR_IRQS];
static struct irqaction timer;
/* Stop the timer -- we'll use timer #0 */
extern asmlinkage void ocelot_handle_int(void);
extern void gt64240_irq_init(void);
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
/*
* Clear all of the interrupts while we change the able around a bit.
/* Sets the first-level interrupt dispatcher. */
set_except_vector(0, ocelot_handle_int);
- init_generic_irq();
mips_cpu_irq_init(0);
rm7k_cpu_irq_init(8);
gt64240_irq_init();
-
-#ifdef CONFIG_KGDB
- printk("start kgdb ...\n");
- set_debug_traps();
- breakpoint(); /* you may move this line to whereever you want :-) */
-#endif
}
obj-$(CONFIG_DDB5074) += fixup-ddb5074.o pci-ddb5074.o ops-ddb5074.o
obj-$(CONFIG_DDB5476) += ops-ddb5476.o pci-ddb5476.o
obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o
-obj-$(CONFIG_HP_LASERJET) += pci-hplj.o
-obj-$(CONFIG_LASAT) += pci-lasat.o fixup-lasat.o
+obj-$(CONFIG_LASAT) += pci-lasat.o
obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
obj-$(CONFIG_MIPS_EV96100) += fixup-ev64120.o
obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o
obj-$(CONFIG_MOMENCO_JAGUAR_ATX)+= fixup-jaguar.o
obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o
+obj-$(CONFIG_MOMENCO_OCELOT_3) += fixup-ocelot3.o
obj-$(CONFIG_MOMENCO_OCELOT_C) += fixup-ocelot-c.o pci-ocelot-c.o
obj-$(CONFIG_MOMENCO_OCELOT_G) += fixup-ocelot-g.o pci-ocelot-g.o
obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \
return irq_tab[slot][pin];
}
-void __init pcibios_fixup_irqs(void)
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
{
+ return 0;
}
-#if CONFIG_KGDB
+#ifdef CONFIG_KGDB
/*
* The PCI scan may have moved the saa9730 I/O address, so reread
* the address here.
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
- atlas_saa9730_base_fixup);
+ atlas_saa9730_base_fixup);
#endif
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
-return irq_tab_alchemy[slot][pin];
+ return irq_tab_alchemy[slot][pin];
+}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
}
{
return irq_tab_capcella[slot][pin];
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_GALILEO, PCI_ANY_ID,
- qube_raq_galileo_fixup);
+ qube_raq_galileo_fixup);
static char irq_tab_cobalt[] __initdata = {
[COBALT_PCICONF_CPU] = 0,
return irq_tab_cobalt[slot];
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
- ddb5074_fixup);
+ ddb5074_fixup);
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE,
- ddb5477_amd_lance_fixup);
+ ddb5477_amd_lance_fixup);
{
return irq_tab_ev96100[slot][pin];
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/pci.h>
-#include <asm/pci_channel.h>
#include <asm/ip32/ip32_ints.h>
/*
* O2 has up to 5 PCI devices connected into the MACE bridge. The device
{
return irq_tab_mace[slot][pin];
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
return irq_tab_ite8172g[slot][pin];
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
return irq_tab_ivr[slot][pin];
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
* Marvell wants an NDA for their docs so this was written without
* documentation. You've been warned.
*
- * Copyright (C) 2004 Ralf Baechle
+ * Copyright (C) 2004 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/mipsregs.h>
-#include <asm/pci_channel.h>
/*
* WARNING: Example of how _NOT_ to do it.
return 0;
panic("Whooops in pcibios_map_irq");
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
return irq;
}
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
/* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
+++ /dev/null
-#include <linux/init.h>
-#include <linux/pci.h>
-
-void __init pcibios_fixup_irqs(void)
-{
-}
return pci_irq[virq];
}
-void __init pcibios_fixup_irqs(void)
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
{
+ return 0;
}
-
static void __init malta_piix_func0_fixup(struct pci_dev *pdev)
{
unsigned char reg_val;
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB,
- malta_piix_func1_fixup);
+ malta_piix_func1_fixup);
return irq_tab_mpc30x[slot];
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
return 0;
panic("Whooops in pcibios_map_irq");
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
return -1;
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2004 Montavista Software Inc.
+ * Author: Manish Lachwani (mlachwani@mvista.com)
+ *
+ * Looking at the schematics for the Ocelot-3 board, there are
+ * two PCI busses and each bus has two PCI slots.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/mipsregs.h>
+
+/*
+ * Do platform specific device initialization at
+ * pci_enable_device() time
+ */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int bus = dev->bus->number;
+
+ if (bus == 0 && slot == 1)
+ return 2; /* PCI-X A */
+ if (bus == 0 && slot == 2)
+ return 3; /* PCI-X B */
+ if (bus == 1 && slot == 1)
+ return 4; /* PCI A */
+ if (bus == 1 && slot == 2)
+ return 5; /* PCI B */
+
+return 0;
+ panic("Whooops in pcibios_map_irq");
+}
*
* Copyright (C) 2000-2001 Toshiba Corporation
*
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani (mlachwani@mvista.com)
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
return irq;
}
-
-#ifdef TX4927_SUPPORT_PCI_66
-extern int tx4927_pci66;
-extern void tx4927_pci66_setup(void);
-#endif
-extern void tx4927_pci_setup(void);
-
-#ifdef TX4927_SUPPORT_PCI_66
-int tx4927_pci66_check(void)
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
- struct pci_dev *dev;
- unsigned short stat;
- int cap66 = 1;
-
- if (tx4927_pci66 < 0)
- return 0;
-
- /* check 66MHz capability */
- pci_for_each_dev(dev) {
- if (cap66) {
- pci_read_config_word(dev, PCI_STATUS, &stat);
- if (!(stat & PCI_STATUS_66MHZ)) {
- printk(KERN_INFO
- "PCI: %02x:%02x not 66MHz capable.\n",
- dev->bus->number, dev->devfn);
- cap66 = 0;
- }
- }
- }
- return cap66;
-}
-#endif
-
-void __init pcibios_fixup_irqs(void)
-{
- unsigned char pin;
unsigned char irq;
- struct pci_dev *dev;
- unsigned int id;
-
-#ifdef TX4927_SUPPORT_PCI_66
- if (tx4927_pci66_check()) {
- tx4927_pci66_setup();
- tx4927_pci_setup(); /* Reinitialize PCIC */
- }
-#endif
- pci_for_each_dev(dev) {
- DBG("FIXUP:\n");
- DBG(" devfn=0x%02x (0x%02x:0x%02x)\n",
- dev->devfn, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn));
+ printk("PCI Setup for pin %d \n", pin);
- pci_read_config_dword(dev, PCI_VENDOR_ID, &id);
- DBG(" id=0x%08x\n", id);
+ if (dev->device == 0x9130) /* IDE */
+ irq = 14;
+ else
+ irq = pci_get_irq(dev, pin);
- pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
- DBG(" line=0x%02x/%d\n", irq, irq);
-
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- DBG(" pin=%d\n", pin);
-
-#ifdef DEBUG
- {
- unsigned int tmp;
- pci_read_config_dword(dev, 0x10, &tmp);
- DBG(" bar0:0x10=0x%08x\n", tmp);
- pci_read_config_dword(dev, 0x14, &tmp);
- DBG(" bar1:0x14=0x%08x\n", tmp);
- pci_read_config_dword(dev, 0x1c, &tmp);
- DBG(" bar2:0x1c=0x%08x\n", tmp);
- pci_read_config_dword(dev, 0x20, &tmp);
- DBG(" bar3:0x20=0x%08x\n", tmp);
- pci_read_config_dword(dev, 0x24, &tmp);
- DBG(" bar4:0x24=0x%08x\n", tmp);
- }
-#endif
-
- irq = 0;
-
- if (id == 0x91301055) { /* ide */
- irq = 14;
- }
-
- if (pin == 0) {
- DBG(" auto irq (now=%d) -- skipping pin=0\n", irq);
- } else if (irq) {
- DBG(" auto irq (now=%d) -- skipping hardcoded irq\n", irq);
- } else {
- DBG(" auto irq (was=%d)\n", irq);
- irq = pci_get_irq(dev, pin);
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
- irq);
- dev->irq = irq;
- DBG(" auto irq (now=%d)\n", irq);
- }
-
- pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
- printk(KERN_INFO
- "PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",
- dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), irq);
+ return irq;
+}
- }
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
}
*
* SNI specific PCI support for RM200/RM300.
*
- * Copyright (C) 1997 - 2000, 2003 Ralf Baechle
+ * Copyright (C) 1997 - 2000, 2003, 04 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/mipsregs.h>
-#include <asm/pci_channel.h>
#include <asm/sni.h>
/*
return irq_tab_rm200[slot][pin];
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
return irq;
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
return irq;
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
return 3; /* Everything goes to one irq bit */
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
int where, int size, u32 * val)
{
switch (size) {
- case 1:
- return read_config_byte(bus, devfn, where, (u8 *) val);
- case 2:
- return read_config_word(bus, devfn, where, (u16 *) val);
+ case 1: {
+ u8 _val;
+ int rc = read_config_byte(bus, devfn, where, &_val);
+ *val = _val;
+ return rc;
+ }
+ case 2: {
+ u16 _val;
+ int rc = read_config_word(bus, devfn, where, &_val);
+ *val = _val;
+ return rc;
+ }
default:
return read_config_dword(bus, devfn, where, val);
}
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
#include <linux/kernel.h>
#include <linux/init.h>
-#include <asm/pci_channel.h>
#include <asm/it8172/it8172.h>
#include <asm/it8172/it8172_pci.h>
switch (size) {
case 1:
- TITAN_READ_8(data_reg + (reg & 0x3), val);
+ *val = TITAN_READ_8(data_reg + (~reg & 0x3));
break;
case 2:
- TITAN_READ_16(data_reg + (reg & 0x2), val);
+ *val = TITAN_READ_16(data_reg + (~reg & 0x2));
break;
case 4:
- TITAN_READ(data_reg, val);
+ *val = TITAN_READ(data_reg);
break;
}
/* write the data */
switch (size) {
case 1:
- TITAN_WRITE_8(data_reg + (reg & 0x3), val);
+ TITAN_WRITE_8(data_reg + (~reg & 0x3), val);
break;
case 2:
- TITAN_WRITE_16(data_reg + (reg & 0x2), val);
+ TITAN_WRITE_16(data_reg + (~reg & 0x2), val);
break;
case 4:
titan_read_config,
titan_write_config,
};
-
-void __init pcibios_init(void)
-{
- /*
- * XXX These values below need to change
- */
- ioport_resource.start = 0xe0000000;
- ioport_resource.end = 0xe0000000 + 0x20000000 - 1;
- iomem_resource.start = 0xc0000000;
- iomem_resource.end = 0xc0000000 + 0x20000000 - 1;
-
- pci_scan_bus(0, &titan_pci_ops, NULL);
-}
* ahennessy@mvista.com
*
* Copyright (C) 2000-2001 Toshiba Corporation
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
*
#include <linux/init.h>
#include <asm/addrspace.h>
-#include <asm/pci_channel.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/debug.h>
* ahennessy@mvista.com
*
* Copyright (C) 2000-2001 Toshiba Corporation
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
*
* Much of the code is derived from the original DDB5074 port by
* Geert Uytterhoeven <geert@sonycom.com>
*
+ * Copyright 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani (mlachwani@mvista.com)
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
#include <linux/init.h>
#include <asm/addrspace.h>
-#include <asm/pci_channel.h>
#include <asm/tx4927/tx4927_pci.h>
#include <asm/debug.h>
/* initialize in setup */
struct resource pci_io_resource = {
- "pci IO space",
- (PCIBIOS_MIN_IO),
- ((PCIBIOS_MIN_IO) + (TX4927_PCIIO_SIZE)) - 1,
- IORESOURCE_IO
+ .name = "TX4927 PCI IO SPACE",
+ .start = 0x1000,
+ .end = (0x1000 + (TX4927_PCIIO_SIZE)) - 1,
+ .flags = IORESOURCE_IO
};
/* initialize in setup */
struct resource pci_mem_resource = {
- "pci memory space",
- TX4927_PCIMEM,
- TX4927_PCIMEM + TX4927_PCIMEM_SIZE - 1,
- IORESOURCE_MEM
-};
-
-extern struct pci_ops tx4927_pci_ops;
-
-/*
- * h/w only supports devices 0x00 to 0x14
- */
-struct pci_controller tx4927_controller = {
- .pci_ops = &tx4927_pci_ops,
- .io_resource = &pci_io_resource,
- .mem_resource = &pci_mem_resource,
+ .name = "TX4927 PCI MEM SPACE",
+ .start = TX4927_PCIMEM,
+ .end = TX4927_PCIMEM + TX4927_PCIMEM_SIZE - 1,
+ .flags = IORESOURCE_MEM
};
-static int mkaddr(unsigned char bus, unsigned char dev_fn,
- unsigned char where, int *flagsp)
+static int mkaddr(int bus, int dev_fn, int where, int *flagsp)
{
if (bus > 0) {
/* Type 1 configuration */
return code;
}
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int tx4927_pcibios_read_config_byte(struct pci_dev *dev,
- int where, unsigned char *val)
+static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, int where,
+ int size, u32 * val)
{
- int flags, retval;
- unsigned char bus, func_num;
+ int flags, retval, dev, busno, func;
- db_assert((where & 3) == 0);
- db_assert(where < (1 << 8));
+ busno = bus->number;
+ dev = PCI_SLOT(devfn);
+ func = PCI_FUNC(devfn);
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
+ if (size == 2) {
+ if (where & 1)
+ return PCIBIOS_BAD_REGISTER_NUMBER;
}
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
-#ifdef __BIG_ENDIAN
- *val =
- *(volatile u8 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | ((where & 3) ^ 3));
-#else
- *val =
- *(volatile u8 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | (where & 3));
-#endif
- retval = check_abort(flags);
- if (retval == PCIBIOS_DEVICE_NOT_FOUND)
- *val = 0xff;
- return retval;
-}
-
-static int tx4927_pcibios_read_config_word(struct pci_dev *dev,
- int where, unsigned short *val)
-{
- int flags, retval;
- unsigned char bus, func_num;
-
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- db_assert((where & 3) == 0);
- db_assert(where < (1 << 8));
+ if (size == 4) {
+ if (where & 3)
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+ }
/* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
+ if (bus->parent != NULL) {
+ busno = bus->number;
} else {
- bus = 0;
+ busno = 0;
}
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
+ if (mkaddr(busno, devfn, where, &flags))
return -1;
-#ifdef __BIG_ENDIAN
- *val =
- *(volatile u16 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | ((where & 3) ^ 2));
-#else
- *val =
- *(volatile u16 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | (where & 3));
-#endif
- retval = check_abort(flags);
- if (retval == PCIBIOS_DEVICE_NOT_FOUND)
- *val = 0xffff;
- return retval;
-}
-
-static int tx4927_pcibios_read_config_dword(struct pci_dev *dev,
- int where, unsigned int *val)
-{
- int flags, retval;
- unsigned char bus, func_num;
-
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- db_assert((where & 3) == 0);
- db_assert(where < (1 << 8));
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
+ switch (size) {
+ case 1:
+ *val = *(volatile u8 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | (where & 3));
+ break;
+ case 2:
+ *val = *(volatile u16 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | (where & 3));
+ break;
+ case 4:
+ *val = tx4927_pcicptr->g2pcfgdata;
+ break;
}
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
- *val = tx4927_pcicptr->g2pcfgdata;
retval = check_abort(flags);
if (retval == PCIBIOS_DEVICE_NOT_FOUND)
*val = 0xffffffff;
return retval;
}
-static int tx4927_pcibios_write_config_byte(struct pci_dev *dev,
- int where, unsigned char val)
+static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where,
+ int size, u32 val)
{
- int flags;
- unsigned char bus, func_num;
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
+ int flags, dev, busno, func;
+ busno = bus->number;
+ dev = PCI_SLOT(devfn);
+ func = PCI_FUNC(devfn);
+
+ if (size == 1) {
+ if (where & 1)
+ return PCIBIOS_BAD_REGISTER_NUMBER;
}
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
-#ifdef __BIG_ENDIAN
- *(volatile u8 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | ((where & 3) ^ 3)) = val;
-#else
- *(volatile u8 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | (where & 3)) = val;
-#endif
- return check_abort(flags);
-}
-
-static int tx4927_pcibios_write_config_word(struct pci_dev *dev,
- int where, unsigned short val)
-{
- int flags;
- unsigned char bus, func_num;
-
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
+ if (size == 4) {
+ if (where & 3)
+ return PCIBIOS_BAD_REGISTER_NUMBER;
+ }
/* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
+ if (bus->parent != NULL) {
+ busno = bus->number;
} else {
- bus = 0;
+ busno = 0;
}
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
+ if (mkaddr(busno, devfn, where, &flags))
return -1;
-#ifdef __BIG_ENDIAN
- *(volatile u16 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | ((where & 3) ^ 2)) = val;
-#else
- *(volatile u16 *) ((ulong) & tx4927_pcicptr->
- g2pcfgdata | (where & 3)) = val;
-#endif
- return check_abort(flags);
-}
-
-static int tx4927_pcibios_write_config_dword(struct pci_dev *dev,
- int where, unsigned int val)
-{
- int flags;
- unsigned char bus, func_num;
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
-
- /* check if the bus is top-level */
- if (dev->bus->parent != NULL) {
- bus = dev->bus->number;
- db_assert(bus != 0);
- } else {
- bus = 0;
+ switch (size) {
+ case 1:
+ *(volatile u8 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | (where & 3)) = val;
+ break;
+
+ case 2:
+ *(volatile u16 *) ((ulong) & tx4927_pcicptr->
+ g2pcfgdata | (where & 3)) = val;
+ break;
+ case 4:
+ tx4927_pcicptr->g2pcfgdata = val;
+ break;
}
- func_num = PCI_FUNC(dev->devfn);
- if (mkaddr(bus, dev->devfn, where, &flags))
- return -1;
- tx4927_pcicptr->g2pcfgdata = val;
return check_abort(flags);
}
struct pci_ops tx4927_pci_ops = {
- tx4927_pcibios_read_config_byte,
- tx4927_pcibios_read_config_word,
- tx4927_pcibios_read_config_dword,
- tx4927_pcibios_write_config_byte,
- tx4927_pcibios_write_config_word,
- tx4927_pcibios_write_config_dword
+ tx4927_pcibios_read_config,
+ tx4927_pcibios_write_config
+};
+
+/*
+ * h/w only supports devices 0x00 to 0x14
+ */
+struct pci_controller tx4927_controller = {
+ .pci_ops = &tx4927_pci_ops,
+ .io_resource = &pci_io_resource,
+ .mem_resource = &pci_mem_resource,
};
#include <linux/types.h>
#include <linux/pci.h>
-#include <asm/pci_channel.h>
#include <asm/debug.h>
#include <asm/ddb5xxx/ddb5xxx.h>
return irq_map[slot];
}
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
void __init ddb_pci_reset_bus(void)
{
u32 temp;
#include <linux/types.h>
#include <linux/pci.h>
-#include <asm/pci_channel.h>
#include <asm/debug.h>
#include <asm/ddb5xxx/ddb5xxx.h>
return irq_map[slot];
}
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
void __init ddb_pci_reset_bus(void)
{
u32 temp;
* Copyright (C) 2001 MontaVista Software Inc.
* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
*
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
#include <linux/pci.h>
#include <asm/bootinfo.h>
-#include <asm/pci_channel.h>
#include <asm/debug.h>
#include <asm/ddb5xxx/ddb5xxx.h>
return irq;
}
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
void ddb_pci_reset_bus(void)
{
u32 temp;
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
#include <linux/kernel.h>
#include <linux/init.h>
-#include <asm/pci_channel.h>
-
static struct resource pci_io_resource = {
.name = "io pci IO space",
.start = 0x10000000,
+++ /dev/null
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SNI specific PCI support for RM200/RM300.
- *
- * Copyright (C) 1997 - 2000 Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/types.h>
-#include <asm/byteorder.h>
-#include <asm/pci_channel.h>
-#include <asm/hp-lj/asic.h>
-
-static volatile u32 *pci_config_address_reg = (volatile u32 *) 0xfdead000;
-static volatile u32 *pci_config_data_reg = (volatile u32 *) 0xfdead000;
-
-
-
-#define cfgaddr(dev, where) (((dev->bus->number & 0xff) << 0x10) | \
- ((dev->devfn & 0xff) << 0x08) | \
- (where & 0xfc))
-
-/*
- * We can't address 8 and 16 bit words directly. Instead we have to
- * read/write a 32bit word and mask/modify the data we actually want.
- */
-static int pcimt_read_config_byte(struct pci_dev *dev,
- int where, unsigned char *val)
-{
- *pci_config_address_reg = cfgaddr(dev, where);
- *val =
- (le32_to_cpu(*pci_config_data_reg) >> ((where & 3) << 3)) &
- 0xff;
- //printk("pci_read_byte 0x%x == 0x%x\n", where, *val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pcimt_read_config_word(struct pci_dev *dev,
- int where, unsigned short *val)
-{
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- *pci_config_address_reg = cfgaddr(dev, where);
- *val =
- (le32_to_cpu(*pci_config_data_reg) >> ((where & 3) << 3)) &
- 0xffff;
- //printk("pci_read_word 0x%x == 0x%x\n", where, *val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-int pcimt_read_config_dword(struct pci_dev *dev,
- int where, unsigned int *val)
-{
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- *pci_config_address_reg = cfgaddr(dev, where);
- *val = le32_to_cpu(*pci_config_data_reg);
- //printk("pci_read_dword 0x%x == 0x%x\n", where, *val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pcimt_write_config_byte(struct pci_dev *dev,
- int where, unsigned char val)
-{
- *pci_config_address_reg = cfgaddr(dev, where);
- *(volatile u8 *) (((int) pci_config_data_reg) + (where & 3)) = val;
- //printk("pci_write_byte 0x%x = 0x%x\n", where, val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pcimt_write_config_word(struct pci_dev *dev,
- int where, unsigned short val)
-{
- if (where & 1)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- *pci_config_address_reg = cfgaddr(dev, where);
- *(volatile u16 *) (((int) pci_config_data_reg) + (where & 2)) =
- le16_to_cpu(val);
- //printk("pci_write_word 0x%x = 0x%x\n", where, val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-int pcimt_write_config_dword(struct pci_dev *dev,
- int where, unsigned int val)
-{
- if (where & 3)
- return PCIBIOS_BAD_REGISTER_NUMBER;
- *pci_config_address_reg = cfgaddr(dev, where);
- *pci_config_data_reg = le32_to_cpu(val);
- //printk("pci_write_dword 0x%x = 0x%x\n", where, val);
- return PCIBIOS_SUCCESSFUL;
-}
-
-
-
-struct pci_ops hp_pci_ops = {
- pcimt_read_config_byte,
- pcimt_read_config_word,
- pcimt_read_config_dword,
- pcimt_write_config_byte,
- pcimt_write_config_word,
- pcimt_write_config_dword
-};
-
-
-struct pci_controller hp_controller = {
- .pci_ops = &hp_pci_ops,
- .io_resource = &ioport_resource,
- .mem_resource = &iomem_resource,
-};
-
-void __init pcibios_fixup_irqs(void)
-{
- struct pci_dev *dev = NULL;
- int slot_num;
-
- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
- slot_num = PCI_SLOT(dev->devfn);
- switch (slot_num) {
- case 2:
- dev->irq = 3;
- break;
- case 3:
- dev->irq = 4;
- break;
- case 4:
- dev->irq = 5;
- break;
- default:
- break;
- }
- }
-}
-
-#define IO_MEM_LOGICAL_START 0x3e000000
-#define IO_MEM_LOGICAL_END 0x3fefffff
-
-#define IO_PORT_LOGICAL_START 0x3ff00000
-#define IO_PORT_LOGICAL_END 0x3fffffff
-
-
-#define IO_MEM_VIRTUAL_OFFSET 0xb0000000
-#define IO_PORT_VIRTUAL_OFFSET 0xb0000000
-
-#define ONE_MEG (1024 * 1024)
-
-void __init pci_setup(void)
-{
- u32 pci_regs_base_offset = 0xfdead000;
-
- switch (GetAsicId()) {
- case AndrosAsic:
- pci_regs_base_offset = 0xbff80000;
- break;
- case HarmonyAsic:
- pci_regs_base_offset = 0xbff70000;
- break;
- default:
- printk("ERROR: PCI does not support %s Asic\n",
- GetAsicName());
- while (1);
- break;
- }
-
- // set bus stat/command reg
- // REVIST this setting may need vary depending on the hardware
- *((volatile unsigned int *) (pci_regs_base_offset | 0x0004)) =
- 0x38000007;
-
-
- iomem_resource.start =
- IO_MEM_LOGICAL_START + IO_MEM_VIRTUAL_OFFSET;
- iomem_resource.end = IO_MEM_LOGICAL_END + IO_MEM_VIRTUAL_OFFSET;
-
- ioport_resource.start =
- IO_PORT_LOGICAL_START + IO_PORT_VIRTUAL_OFFSET;
- ioport_resource.end = IO_PORT_LOGICAL_END + IO_PORT_VIRTUAL_OFFSET;
-
- // KLUDGE (mips_io_port_base is screwed up, we've got to work around it here)
- // by letting both low (illegal) and high (legal) addresses appear in pci io space
- ioport_resource.start = 0x0;
-
- set_io_port_base(IO_PORT_LOGICAL_START + IO_PORT_VIRTUAL_OFFSET);
-
- // map the PCI address space
- // global map - all levels & processes can access
- // except that the range is outside user space
- // parameters: lo0, lo1, hi, pagemask
- // lo indicates physical page, hi indicates virtual address
- add_wired_entry((IO_MEM_LOGICAL_START >> 6) | 0x17,
- ((IO_MEM_LOGICAL_START +
- (16 * ONE_MEG)) >> 6) | 0x17, 0xee000000,
- PM_16M);
-
-
- // These are used in pci r/w routines so need to preceed bus scan
- pci_config_data_reg = (u32 *) (((u32) mips_io_port_base) | 0xcfc);
- pci_config_address_reg =
- (u32 *) (((u32) pci_regs_base_offset) | 0xcf8);
-}
* for more details.
*
* Copyright (C) 2003 Christoph Hellwig (hch@lst.de)
- * Copyright (C) 1999, 2000 Ralf Baechle (ralf@gnu.org)
+ * Copyright (C) 1999, 2000, 04 Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/sn/arch.h>
#include <asm/pci/bridge.h>
-#include <asm/pci_channel.h>
#include <asm/paccess.h>
#include <asm/sn/intr.h>
#include <asm/sn/sn0/hub.h>
+extern unsigned int allocate_irqno(void);
+
/*
* Max #PCI busses we can handle; ie, max #PCI bridges.
*/
else
res = get_dbe(*value, (u32 *) addr);
- return PCIBIOS_SUCCESSFUL;
+ return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
oh_my_gawd:
return PCIBIOS_SUCCESSFUL;
}
+static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * value)
+{
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
+ bridge_t *bridge = bc->base;
+ int busno = bus->number;
+ int slot = PCI_SLOT(devfn);
+ int fn = PCI_FUNC(devfn);
+ volatile void *addr;
+ u32 cf, shift, mask;
+ int res;
+
+ bridge->b_pci_cfg = (busno << 16) | (slot << 11);
+ addr = &bridge->b_type1_cfg.c[(fn << 8) | PCI_VENDOR_ID];
+ if (get_dbe(cf, (u32 *) addr))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * generic PCI code a chance to look at it for real ...
+ */
+ if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
+ goto oh_my_gawd;
+
+ bridge->b_pci_cfg = (busno << 16) | (slot << 11);
+ addr = &bridge->b_type1_cfg.c[(fn << 8) | (where ^ (4 - size))];
+
+ if (size == 1)
+ res = get_dbe(*value, (u8 *) addr);
+ else if (size == 2)
+ res = get_dbe(*value, (u16 *) addr);
+ else
+ res = get_dbe(*value, (u32 *) addr);
+
+ return res ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
+
+oh_my_gawd:
+
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * generic PCI code a chance to look at the wrong register.
+ */
+ if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
+ *value = 0;
+ return PCIBIOS_SUCCESSFUL;
+ }
+
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't try to access
+ * anything but 32-bit words ...
+ */
+ bridge->b_pci_cfg = (busno << 16) | (slot << 11);
+ addr = &bridge->b_type1_cfg.c[(fn << 8) | where];
+
+ if (get_dbe(cf, (u32 *) addr))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ shift = ((where & 3) << 3);
+ mask = (0xffffffffU >> ((4 - size) << 3));
+ *value = (cf >> shift) & mask;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int pci_read_config(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 * value)
+{
+ if (bus->number > 0)
+ return pci_conf1_read_config(bus, devfn, where, size, value);
+
+ return pci_conf0_read_config(bus, devfn, where, size, value);
+}
+
static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 value)
{
return PCIBIOS_SUCCESSFUL;
}
+static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 value)
+{
+ struct bridge_controller *bc = BRIDGE_CONTROLLER(bus);
+ bridge_t *bridge = bc->base;
+ int slot = PCI_SLOT(devfn);
+ int fn = PCI_FUNC(devfn);
+ int busno = bus->number;
+ volatile void *addr;
+ u32 cf, shift, mask, smask;
+ int res;
+
+ bridge->b_pci_cfg = (busno << 16) | (slot << 11);
+ addr = &bridge->b_type1_cfg.c[(fn << 8) | PCI_VENDOR_ID];
+ if (get_dbe(cf, (u32 *) addr))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * generic PCI code a chance to look at it for real ...
+ */
+ if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
+ goto oh_my_gawd;
+
+ addr = &bridge->b_type1_cfg.c[(fn << 8) | (where ^ (4 - size))];
+
+ if (size == 1) {
+ res = put_dbe(value, (u8 *) addr);
+ } else if (size == 2) {
+ res = put_dbe(value, (u16 *) addr);
+ } else {
+ res = put_dbe(value, (u32 *) addr);
+ }
+
+ if (res)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return PCIBIOS_SUCCESSFUL;
+
+oh_my_gawd:
+
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * generic PCI code a chance to touch the wrong register.
+ */
+ if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
+ return PCIBIOS_SUCCESSFUL;
+
+ /*
+ * IOC3 is fucked fucked beyond believe ... Don't try to access
+ * anything but 32-bit words ...
+ */
+ addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
+
+ if (get_dbe(cf, (u32 *) addr))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ shift = ((where & 3) << 3);
+ mask = (0xffffffffU >> ((4 - size) << 3));
+ smask = mask << shift;
+
+ cf = (cf & ~smask) | ((value & mask) << shift);
+ if (put_dbe(cf, (u32 *) addr))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int pci_write_config(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 value)
+{
+ if (bus->number > 0)
+ return pci_conf1_write_config(bus, devfn, where, size, value);
+
+ return pci_conf0_write_config(bus, devfn, where, size, value);
+}
+
static struct pci_ops bridge_pci_ops = {
- .read = pci_conf0_read_config,
- .write = pci_conf0_write_config,
+ .read = pci_read_config,
+ .write = pci_write_config,
};
int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid)
{
+ unsigned long offset = NODE_OFFSET(nasid);
struct bridge_controller *bc;
- bridge_t *bridge;
static int num_bridges = 0;
+ bridge_t *bridge;
+ int slot;
printk("a bridge\n");
if (!num_bridges)
ioport_resource.end = ~0UL;
- bc = &bridges[num_bridges++];
+ bc = &bridges[num_bridges];
bc->pc.pci_ops = &bridge_pci_ops;
bc->pc.mem_resource = &bc->mem;
bc->pc.io_resource = &bc->io;
+ bc->pc.index = num_bridges;
+
bc->mem.name = "Bridge PCI MEM";
- bc->pc.mem_offset = 0;
+ bc->pc.mem_offset = offset;
bc->mem.start = 0;
bc->mem.end = ~0UL;
bc->mem.flags = IORESOURCE_MEM;
bc->io.name = "Bridge IO MEM";
+ bc->pc.io_offset = offset;
bc->io.start = 0UL;
- bc->pc.io_offset = 0UL;
bc->io.end = ~0UL;
bc->io.flags = IORESOURCE_IO;
/*
* Until otherwise set up, assume all interrupts are from slot 0
*/
- bridge->b_int_device = (u32) 0x0;
+ bridge->b_int_device = 0x0;
/*
* swap pio's to pci mem and io space (big windows)
bridge->b_dir_map = (masterwid << 20); /* DMA */
bridge->b_int_enable = 0;
+ for (slot = 0; slot < 8; slot ++) {
+ bridge->b_device[slot].reg |= BRIDGE_DEV_SWAP_DIR;
+ bc->pci_int[slot] = -1;
+ }
bridge->b_wid_tflush; /* wait until Bridge PIO complete */
bc->base = bridge;
register_pci_controller(&bc->pc);
+
+ num_bridges++;
+
return 0;
}
int __devinit pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
- int irq;
+ int irq = bc->pci_int[slot];
- irq = allocate_irqno();
-
- /*
- * Argh... This API doesn't handle with errors at all ...
- */
if (irq == -1) {
- printk(KERN_ERR "Can't allocate interrupt for PCI device %s\n",
- pci_name(dev));
- return -1;
+ irq = bc->pci_int[slot] = request_bridge_irq(bc);
+ if (irq < 0)
+ panic("Can't allocate interrupt for PCI device %s\n",
+ pci_name(dev));
}
irq_to_bridge[irq] = bc;
return irq;
}
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
/*
* Device might live on a subordinate PCI bus. XXX Walk up the chain of buses
* to find the slot number in sense of the bridge device register.
* settings.
*/
-static void __init pci_disable_swapping(struct pci_dev *dev)
+static inline void pci_disable_swapping(struct pci_dev *dev)
{
struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
bridge_t *bridge = bc->base;
bridge->b_widget.w_tflush; /* Flush */
}
-static void __init pci_enable_swapping(struct pci_dev *dev)
+static inline void pci_enable_swapping(struct pci_dev *dev)
{
struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
bridge_t *bridge = bc->base;
static void __init pci_fixup_ioc3(struct pci_dev *d)
{
- struct bridge_controller *bc = BRIDGE_CONTROLLER(d->bus);
- unsigned long offset = NODE_OFFSET(bc->nasid);
-
- printk("PCI: Fixing base addresses for IOC3 device %s\n", pci_name(d));
-
- d->resource[0].start |= offset;
- d->resource[0].end |= offset;
-
pci_disable_swapping(d);
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
- pci_fixup_ioc3);
-
-static void __init pci_fixup_isp1020(struct pci_dev *d)
-{
- struct bridge_controller *bc = BRIDGE_CONTROLLER(d->bus);
- unsigned short command;
-
- d->resource[0].start |= (unsigned long) bc->nasid << 32;
- printk("PCI: Fixing isp1020 in [bus:slot.fn] %s\n", pci_name(d));
-
- /*
- * Configure device to allow bus mastering, i/o and memory mapping.
- * Older qlogicisp driver expects to have the IO space enable
- * bit set. Things stop working if we program the controllers as not
- * having PCI_COMMAND_MEMORY, so we have to fudge the mem_flags.
- */
- pci_set_master(d);
- pci_read_config_word(d, PCI_COMMAND, &command);
- command |= PCI_COMMAND_MEMORY;
- command |= PCI_COMMAND_IO;
- pci_write_config_word(d, PCI_COMMAND, command);
- d->resource[1].flags |= 1;
-
- pci_enable_swapping(d);
-}
-
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP1020,
- pci_fixup_isp1020);
-
-static void __init pci_fixup_isp2x00(struct pci_dev *d)
-{
- struct bridge_controller *bc = BRIDGE_CONTROLLER(d->bus);
- bridge_t *bridge = bc->base;
- bridgereg_t devreg;
- int i;
- int slot = PCI_SLOT(d->devfn);
- unsigned int start;
- unsigned short command;
-
- printk("PCI: Fixing isp2x00 in [bus:slot.fn] %s\n", pci_name(d));
-
- /* set the resource struct for this device */
- start = (u32) (u64) bridge; /* yes, we want to lose the upper 32 bits here */
- start |= BRIDGE_DEVIO(slot);
-
- d->resource[0].start = start;
- d->resource[0].end = d->resource[0].start + 0xff;
- d->resource[0].flags = IORESOURCE_IO;
-
- d->resource[1].start = start;
- d->resource[1].end = d->resource[0].start + 0xfff;
- d->resource[1].flags = IORESOURCE_MEM;
-
- /*
- * set the bridge device(x) reg for this device
- */
- devreg = bridge->b_device[slot].reg;
- /* point device(x) to it appropriate small window */
- devreg &= ~BRIDGE_DEV_OFF_MASK;
- devreg |= (start >> 20) & BRIDGE_DEV_OFF_MASK;
- bridge->b_device[slot].reg = devreg;
-
- pci_enable_swapping(d);
-
- /* set card's base addr reg */
- //pci_write_config_dword(d, PCI_BASE_ADDRESS_0, 0x500001);
- //pci_write_config_dword(d, PCI_BASE_ADDRESS_1, 0x8b00000);
- //pci_write_config_dword(d, PCI_ROM_ADDRESS, 0x8b20000);
-
- /* I got these from booting irix on system... */
- pci_write_config_dword(d, PCI_BASE_ADDRESS_0, 0x200001);
- //pci_write_config_dword(d, PCI_BASE_ADDRESS_1, 0xf800000);
- pci_write_config_dword(d, PCI_ROM_ADDRESS, 0x10200000);
-
- pci_write_config_dword(d, PCI_BASE_ADDRESS_1, start);
- //pci_write_config_dword(d, PCI_ROM_ADDRESS, (start | 0x20000));
-
- /* set cache line size */
- pci_write_config_dword(d, PCI_CACHE_LINE_SIZE, 0xf080);
-
- /* set pci bus timeout */
- bridge->b_bus_timeout |= BRIDGE_BUS_PCI_RETRY_HLD(0x3);
- bridge->b_wid_tflush;
- printk("PCI: bridge bus timeout= 0x%x \n", bridge->b_bus_timeout);
-
- /* set host error field */
- bridge->b_int_host_err = 0x44;
- bridge->b_wid_tflush;
-
- bridge->b_wid_tflush; /* wait until Bridge PIO complete */
- for (i = 0; i < 8; i++)
- printk("PCI: device(%d)= 0x%x\n", i,
- bridge->b_device[i].reg);
-
- /* configure device to allow bus mastering, i/o and memory mapping */
- pci_set_master(d);
- pci_read_config_word(d, PCI_COMMAND, &command);
- command |= PCI_COMMAND_MEMORY;
- command |= PCI_COMMAND_IO;
- pci_write_config_word(d, PCI_COMMAND, command);
- /*d->resource[1].flags |= 1; */
-}
-
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100,
- pci_fixup_isp2x00);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200,
- pci_fixup_isp2x00);
+ pci_fixup_ioc3);
* for more details.
*
* Copyright (C) 2000, 2001 Keith M Wesolowski
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/types.h>
-#include <asm/pci_channel.h>
#include <asm/ip32/mace.h>
#include <asm/ip32/ip32_ints.h>
* ahennessy@mvista.com
*
* Copyright (C) 2000-2001 Toshiba Corporation
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
#include <linux/kernel.h>
#include <linux/init.h>
-#include <asm/pci_channel.h>
#include <asm/jmr3927/jmr3927.h>
#include <asm/debug.h>
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2000, 2001 Keith M Wesolowski
+ * Copyright (C) 2000, 2001, 04 Keith M Wesolowski
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
-#include <asm/pci_channel.h>
#include <linux/delay.h>
#include <asm/bootinfo.h>
#define LASATINT_PCIB 6
#define LASATINT_PCIC 7
#define LASATINT_PCID 8
+
int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
switch (slot) {
return -1;
}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2004 by Ralf Baechle
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/mv64340.h>
-#include <asm/pci_channel.h>
#include <linux/init.h>
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2004 by Ralf Baechle
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* This doesn't really fly - but I don't have a GT64240 system for testing.
*/
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/gt64240.h>
-#include <asm/pci_channel.h>
/*
* We assume these address ranges have been programmed into the GT-64240 by
/*
* Copyright (C) 2001,2002,2003 Broadcom Corporation
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/console.h>
+#include <linux/tty.h>
#include <asm/io.h>
-#include <asm/pci_channel.h>
#include <asm/sibyte/sb1250_defs.h>
#include <asm/sibyte/sb1250_regs.h>
return dev->irq;
}
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
/*
* Some checks before doing config cycles:
* In PCI Device Mode, hide everything on bus 0 except the LDT host
static struct resource sb1250_mem_resource = {
.name = "SB1250 PCI MEM",
- .start = 0x14000000UL,
- .end = 0x17ffffffUL,
+ .start = 0x40000000UL,
+ .end = 0x5fffffffUL,
.flags = IORESOURCE_MEM,
};
static struct resource sb1250_io_resource = {
- .name = "SB1250 IO MEM",
- .start = 0x14000000UL,
- .end = 0x17ffffffUL,
+ .name = "SB1250 PCI I/O",
+ .start = 0x00000000UL,
+ .end = 0x01ffffffUL,
.flags = IORESOURCE_IO,
};
struct pci_controller sb1250_controller = {
.pci_ops = &sb1250_pci_ops,
.mem_resource = &sb1250_mem_resource,
- .io_resource = &sb1250_io_resource
+ .io_resource = &sb1250_io_resource,
};
static int __init sb1250_pcibios_init(void)
/* CFE will assign PCI resources */
pci_probe_only = 1;
- /* set resource limit to avoid errors */
- ioport_resource.end = 0x0000ffff; /* 32MB reserved by sb1250 */
+ /* Set I/O resource limits. */
+ ioport_resource.end = 0x01ffffff; /* 32MB accessible by sb1250 */
iomem_resource.end = 0xffffffff; /* no HT support yet */
cfg_space =
* Copyright (C) 2001-2003 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
* Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
#include <asm/cpu.h>
#include <asm/io.h>
-#include <asm/pci_channel.h>
#include <asm/vr41xx/vr41xx.h>
#include "pci-vr41xx.h"
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2004 by Ralf Baechle
- *
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/gt64240.h>
-#include <asm/pci_channel.h>
extern struct pci_ops titan_pci_ops;
"Titan PCI MEM", 0xe0000000UL, 0xe3ffffffUL, IORESOURCE_MEM
};
+/*
+ * PMON really reserves 16MB of I/O port space but that's stupid, nothing
+ * needs that much since allocations are limited to 256 bytes per device
+ * anyway. So we just claim 64kB here.
+ */
+#define TITAN_IO_SIZE 0x0000ffffUL
+
static struct resource py_io_resource = {
- "Titan IO MEM", 0x00000000UL, 0x00ffffffUL, IORESOURCE_IO,
+ "Titan IO MEM", 0x00001000UL, TITAN_IO_SIZE - 1, IORESOURCE_IO,
};
static struct pci_controller py_controller = {
.pci_ops = &titan_pci_ops,
.mem_resource = &py_mem_resource,
- .mem_offset = 0x10000000UL,
+ .mem_offset = 0x00000000UL,
.io_resource = &py_io_resource,
.io_offset = 0x00000000UL
};
+static char ioremap_failed[] __initdata = "Could not ioremap I/O port range";
+
static int __init pmc_yosemite_setup(void)
{
+ unsigned long io_v_base;
+
+ io_v_base = (unsigned long) ioremap(0xe0000000UL,TITAN_IO_SIZE);
+ if (!io_v_base)
+ panic(ioremap_failed);
+
+ set_io_port_base(io_v_base);
+
+ ioport_resource.end = TITAN_IO_SIZE - 1;
+
register_pci_controller(&py_controller);
+
+ return 0;
}
+
+arch_initcall(pmc_yosemite_setup);
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
- * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
-#include <asm/pci_channel.h>
-
/*
* Indicate whether we respect the PCI setup left by the firmware.
*
if ((err = pcibios_enable_resources(dev, mask)) < 0)
return err;
- return 0;
+ return pcibios_plat_dev_init(dev);
}
static void __init pcibios_fixup_device_resources(struct pci_dev *dev,
obj-y += irq-handler.o irq.o i2c-yosemite.o prom.o py-console.o setup.o
obj-$(CONFIG_KGDB) += dbg_io.o
+obj-$(CONFIG_SMP) += smp.o
#include <linux/config.h>
-#if defined(CONFIG_KGDB)
+#ifdef CONFIG_KGDB
#include <asm/serial.h>
/*
/*
- * Copyright 2003 PMC-Sierra Inc.
+ * Copyright 2003, 04 PMC-Sierra Inc.
* Author: Manish Lachwani (lachwani@pmc-sierra.com
+ * Copyright 2004 Ralf Baechle (ralf@linux-mips.org)
*
* First-level interrupt router for the PMC-Sierra Titan board
*
CLI
.set at
.set noreorder
+ la ra, ret_from_irq
mfc0 t0, CP0_CAUSE
mfc0 t2, CP0_STATUS
li a0, 2
move a1, sp
#ifdef CONFIG_HYPERTRANSPORT
- jal ll_ht_smp_irq_handler
+ j ll_ht_smp_irq_handler
#else
- jal do_IRQ
+ j do_IRQ
#endif
- j ret_from_irq
ll_pcib_irq:
li a0, 3
move a1, sp
- jal do_IRQ
- j ret_from_irq
+ j do_IRQ
ll_duart_irq:
li a0, 4
move a1, sp
- jal do_IRQ
- j ret_from_irq
+ j do_IRQ
ll_smp_irq:
li a0, 5
move a1, sp
#ifdef CONFIG_SMP
- jal jaguar_mailbox_irq
+ j titan_mailbox_irq
#else
- jal do_IRQ
+ j do_IRQ
#endif
- j ret_from_irq
ll_ht_irq:
li a0, 6
move a1, sp
- jal ll_ht_smp_irq_handler
- j ret_from_irq
+ j ll_ht_smp_irq_handler
ll_timer_irq:
li a0, 7
move a1, sp
- jal do_IRQ
- j ret_from_irq
+ j do_IRQ
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
+#include <linux/irq.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
#ifdef CONFIG_KGDB
extern void init_second_port(void);
-extern void breakpoint(void);
-extern void set_debug_traps(void);
#endif
/*
* Initialize the next level interrupt handler
*/
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
clear_c0_status(ST0_IM);
set_except_vector(0, titan_handle_int);
- init_generic_irq();
mips_cpu_irq_init(0);
rm7k_cpu_irq_init(8);
#ifdef CONFIG_KGDB
/* At this point, initialize the second serial port */
init_second_port();
- printk("Start kgdb ... \n");
- set_debug_traps();
- breakpoint();
#endif
#ifdef CONFIG_GDB_CONSOLE
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
- * Copyright (C) 2003 PMC-Sierra Inc.
+ * Copyright (C) 2003, 2004 PMC-Sierra Inc.
* Author: Manish Lachwani (lachwani@pmc-sierra.com)
+ * Copyright (C) 2004 Ralf Baechle
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/bootinfo.h>
#include <asm/pmon.h>
+#ifdef CONFIG_SMP
+extern void prom_grab_secondary(void);
+#else
+#define prom_grab_secondary() do { } while (0)
+#endif
+
#include "setup.h"
struct callvectors *debug_vectors;
}
#endif /* CONFIG_MIPS32 */
-#ifdef CONFIG_MIPS64
-
- /* Do nothing for the 64-bit for now. Just implement for the 32-bit */
-
-#endif /* CONFIG_MIPS64 */
-
mips_machgroup = MACH_GROUP_TITAN;
mips_machtype = MACH_TITAN_YOSEMITE;
+
+ prom_grab_secondary();
}
void __init prom_free_prom_memory(void)
#define iu_iir u3.iir
#define iu_fcr u3.fcr
-extern unsigned long uart_base;
-
#define IO_BASE_64 0x9000000000000000ULL
static unsigned char readb_outer_space(unsigned long phys)
__asm__("sll $0, $0, 2\n");
}
-static inline struct yo_uartregs *console_uart(void)
-{
- return (struct yo_uartregs *) (uart_base + 8);
-}
-
void prom_putchar(char c)
{
unsigned long lsr = 0xfd000008UL + offsetof(struct yo_uartregs, iu_lsr);
* Copyright (C) 2003 PMC-Sierra Inc.
* Author: Manish Lachwani (lachwani@pmc-sierra.com)
*
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
#include <asm/time.h>
#include <asm/bootinfo.h>
#include <asm/page.h>
-#include <asm/bootinfo.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/reboot.h>
-#include <asm/pci_channel.h>
#include <asm/serial.h>
#include <linux/termios.h>
#include <linux/tty.h>
-/*
- * Copyright 2003 PMC-Sierra
- * Author: Manish Lachwani (lachwani@pmc-sierra.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
+#include <linux/linkage.h>
+#include <linux/sched.h>
+
+#include <asm/pmon.h>
+#include <asm/titan_dep.h>
+
+#define LAUNCHSTACK_SIZE 256
+
+static spinlock_t launch_lock __initdata;
+
+static unsigned long secondary_sp __initdata;
+static unsigned long secondary_gp __initdata;
+
+static unsigned char launchstack[LAUNCHSTACK_SIZE] __initdata
+ __attribute__((aligned(2 * sizeof(long))));
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/smp.h>
-#include <linux/kernel_stat.h>
+static void __init prom_smp_bootstrap(void)
+{
+ local_irq_disable();
-#include <asm/mmu_context.h>
-#include <asm/trace.h>
+ while (spin_is_locked(&launch_lock));
-extern void asmlinkage smp_bootstrap(void);
+ __asm__ __volatile__(
+ " move $sp, %0 \n"
+ " move $gp, %1 \n"
+ " j smp_bootstrap \n"
+ :
+ : "r" (secondary_sp), "r" (secondary_gp));
+}
/*
- * Send inter-processor interrupt
+ * PMON is a fragile beast. It'll blow up once the mappings it's littering
+ * right into the middle of KSEG3 are blown away so we have to grab the slave
+ * core early and keep it in a waiting loop.
*/
-void core_send_ipi(int cpu, unsigned int action)
+void __init prom_grab_secondary(void)
{
- /*
- * Generate and INTMSG so that it can be sent over to the destination CPU
- * The INTMSG will put the STATUS bits based on the action desired
- */
- switch(action) {
- case SMP_RESCHEDULE_YOURSELF:
- /* Do nothing */
- break;
- case SMP_CALL_FUNCTION:
- if (cpu == 1)
- *(volatile uint32_t *)(0xbb000a00) = 0x00610002;
- else
- *(volatile uint32_t *)(0xbb000a00) = 0x00610001;
- break;
-
- default:
- panic("core_send_ipi \n");
- }
+ spin_lock(&launch_lock);
+
+ debug_vectors->cpustart(1, &prom_smp_bootstrap,
+ launchstack + LAUNCHSTACK_SIZE, 0);
}
/*
- * Mailbox interrupt to handle IPI
+ * Detect available CPUs, populate phys_cpu_present_map before smp_init
+ *
+ * We don't want to start the secondary CPU yet nor do we have a nice probing
+ * feature in PMON so we just assume presence of the secondary core.
*/
-void jaguar_mailbox_irq(struct pt_regs *regs)
+void prom_prepare_cpus(unsigned int max_cpus)
{
- int cpu = smp_processor_id();
+ cpus_clear(phys_cpu_present_map);
+
+ /*
+ * The boot CPU
+ */
+ cpu_set(0, phys_cpu_present_map);
+ __cpu_number_map[0] = 0;
+ __cpu_logical_map[0] = 0;
+
+ /*
+ * The secondary core
+ */
+ cpu_set(1, phys_cpu_present_map);
+ __cpu_number_map[1] = 1;
+ __cpu_logical_map[1] = 1;
+}
- /* SMP_CALL_FUNCTION */
- smp_call_function_interrupt();
+/*
+ * Firmware CPU startup hook
+ * Complicated by PMON's weird interface which tries to minimic the UNIX fork.
+ * It launches the next * available CPU and copies some information on the
+ * stack so the first thing we do is throw away that stuff and load useful
+ * values into the registers ...
+ */
+void prom_boot_secondary(int cpu, struct task_struct *idle)
+{
+ unsigned long gp = (unsigned long) idle->thread_info;
+ unsigned long sp = gp + THREAD_SIZE - 32;
+
+ secondary_sp = sp;
+ secondary_gp = gp;
+
+ spin_unlock(&launch_lock);
+}
+
+/* Hook for after all CPUs are online */
+void prom_cpus_done(void)
+{
}
-extern atomic_t cpus_booted;
+/*
+ * After we've done initial boot, this function is called to allow the
+ * board code to clean up state, if needed
+ */
+void prom_init_secondary(void)
+{
+ set_c0_status(ST0_CO | ST0_IE | ST0_IM);
+}
-void __init start_secondary(void)
+void prom_smp_finish(void)
{
- unsigned int cpu = smp_processor_id();
- extern atomic_t smp_commenced;
-
- if (current->processor != 1) {
- printk("Impossible CPU %d \n", cpu);
- current->processor = 1;
- current->cpus_runnable = 1 << 1;
- cpu = current->processor;
- }
-
- if (current->mm)
- current->mm = NULL;
-
- prom_init_secondary();
- per_cpu_trap_init();
-
- /*
- * XXX parity protection should be folded in here when it's converted
- * to an option instead of something based on .cputype
- */
- pgd_current[cpu] = init_mm.pgd;
- cpu_data[cpu].udelay_val = loops_per_jiffy;
- prom_smp_finish();
- CPUMASK_SETB(cpu_online_map, cpu);
- atomic_inc(&cpus_booted);
- __flush_cache_all();
-
- printk("Slave cpu booted successfully \n");
- *(volatile uint32_t *)(0xbb000a68) = 0x00000000;
- *(volatile uint32_t *)(0xbb000a68) = 0x80000000;
-
- while (*(volatile uint32_t *)(0xbb000a68) != 0x00000000);
-
- return cpu_idle();
}
-void __init smp_boot_cpus(void)
+asmlinkage void titan_mailbox_irq(struct pt_regs *regs)
+{
+ int cpu = smp_processor_id();
+ unsigned long status;
+
+ if (cpu == 0) {
+ status = OCD_READ(RM9000x2_OCD_INTP0STATUS3);
+ OCD_WRITE(RM9000x2_OCD_INTP0CLEAR3, status);
+ }
+
+ if (cpu == 1) {
+ status = OCD_READ(RM9000x2_OCD_INTP1STATUS3);
+ OCD_WRITE(RM9000x2_OCD_INTP1CLEAR3, status);
+ }
+
+ if (status & 0x2)
+ smp_call_function_interrupt();
+}
+
+/*
+ * Send inter-processor interrupt
+ */
+void core_send_ipi(int cpu, unsigned int action)
{
- int i;
- int cur_cpu = 0;
-
- smp_num_cpus = prom_setup_smp();
- printk("Detected %d available CPUs \n", smp_num_cpus);
-
- init_new_context(current, &init_mm);
- current->processor = 0;
- cpu_data[0].udelay_val = loops_per_jiffy;
- cpu_data[0].asid_cache = ASID_FIRST_VERSION;
- CPUMASK_CLRALL(cpu_online_map);
- CPUMASK_SETB(cpu_online_map, 0);
- atomic_set(&cpus_booted, 1); /* Master CPU is already booted... */
- init_idle();
-
- __cpu_number_map[0] = 0;
- __cpu_logical_map[0] = 0;
-
- /*
- * This loop attempts to compensate for "holes" in the CPU
- * numbering. It's overkill, but general.
- */
- for (i = 1; i < smp_num_cpus; ) {
- struct task_struct *p;
- struct pt_regs regs;
- int retval;
- printk("Starting CPU %d... \n", i);
-
- /* Spawn a new process normally. Grab a pointer to
- its task struct so we can mess with it */
- do_fork(CLONE_VM|CLONE_PID, 0, ®s, 0);
-
- p = init_task.prev_task;
- if (!p)
- panic("failed fork for CPU %d", i);
-
- /* This is current for the second processor */
- p->processor = i;
- p->cpus_runnable = 1 << i; /* we schedule the first task manually */
- p->thread.reg31 = (unsigned long) start_secondary;
-
- del_from_runqueue(p);
- unhash_process(p);
- init_tasks[i] = p;
-
- __flush_cache_all();
-
- do {
- /* Iterate until we find a CPU that comes up */
- cur_cpu++;
- retval = prom_boot_secondary(cur_cpu,
- (unsigned long)p + KERNEL_STACK_SIZE - 32,
- (unsigned long)p);
-
- } while (!retval && (cur_cpu < NR_CPUS));
- if (retval) {
- __cpu_number_map[cur_cpu] = i;
- __cpu_logical_map[i] = cur_cpu;
- i++;
- } else {
- panic("CPU discovery disaster");
- }
- }
-
- /* Local semaphore to both the CPUs */
-
- *(volatile uint32_t *)(0xbb000a68) = 0x80000000;
- while (*(volatile uint32_t *)(0xbb000a68) != 0x00000000);
-
- smp_threads_ready = 1;
+ /*
+ * Generate an INTMSG so that it can be sent over to the
+ * destination CPU. The INTMSG will put the STATUS bits
+ * based on the action desired. An alternative strategy
+ * is to write to the Interrupt Set register, read the
+ * Interrupt Status register and clear the Interrupt
+ * Clear register. The latter is preffered.
+ */
+ switch (action) {
+ case SMP_RESCHEDULE_YOURSELF:
+ if (cpu == 1)
+ OCD_WRITE(RM9000x2_OCD_INTP1SET3, 4);
+ else
+ OCD_WRITE(RM9000x2_OCD_INTP0SET3, 4);
+ break;
+
+ case SMP_CALL_FUNCTION:
+ if (cpu == 1)
+ OCD_WRITE(RM9000x2_OCD_INTP1SET3, 2);
+ else
+ OCD_WRITE(RM9000x2_OCD_INTP0SET3, 2);
+ break;
+ }
}
+++ /dev/null
-#
-# Makefile for a ramdisk image
-#
-
-obj-y += ramdisk.o
-
-
-O_FORMAT = $(shell $(OBJDUMP) -i | head -n 2 | grep elf32)
-img := $(subst ",,$(CONFIG_EMBEDDED_RAMDISK_IMAGE))
-# add $(src) when $(img) is relative
-img := $(subst $(src)//,/,$(src)/$(img))
-
-quiet_cmd_ramdisk = LD $@
-define cmd_ramdisk
- $(LD) $(LDFLAGS) -T $(src)/ld.script -b binary --oformat $(O_FORMAT) -o $@ $(img)
-endef
-
-$(obj)/ramdisk.o: $(img) $(src)/ld.script
- $(call cmd,ramdisk)
-
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS
-{
- .initrd :
- {
- *(.data)
- }
-}
-
cpu_err_stat & SGIMC_CSTAT_BAD_DATA ? "BAD_DATA " : "",
cpu_err_addr);
if (gio_err_stat & GIO_ERRMASK)
- printk(KERN_ERR "GIO error 0x%x:<%s%s%s%s%s%s%s%s> @ 0x08%x\n",
+ printk(KERN_ERR "GIO error 0x%x:<%s%s%s%s%s%s%s%s> @ 0x%08x\n",
gio_err_stat,
gio_err_stat & SGIMC_GSTAT_RD ? "RD " : "",
gio_err_stat & SGIMC_GSTAT_WR ? "WR " : "",
extern void mips_cpu_irq_init(unsigned int irq_base);
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
int i;
set_except_vector(0, indyIRQ);
- init_generic_irq();
/* init CPU irqs */
mips_cpu_irq_init(SGINT_CPU);
#include <asm/sgi/hpc3.h>
#include <asm/sgi/ip22.h>
-#ifdef CONFIG_KGDB
-extern void rs_kgdb_hook(int);
-extern void breakpoint(void);
-static int remote_debug = 0;
-#endif
-
unsigned long sgi_gfxaddr;
/*
*
* FIXME: provide a mechanism to change the value of stop_a_enabled.
*/
-int serial_console;
int stop_a_enabled;
void ip22_do_break(void)
static int __init ip22_setup(void)
{
char *ctype;
-#ifdef CONFIG_KGDB
- char *kgdb_ttyd;
-#endif
board_be_init = ip22_be_init;
ip22_time_init();
indy_sc_init();
#endif
- /* Set EISA IO port base for Indigo2 */
- set_io_port_base(KSEG1ADDR(0x00080000));
-
+ /* Set EISA IO port base for Indigo2
+ * ioremap cannot fail */
+ set_io_port_base((unsigned long)ioremap(0x00080000,
+ 0x1fffffff - 0x00080000));
/* ARCS console environment variable is set to "g?" for
* graphics console, it is set to "d" for the first serial
* line and "d2" for the second serial line.
}
#ifdef CONFIG_KGDB
- kgdb_ttyd = prom_getcmdline();
+ {
+ char *kgdb_ttyd = prom_getcmdline();
+
if ((kgdb_ttyd = strstr(kgdb_ttyd, "kgdb=ttyd")) != NULL) {
int line;
kgdb_ttyd += strlen("kgdb=ttyd");
printk(KERN_INFO "KGDB: Using serial line /dev/ttyd%d for "
"session, please connect your debugger\n", line ? 1:2);
- remote_debug = 1;
+ kgdb_enabled = 1;
/* Breakpoints and stuff are in sgi_irq_setup() */
}
+ }
#endif
#ifdef CONFIG_VT
#include <linux/bitops.h>
#include <linux/string.h>
+#include <linux/mmzone.h>
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
#include <asm/sn/hub.h>
xtalk_addr &= ~(BWIN_SIZE-1);
for (i = 0; i < HUB_NUM_BIG_WINDOW; i++) {
- if (test_and_set_bit(i, HUB_DATA(cnode)->h_bigwin_used))
+ if (test_and_set_bit(i, hub_data(cnode)->h_bigwin_used))
continue;
/*
unsigned i;
/* initialize big window piomaps for this hub */
- bitmap_zero(HUB_DATA(cnode)->h_bigwin_used, HUB_NUM_BIG_WINDOW);
+ bitmap_zero(hub_data(cnode)->h_bigwin_used, HUB_NUM_BIG_WINDOW);
for (i = 0; i < HUB_NUM_BIG_WINDOW; i++)
IIO_ITTE_DISABLE(nasid, i);
#include <linux/sched.h>
#include <linux/mmzone.h> /* for numnodes */
#include <linux/mm.h>
+#include <linux/module.h>
#include <linux/cpumask.h>
#include <asm/cpu.h>
#include <asm/io.h>
#define CPU_NONE (cpuid_t)-1
static DECLARE_BITMAP(hub_init_mask, MAX_COMPACT_NODES);
-static hubreg_t region_mask;
-static int fine_mode;
-static int router_distance;
nasid_t master_nasid = INVALID_NASID;
cnodeid_t nasid_to_compact_node[MAX_NASIDS];
nasid_t compact_to_nasid_node[MAX_COMPACT_NODES];
cnodeid_t cpuid_to_compact_node[MAXCPUS];
-char node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
-static hubreg_t get_region(cnodeid_t cnode)
-{
- if (fine_mode)
- return COMPACT_TO_NASID_NODEID(cnode) >> NASID_TO_FINEREG_SHFT;
- else
- return COMPACT_TO_NASID_NODEID(cnode) >> NASID_TO_COARSEREG_SHFT;
-}
-
-static void gen_region_mask(hubreg_t *region_mask, int maxnodes)
-{
- cnodeid_t cnode;
-
- (*region_mask) = 0;
- for (cnode = 0; cnode < maxnodes; cnode++) {
- (*region_mask) |= 1ULL << get_region(cnode);
- }
-}
-
-static int is_fine_dirmode(void)
-{
- return (((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_REGIONSIZE_MASK)
- >> NSRI_REGIONSIZE_SHFT) & REGIONSIZE_FINE);
-}
+EXPORT_SYMBOL(nasid_to_compact_node);
extern void pcibr_setup(cnodeid_t);
-static __init void per_slice_init(cnodeid_t cnode, int slice)
-{
- struct slice_data *si = hub_data[cnode]->slice + slice;
- int cpu = smp_processor_id();
- int i;
-
- for (i = 0; i < LEVELS_PER_SLICE; i++)
- si->level_to_irq[i] = -1;
- /*
- * Some interrupts are reserved by hardware or by software convention.
- * Mark these as reserved right away so they won't be used accidently
- * later.
- */
- for (i = 0; i <= BASE_PCI_IRQ; i++) {
- __set_bit(i, si->irq_alloc_mask);
- LOCAL_HUB_S(PI_INT_PEND_MOD, i);
- }
-
- __set_bit(IP_PEND0_6_63, si->irq_alloc_mask);
- LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63);
-
- for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) {
- __set_bit(i, si->irq_alloc_mask + 1);
- LOCAL_HUB_S(PI_INT_PEND_MOD, i);
- }
-
- LOCAL_HUB_L(PI_INT_PEND0);
-
- /*
- * We use this so we can find the local hub's data as fast as only
- * possible.
- */
- cpu_data[cpu].data = si;
-}
-
extern void xtalk_probe_node(cnodeid_t nid);
-void __init per_hub_init(cnodeid_t cnode)
+static void __init per_hub_init(cnodeid_t cnode)
{
- struct hub_data *hub = HUB_DATA(cnode);
+ struct hub_data *hub = hub_data(cnode);
nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode);
- int slice = LOCAL_HUB_L(PI_CPU_NUM);
cpu_set(smp_processor_id(), hub->h_cpus);
- if (!test_and_set_bit(slice, &hub->slice_map))
- per_slice_init(cnode, slice);
-
if (test_and_set_bit(cnode, hub_init_mask))
return;
* copy over the caliased exception handlers.
*/
if (get_compact_nodeid() == cnode) {
- extern char except_vec0, except_vec1_r10k;
+ extern char except_vec0, except_vec1_r4k;
extern char except_vec2_generic, except_vec3_generic;
memcpy((void *)(KSEG0 + 0x100), &except_vec2_generic, 0x80);
memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
memcpy((void *)KSEG0, &except_vec0, 0x80);
- memcpy((void *)KSEG0 + 0x080, &except_vec1_r10k, 0x80);
+ memcpy((void *)KSEG0 + 0x080, &except_vec1_r4k, 0x80);
memcpy((void *)(KSEG0 + 0x100), (void *) KSEG0, 0x80);
memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x100);
__flush_cache_all();
#endif
}
-/*
- * get_nasid() returns the physical node id number of the caller.
- */
-nasid_t
-get_nasid(void)
-{
- return (nasid_t)((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_NODEID_MASK)
- >> NSRI_NODEID_SHFT);
-}
-
-/*
- * Map the physical node id to a virtual node id (virtual node ids are contiguous).
- */
-cnodeid_t get_compact_nodeid(void)
-{
- return NASID_TO_COMPACT_NODEID(get_nasid());
-}
-
-#define rou_rflag rou_flags
-
-static void router_recurse(klrou_t *router_a, klrou_t *router_b, int depth)
+void __init per_cpu_init(void)
{
- klrou_t *router;
- lboard_t *brd;
- int port;
-
- if (router_a->rou_rflag == 1)
- return;
+ int cpu = smp_processor_id();
+ int slice = LOCAL_HUB_L(PI_CPU_NUM);
+ cnodeid_t cnode = get_compact_nodeid();
+ struct hub_data *hub = hub_data(cnode);
+ struct slice_data *si = hub->slice + slice;
+ int i;
- if (depth >= router_distance)
+ if (test_and_set_bit(slice, &hub->slice_map))
return;
- router_a->rou_rflag = 1;
-
- for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
- if (router_a->rou_port[port].port_nasid == INVALID_NASID)
- continue;
-
- brd = (lboard_t *)NODE_OFFSET_TO_K0(
- router_a->rou_port[port].port_nasid,
- router_a->rou_port[port].port_offset);
-
- if (brd->brd_type == KLTYPE_ROUTER) {
- router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
- if (router == router_b) {
- if (depth < router_distance)
- router_distance = depth;
- }
- else
- router_recurse(router, router_b, depth + 1);
- }
- }
-
- router_a->rou_rflag = 0;
-}
-
-int node_distance(nasid_t nasid_a, nasid_t nasid_b)
-{
- klrou_t *router, *router_a = NULL, *router_b = NULL;
- lboard_t *brd, *dest_brd;
- cnodeid_t cnode;
- nasid_t nasid;
- int port;
-
- /* Figure out which routers nodes in question are connected to */
- for (cnode = 0; cnode < numnodes; cnode++) {
- nasid = COMPACT_TO_NASID_NODEID(cnode);
-
- if (nasid == -1) continue;
-
- brd = find_lboard_class((lboard_t *)KL_CONFIG_INFO(nasid),
- KLTYPE_ROUTER);
-
- if (!brd)
- continue;
-
- do {
- if (brd->brd_flags & DUPLICATE_BOARD)
- continue;
-
- router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
- router->rou_rflag = 0;
+ clear_c0_status(ST0_IM);
- for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
- if (router->rou_port[port].port_nasid == INVALID_NASID)
- continue;
+ for (i = 0; i < LEVELS_PER_SLICE; i++)
+ si->level_to_irq[i] = -1;
- dest_brd = (lboard_t *)NODE_OFFSET_TO_K0(
- router->rou_port[port].port_nasid,
- router->rou_port[port].port_offset);
+ /*
+ * Some interrupts are reserved by hardware or by software convention.
+ * Mark these as reserved right away so they won't be used accidently
+ * later.
+ */
+ for (i = 0; i <= BASE_PCI_IRQ; i++) {
+ __set_bit(i, si->irq_alloc_mask);
+ LOCAL_HUB_S(PI_INT_PEND_MOD, i);
+ }
- if (dest_brd->brd_type == KLTYPE_IP27) {
- if (dest_brd->brd_nasid == nasid_a)
- router_a = router;
- if (dest_brd->brd_nasid == nasid_b)
- router_b = router;
- }
- }
+ __set_bit(IP_PEND0_6_63, si->irq_alloc_mask);
+ LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63);
- } while ((brd = find_lboard_class(KLCF_NEXT(brd), KLTYPE_ROUTER)));
+ for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) {
+ __set_bit(i, si->irq_alloc_mask + 1);
+ LOCAL_HUB_S(PI_INT_PEND_MOD, i);
}
- if (router_a == NULL) {
- printk("node_distance: router_a NULL\n");
- return -1;
- }
- if (router_b == NULL) {
- printk("node_distance: router_b NULL\n");
- return -1;
- }
+ LOCAL_HUB_L(PI_INT_PEND0);
- if (nasid_a == nasid_b)
- return 0;
+ /*
+ * We use this so we can find the local hub's data as fast as only
+ * possible.
+ */
+ cpu_data[cpu].data = si;
- if (router_a == router_b)
- return 1;
+ cpu_time_init();
+ install_ipi();
- router_distance = 100;
- router_recurse(router_a, router_b, 2);
+ /* Install our NMI handler if symmon hasn't installed one. */
+ install_cpu_nmi_handler(cputoslice(cpu));
- return router_distance;
-}
+ set_c0_status(SRB_DEV0 | SRB_DEV1);
-static void init_topology_matrix(void)
-{
- nasid_t nasid, nasid2;
- cnodeid_t row, col;
-
- for (row = 0; row < MAX_COMPACT_NODES; row++)
- for (col = 0; col < MAX_COMPACT_NODES; col++)
- node_distances[row][col] = -1;
-
- for (row = 0; row < numnodes; row++) {
- nasid = COMPACT_TO_NASID_NODEID(row);
- for (col = 0; col < numnodes; col++) {
- nasid2 = COMPACT_TO_NASID_NODEID(col);
- node_distances[row][col] = node_distance(nasid, nasid2);
- }
- }
+ per_hub_init(cnode);
}
-static void dump_topology(void)
+/*
+ * get_nasid() returns the physical node id number of the caller.
+ */
+nasid_t
+get_nasid(void)
{
- nasid_t nasid;
- cnodeid_t cnode;
- lboard_t *brd, *dest_brd;
- int port;
- int router_num = 0;
- klrou_t *router;
- cnodeid_t row, col;
-
- printk("************** Topology ********************\n");
-
- printk(" ");
- for (col = 0; col < numnodes; col++)
- printk("%02d ", col);
- printk("\n");
- for (row = 0; row < numnodes; row++) {
- printk("%02d ", row);
- for (col = 0; col < numnodes; col++)
- printk("%2d ", node_distances[row][col]);
- printk("\n");
- }
-
- for (cnode = 0; cnode < numnodes; cnode++) {
- nasid = COMPACT_TO_NASID_NODEID(cnode);
-
- if (nasid == -1) continue;
-
- brd = find_lboard_class((lboard_t *)KL_CONFIG_INFO(nasid),
- KLTYPE_ROUTER);
-
- if (!brd)
- continue;
-
- do {
- if (brd->brd_flags & DUPLICATE_BOARD)
- continue;
- printk("Router %d:", router_num);
- router_num++;
-
- router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
-
- for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
- if (router->rou_port[port].port_nasid == INVALID_NASID)
- continue;
-
- dest_brd = (lboard_t *)NODE_OFFSET_TO_K0(
- router->rou_port[port].port_nasid,
- router->rou_port[port].port_offset);
-
- if (dest_brd->brd_type == KLTYPE_IP27)
- printk(" %d", dest_brd->brd_nasid);
- if (dest_brd->brd_type == KLTYPE_ROUTER)
- printk(" r");
- }
- printk("\n");
-
- } while ( (brd = find_lboard_class(KLCF_NEXT(brd), KLTYPE_ROUTER)) );
- }
+ return (nasid_t)((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_NODEID_MASK)
+ >> NSRI_NODEID_SHFT);
}
-void mlreset(void)
+/*
+ * Map the physical node id to a virtual node id (virtual node ids are contiguous).
+ */
+cnodeid_t get_compact_nodeid(void)
{
- int i;
-
- master_nasid = get_nasid();
- fine_mode = is_fine_dirmode();
-
- /*
- * Probe for all CPUs - this creates the cpumask and sets up the
- * mapping tables. We need to do this as early as possible.
- */
-#ifdef CONFIG_SMP
- cpu_node_probe();
-#endif
-
- init_topology_matrix();
- dump_topology();
-
- gen_region_mask(®ion_mask, numnodes);
-
- setup_replication_mask(numnodes);
-
- /*
- * Set all nodes' calias sizes to 8k
- */
- for (i = 0; i < numnodes; i++) {
- nasid_t nasid;
-
- nasid = COMPACT_TO_NASID_NODEID(i);
-
- /*
- * Always have node 0 in the region mask, otherwise
- * CALIAS accesses get exceptions since the hub
- * thinks it is a node 0 address.
- */
- REMOTE_HUB_S(nasid, PI_REGION_PRESENT, (region_mask | 1));
-#ifdef CONFIG_REPLICATE_EXHANDLERS
- REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_8K);
-#else
- REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_0);
-#endif
-
-#ifdef LATER
- /*
- * Set up all hubs to have a big window pointing at
- * widget 0. Memory mode, widget 0, offset 0
- */
- REMOTE_HUB_S(nasid, IIO_ITTE(SWIN0_BIGWIN),
- ((HUB_PIO_MAP_TO_MEM << IIO_ITTE_IOSP_SHIFT) |
- (0 << IIO_ITTE_WIDGET_SHIFT)));
-#endif
- }
+ return NASID_TO_COMPACT_NODEID(get_nasid());
}
/* Extracted from the IOC3 meta driver. FIXME. */
ioc3->eier = 0;
}
-void __init per_cpu_init(void)
-{
- cnodeid_t cnode = get_compact_nodeid();
- int cpu = smp_processor_id();
-
- clear_c0_status(ST0_IM);
- per_hub_init(cnode);
- cpu_time_init();
- install_ipi();
- /* Install our NMI handler if symmon hasn't installed one. */
- install_cpu_nmi_handler(cputoslice(cpu));
- set_c0_status(SRB_DEV0 | SRB_DEV1);
-}
-
extern void ip27_setup_console(void);
extern void ip27_time_init(void);
extern void ip27_reboot_setup(void);
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
+#include <linux/irq.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/random.h>
if (!pend0)
return;
- /* Prevent any of the picked intrs from recursing */
- LOCAL_HUB_S(pi_int_mask0, mask0 & ~pend0);
-
swlevel = ms1bit(pend0);
#ifdef CONFIG_SMP
if (pend0 & (1UL << CPU_RESCHED_A_IRQ)) {
do_IRQ(irq, regs);
}
- /* clear bit in pend0 */
- pend0 ^= 1UL << swlevel;
-
- /* Now allow the set of serviced intrs again */
- LOCAL_HUB_S(pi_int_mask0, mask0);
LOCAL_HUB_L(PI_INT_PEND0);
}
if (!pend1)
return;
- /* Prevent any of the picked intrs from recursing */
- LOCAL_HUB_S(pi_int_mask1, mask1 & ~pend1);
-
swlevel = ms1bit(pend1);
/* "map" swlevel to irq */
irq = si->level_to_irq[swlevel];
LOCAL_HUB_CLR_INTR(swlevel);
do_IRQ(irq, regs);
- /* clear bit in pend1 */
- pend1 ^= 1UL << swlevel;
- /* Now allow the set of serviced intrs again */
- LOCAL_HUB_S(pi_int_mask1, mask1);
LOCAL_HUB_L(PI_INT_PEND1);
}
__set_bit(bit, si->irq_enable_mask);
- /* Make sure it's not already pending when we connect it. */
- REMOTE_HUB_CLR_INTR(nasid, bit);
-
if (!cputoslice(cpu)) {
REMOTE_HUB_S(nasid, PI_INT_MASK0_A, si->irq_enable_mask[0]);
REMOTE_HUB_S(nasid, PI_INT_MASK1_A, si->irq_enable_mask[1]);
bridgereg_t device;
bridge_t *bridge;
int pin, swlevel;
+ cpuid_t cpu;
pin = SLOT_FROM_PCI_IRQ(irq);
bc = IRQ_TO_BRIDGE(irq);
* "map" irq to a swlevel greater than 6 since the first 6 bits
* of INT_PEND0 are taken
*/
- swlevel = alloc_level(bc->irq_cpu, irq);
- intr_connect_level(bc->irq_cpu, swlevel);
-
+ swlevel = find_level(&cpu, irq);
bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (bc->nasid << 8));
bridge->b_int_enable |= (1 << pin);
- /* more stuff in int_enable reg */
- bridge->b_int_enable |= 0x7ffffe00;
+ bridge->b_int_enable |= 0x7ffffe00; /* more stuff in int_enable */
/*
* Enable sending of an interrupt clear packt to the hub on a high to
device |= (pin << (pin*3));
bridge->b_int_device = device;
- bridge->b_widget.w_tflush; /* Flush */
+ bridge->b_wid_tflush;
return 0; /* Never anything pending. */
}
si->level_to_irq[swlevel] = -1;
bridge->b_int_enable &= ~(1 << pin);
- bridge->b_widget.w_tflush; /* Flush */
+ bridge->b_wid_tflush;
}
static inline void enable_bridge_irq(unsigned int irq)
{
- /* All the braindamage happens magically for us in ip27_do_irq */
+ cpuid_t cpu;
+ int swlevel;
+
+ swlevel = find_level(&cpu, irq); /* Criminal offence */
+ intr_connect_level(cpu, swlevel);
}
-static void disable_bridge_irq(unsigned int irq)
+static inline void disable_bridge_irq(unsigned int irq)
{
- /* All the braindamage happens magically for us in ip27_do_irq */
+ cpuid_t cpu;
+ int swlevel;
+
+ swlevel = find_level(&cpu, irq); /* Criminal offence */
+ intr_disconnect_level(cpu, swlevel);
}
static void mask_and_ack_bridge_irq(unsigned int irq)
{
- /* All the braindamage happens magically for us in ip27_do_irq */
+ disable_bridge_irq(irq);
}
static void end_bridge_irq(unsigned int irq)
{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
+ irq_desc[irq].action)
+ enable_bridge_irq(irq);
}
static struct hw_interrupt_type bridge_irq_type = {
static unsigned long irq_map[NR_IRQS / BITS_PER_LONG];
-unsigned int allocate_irqno(void)
+static int allocate_irqno(void)
{
int irq;
again:
- irq = find_first_zero_bit(irq_map, LEVELS_PER_SLICE);
+ irq = find_first_zero_bit(irq_map, NR_IRQS);
if (irq >= NR_IRQS)
- return -1;
+ return -ENOSPC;
if (test_and_set_bit(irq, irq_map))
goto again;
clear_bit(irq, irq_map);
}
-void __init init_IRQ(void)
+void __devinit register_bridge_irq(unsigned int irq)
{
- int i;
+ irq_desc[irq].status = IRQ_DISABLED;
+ irq_desc[irq].action = 0;
+ irq_desc[irq].depth = 1;
+ irq_desc[irq].handler = &bridge_irq_type;
+}
- set_except_vector(0, ip27_irq);
+int __devinit request_bridge_irq(struct bridge_controller *bc)
+{
+ int irq = allocate_irqno();
+ int swlevel, cpu;
+ nasid_t nasid;
+
+ if (irq < 0)
+ return irq;
/*
- * Right now the bridge irq is our kitchen sink interrupt type
+ * "map" irq to a swlevel greater than 6 since the first 6 bits
+ * of INT_PEND0 are taken
*/
- for (i = 0; i <= NR_IRQS; i++) {
- irq_desc[i].status = IRQ_DISABLED;
- irq_desc[i].action = 0;
- irq_desc[i].depth = 1;
- irq_desc[i].handler = &bridge_irq_type;
+ cpu = bc->irq_cpu;
+ swlevel = alloc_level(cpu, irq);
+ if (unlikely(swlevel < 0)) {
+ free_irqno(irq);
+
+ return -EAGAIN;
}
+
+ /* Make sure it's not already pending when we connect it. */
+ nasid = COMPACT_TO_NASID_NODEID(cpu_to_node(cpu));
+ REMOTE_HUB_CLR_INTR(nasid, swlevel);
+
+ intr_connect_level(cpu, swlevel);
+
+ register_bridge_irq(irq);
+
+ return irq;
+}
+
+void __init arch_init_irq(void)
+{
+ set_except_vector(0, ip27_irq);
}
void install_ipi(void)
static __init void set_ktext_source(nasid_t client_nasid, nasid_t server_nasid)
{
- kern_vars_t *kvp;
cnodeid_t client_cnode;
+ kern_vars_t *kvp;
client_cnode = NASID_TO_COMPACT_NODEID(client_nasid);
- kvp = &(HUB_DATA(client_nasid)->kern_vars);
+ kvp = &hub_data(client_nasid)->kern_vars;
KERN_VARS_ADDR(client_nasid) = (unsigned long)kvp;
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/mmzone.h>
+#include <linux/module.h>
#include <linux/swap.h>
#include <linux/bootmem.h>
#include <asm/page.h>
static unsigned short __initdata slot_psize_cache[MAX_COMPACT_NODES][MAX_MEM_SLOTS];
static struct bootmem_data __initdata plat_node_bdata[MAX_COMPACT_NODES];
-struct pglist_data *node_data[MAX_COMPACT_NODES];
-struct hub_data *hub_data[MAX_COMPACT_NODES];
+struct node_data *__node_data[MAX_COMPACT_NODES];
+
+EXPORT_SYMBOL(__node_data);
+
+static int fine_mode;
+
+static int is_fine_dirmode(void)
+{
+ return (((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_REGIONSIZE_MASK)
+ >> NSRI_REGIONSIZE_SHFT) & REGIONSIZE_FINE);
+}
+
+static hubreg_t get_region(cnodeid_t cnode)
+{
+ if (fine_mode)
+ return COMPACT_TO_NASID_NODEID(cnode) >> NASID_TO_FINEREG_SHFT;
+ else
+ return COMPACT_TO_NASID_NODEID(cnode) >> NASID_TO_COARSEREG_SHFT;
+}
+
+static hubreg_t region_mask;
+
+static void gen_region_mask(hubreg_t *region_mask, int maxnodes)
+{
+ cnodeid_t cnode;
+
+ (*region_mask) = 0;
+ for (cnode = 0; cnode < maxnodes; cnode++) {
+ (*region_mask) |= 1ULL << get_region(cnode);
+ }
+}
+
+#define rou_rflag rou_flags
+
+static int router_distance;
+
+static void router_recurse(klrou_t *router_a, klrou_t *router_b, int depth)
+{
+ klrou_t *router;
+ lboard_t *brd;
+ int port;
+
+ if (router_a->rou_rflag == 1)
+ return;
+
+ if (depth >= router_distance)
+ return;
+
+ router_a->rou_rflag = 1;
+
+ for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
+ if (router_a->rou_port[port].port_nasid == INVALID_NASID)
+ continue;
+
+ brd = (lboard_t *)NODE_OFFSET_TO_K0(
+ router_a->rou_port[port].port_nasid,
+ router_a->rou_port[port].port_offset);
+
+ if (brd->brd_type == KLTYPE_ROUTER) {
+ router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
+ if (router == router_b) {
+ if (depth < router_distance)
+ router_distance = depth;
+ }
+ else
+ router_recurse(router, router_b, depth + 1);
+ }
+ }
+
+ router_a->rou_rflag = 0;
+}
+
+unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
+
+static int __init compute_node_distance(nasid_t nasid_a, nasid_t nasid_b)
+{
+ klrou_t *router, *router_a = NULL, *router_b = NULL;
+ lboard_t *brd, *dest_brd;
+ cnodeid_t cnode;
+ nasid_t nasid;
+ int port;
+
+ /* Figure out which routers nodes in question are connected to */
+ for (cnode = 0; cnode < numnodes; cnode++) {
+ nasid = COMPACT_TO_NASID_NODEID(cnode);
+
+ if (nasid == -1) continue;
+
+ brd = find_lboard_class((lboard_t *)KL_CONFIG_INFO(nasid),
+ KLTYPE_ROUTER);
+
+ if (!brd)
+ continue;
+
+ do {
+ if (brd->brd_flags & DUPLICATE_BOARD)
+ continue;
+
+ router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
+ router->rou_rflag = 0;
+
+ for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
+ if (router->rou_port[port].port_nasid == INVALID_NASID)
+ continue;
+
+ dest_brd = (lboard_t *)NODE_OFFSET_TO_K0(
+ router->rou_port[port].port_nasid,
+ router->rou_port[port].port_offset);
+
+ if (dest_brd->brd_type == KLTYPE_IP27) {
+ if (dest_brd->brd_nasid == nasid_a)
+ router_a = router;
+ if (dest_brd->brd_nasid == nasid_b)
+ router_b = router;
+ }
+ }
+
+ } while ((brd = find_lboard_class(KLCF_NEXT(brd), KLTYPE_ROUTER)));
+ }
+
+ if (router_a == NULL) {
+ printk("node_distance: router_a NULL\n");
+ return -1;
+ }
+ if (router_b == NULL) {
+ printk("node_distance: router_b NULL\n");
+ return -1;
+ }
+
+ if (nasid_a == nasid_b)
+ return 0;
+
+ if (router_a == router_b)
+ return 1;
+
+ router_distance = 100;
+ router_recurse(router_a, router_b, 2);
+
+ return router_distance;
+}
+
+static void __init init_topology_matrix(void)
+{
+ nasid_t nasid, nasid2;
+ cnodeid_t row, col;
+
+ for (row = 0; row < MAX_COMPACT_NODES; row++)
+ for (col = 0; col < MAX_COMPACT_NODES; col++)
+ __node_distances[row][col] = -1;
+
+ for (row = 0; row < numnodes; row++) {
+ nasid = COMPACT_TO_NASID_NODEID(row);
+ for (col = 0; col < numnodes; col++) {
+ nasid2 = COMPACT_TO_NASID_NODEID(col);
+ __node_distances[row][col] =
+ compute_node_distance(nasid, nasid2);
+ }
+ }
+}
+
+static void __init dump_topology(void)
+{
+ nasid_t nasid;
+ cnodeid_t cnode;
+ lboard_t *brd, *dest_brd;
+ int port;
+ int router_num = 0;
+ klrou_t *router;
+ cnodeid_t row, col;
+
+ printk("************** Topology ********************\n");
+
+ printk(" ");
+ for (col = 0; col < numnodes; col++)
+ printk("%02d ", col);
+ printk("\n");
+ for (row = 0; row < numnodes; row++) {
+ printk("%02d ", row);
+ for (col = 0; col < numnodes; col++)
+ printk("%2d ", node_distance(row, col));
+ printk("\n");
+ }
+
+ for (cnode = 0; cnode < numnodes; cnode++) {
+ nasid = COMPACT_TO_NASID_NODEID(cnode);
+
+ if (nasid == -1) continue;
+
+ brd = find_lboard_class((lboard_t *)KL_CONFIG_INFO(nasid),
+ KLTYPE_ROUTER);
+
+ if (!brd)
+ continue;
+
+ do {
+ if (brd->brd_flags & DUPLICATE_BOARD)
+ continue;
+ printk("Router %d:", router_num);
+ router_num++;
+
+ router = (klrou_t *)NODE_OFFSET_TO_K0(NASID_GET(brd), brd->brd_compts[0]);
+
+ for (port = 1; port <= MAX_ROUTER_PORTS; port++) {
+ if (router->rou_port[port].port_nasid == INVALID_NASID)
+ continue;
+
+ dest_brd = (lboard_t *)NODE_OFFSET_TO_K0(
+ router->rou_port[port].port_nasid,
+ router->rou_port[port].port_offset);
+
+ if (dest_brd->brd_type == KLTYPE_IP27)
+ printk(" %d", dest_brd->brd_nasid);
+ if (dest_brd->brd_type == KLTYPE_ROUTER)
+ printk(" r");
+ }
+ printk("\n");
+
+ } while ( (brd = find_lboard_class(KLCF_NEXT(brd), KLTYPE_ROUTER)) );
+ }
+}
static pfn_t __init slot_getbasepfn(cnodeid_t cnode, int slot)
{
}
}
+static void __init mlreset(void)
+{
+ int i;
+
+ master_nasid = get_nasid();
+ fine_mode = is_fine_dirmode();
+
+ /*
+ * Probe for all CPUs - this creates the cpumask and sets up the
+ * mapping tables. We need to do this as early as possible.
+ */
+#ifdef CONFIG_SMP
+ cpu_node_probe();
+#endif
+
+ init_topology_matrix();
+ dump_topology();
+
+ gen_region_mask(®ion_mask, numnodes);
+
+ setup_replication_mask(numnodes);
+
+ /*
+ * Set all nodes' calias sizes to 8k
+ */
+ for (i = 0; i < numnodes; i++) {
+ nasid_t nasid;
+
+ nasid = COMPACT_TO_NASID_NODEID(i);
+
+ /*
+ * Always have node 0 in the region mask, otherwise
+ * CALIAS accesses get exceptions since the hub
+ * thinks it is a node 0 address.
+ */
+ REMOTE_HUB_S(nasid, PI_REGION_PRESENT, (region_mask | 1));
+#ifdef CONFIG_REPLICATE_EXHANDLERS
+ REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_8K);
+#else
+ REMOTE_HUB_S(nasid, PI_CALIAS_SIZE, PI_CALIAS_SIZE_0);
+#endif
+
+#ifdef LATER
+ /*
+ * Set up all hubs to have a big window pointing at
+ * widget 0. Memory mode, widget 0, offset 0
+ */
+ REMOTE_HUB_S(nasid, IIO_ITTE(SWIN0_BIGWIN),
+ ((HUB_PIO_MAP_TO_MEM << IIO_ITTE_IOSP_SHIFT) |
+ (0 << IIO_ITTE_WIDGET_SHIFT)));
+#endif
+ }
+}
+
static void __init szmem(void)
{
pfn_t slot_psize, slot0sz = 0, nodebytes; /* Hack to detect problem configs */
}
}
+static void __init node_mem_init(cnodeid_t node)
+{
+ pfn_t slot_firstpfn = slot_getbasepfn(node, 0);
+ pfn_t slot_lastpfn = slot_firstpfn + slot_getsize(node, 0);
+ pfn_t slot_freepfn = node_getfirstfree(node);
+ struct pglist_data *pd;
+ unsigned long bootmap_size;
+
+ /*
+ * Allocate the node data structures on the node first.
+ */
+ __node_data[node] = __va(slot_freepfn << PAGE_SHIFT);
+
+ pd = NODE_DATA(node);
+ pd->bdata = &plat_node_bdata[node];
+
+ cpus_clear(hub_data(node)->h_cpus);
+
+ slot_freepfn += PFN_UP(sizeof(struct pglist_data) +
+ sizeof(struct hub_data));
+
+ bootmap_size = init_bootmem_node(NODE_DATA(node), slot_freepfn,
+ slot_firstpfn, slot_lastpfn);
+ free_bootmem_node(NODE_DATA(node), slot_firstpfn << PAGE_SHIFT,
+ (slot_lastpfn - slot_firstpfn) << PAGE_SHIFT);
+ reserve_bootmem_node(NODE_DATA(node), slot_firstpfn << PAGE_SHIFT,
+ ((slot_freepfn - slot_firstpfn) << PAGE_SHIFT) + bootmap_size);
+}
+
+/*
+ * A node with nothing. We use it to avoid any special casing in
+ * node_to_cpumask
+ */
+static struct node_data null_node = {
+ .hub = {
+ .h_cpus = CPU_MASK_NONE
+ }
+};
+
/*
* Currently, the intranode memory hole support assumes that each slot
* contains at least 32 MBytes of memory. We assume all bootmem data
mlreset();
szmem();
- for (node = 0; node < numnodes; node++) {
- pfn_t slot_firstpfn = slot_getbasepfn(node, 0);
- pfn_t slot_lastpfn = slot_firstpfn + slot_getsize(node, 0);
- pfn_t slot_freepfn = node_getfirstfree(node);
- unsigned long bootmap_size;
-
- /*
- * Allocate the node data structures on the node first.
- */
- node_data[node] = __va(slot_freepfn << PAGE_SHIFT);
- node_data[node]->bdata = &plat_node_bdata[node];
-
- hub_data[node] = (struct hub_data *)(node_data[node] + 1);
-
- cpus_clear(hub_data[node]->h_cpus);
-
- slot_freepfn += PFN_UP(sizeof(struct pglist_data) +
- sizeof(struct hub_data));
-
- bootmap_size = init_bootmem_node(NODE_DATA(node), slot_freepfn,
- slot_firstpfn, slot_lastpfn);
- free_bootmem_node(NODE_DATA(node), slot_firstpfn << PAGE_SHIFT,
- (slot_lastpfn - slot_firstpfn) << PAGE_SHIFT);
- reserve_bootmem_node(NODE_DATA(node), slot_firstpfn << PAGE_SHIFT,
- ((slot_freepfn - slot_firstpfn) << PAGE_SHIFT) + bootmap_size);
+ for (node = 0; node < MAX_COMPACT_NODES; node++) {
+ if (node < numnodes) {
+ node_mem_init(node);
+ continue;
+ }
+ __node_data[node] = &null_node;
}
}
printk("Discovered %d cpus on %d nodes\n", highest + 1, numnodes);
}
-void __init prom_build_cpu_map(void)
-{
-}
-
static void intr_clear_bits(nasid_t nasid, volatile hubreg_t *pend,
int base_level)
{
for (cnode = 0; cnode < numnodes; cnode++)
intr_clear_all(COMPACT_TO_NASID_NODEID(cnode));
- /* Master has already done per_cpu_init() */
- install_ipi();
-
replicate_kernel_text(numnodes);
/*
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <asm/bootinfo.h>
+#include <asm/io.h>
#include <asm/mipsregs.h>
#include <asm/ptrace.h>
#include <asm/page.h>
#include <asm/ip32/crime.h>
#include <asm/ip32/mace.h>
-void *sgi_crime;
+struct sgi_crime *crime;
struct sgi_mace *mace;
void __init crime_init(void)
unsigned int id, rev;
const int field = 2 * sizeof(unsigned long);
- sgi_crime = ioremap(CRIME_BASE, 1);
+ crime = ioremap(CRIME_BASE, sizeof(struct sgi_crime));
mace = ioremap(MACE_BASE, sizeof(struct sgi_mace));
- id = crime_read(CRIME_ID);
+ id = crime->id;
rev = id & CRIME_ID_REV;
id = (id & CRIME_ID_IDBITS) >> 4;
-
printk (KERN_INFO "CRIME id %1x rev %d at 0x%0*lx\n",
id, rev, field, (unsigned long) CRIME_BASE);
}
unsigned long stat, addr;
int fatal = 0;
- stat = crime_read(CRIME_MEM_ERROR_STAT) & CRIME_MEM_ERROR_STAT_MASK;
- addr = crime_read(CRIME_MEM_ERROR_ADDR) & CRIME_MEM_ERROR_ADDR_MASK;
+ stat = crime->mem_error_stat & CRIME_MEM_ERROR_STAT_MASK;
+ addr = crime->mem_error_addr & CRIME_MEM_ERROR_ADDR_MASK;
printk("CRIME memory error at 0x%08lx ST 0x%08lx<", addr, stat);
if (stat & CRIME_MEM_ERROR_INV)
printk("INV,");
if (stat & CRIME_MEM_ERROR_ECC) {
- unsigned long ecc_syn = crime_read(CRIME_MEM_ERROR_ECC_SYN) &
- CRIME_MEM_ERROR_ECC_SYN_MASK;
- unsigned long ecc_gen = crime_read(CRIME_MEM_ERROR_ECC_CHK) &
- CRIME_MEM_ERROR_ECC_CHK_MASK;
-
+ unsigned long ecc_syn =
+ crime->mem_ecc_syn & CRIME_MEM_ERROR_ECC_SYN_MASK;
+ unsigned long ecc_gen =
+ crime->mem_ecc_chk & CRIME_MEM_ERROR_ECC_CHK_MASK;
printk("ECC,SYN=0x%08lx,GEN=0x%08lx,", ecc_syn, ecc_gen);
}
if (stat & CRIME_MEM_ERROR_MULTIPLE) {
if (stat & CRIME_MEM_ERROR_MACE_ACCESS)
printk("MACE,MACEID=0x%02lx,", stat & CRIME_MEM_ERROR_MACE_ID);
- crime_write(0, CRIME_MEM_ERROR_STAT);
+ crime->mem_error_stat = 0;
if (fatal) {
printk("FATAL>\n");
irqreturn_t
crime_cpuerr_intr (unsigned int irq, void *dev_id, struct pt_regs *regs)
{
- unsigned long stat = crime_read(CRIME_CPU_ERROR_STAT) &
- CRIME_CPU_ERROR_MASK;
- uint64_t addr = crime_read(CRIME_CPU_ERROR_ADDR) &
- CRIME_CPU_ERROR_ADDR_MASK;
- addr <<= 2;
+ unsigned long stat = crime->cpu_error_stat & CRIME_CPU_ERROR_MASK;
+ unsigned long addr = crime->cpu_error_addr & CRIME_CPU_ERROR_ADDR_MASK;
+ addr <<= 2;
printk ("CRIME CPU error at 0x%09lx status 0x%08lx\n", addr, stat);
-
- crime_write(0, CRIME_CPU_ERROR_STAT);
+ crime->cpu_error_stat = 0;
return IRQ_HANDLED;
}
#include <asm/ip32/ip32_ints.h>
/* issue a PIO read to make sure no PIO writes are pending */
-#define flush_crime_bus() crime_read(CRIME_CONTROL);
+static void inline flush_crime_bus(void)
+{
+ volatile unsigned long junk = crime->control;
+}
+
static void inline flush_mace_bus(void)
{
- volatile unsigned long junk = mace_perif_ctrl_read(misc);
+ volatile unsigned long junk = mace->perif.ctrl.misc;
}
#undef DEBUG_IRQ
spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask |= 1 << (irq - 1);
- crime_write(crime_mask, CRIME_INT_MASK);
+ crime->imask = crime_mask;
spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask &= ~(1 << (irq - 1));
- crime_write(crime_mask, CRIME_INT_MASK);
+ crime->imask = crime_mask;
flush_crime_bus();
spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
|| (irq >= CRIME_SOFT0_IRQ && irq <= CRIME_SOFT2_IRQ)) {
uint64_t crime_int;
spin_lock_irqsave(&ip32_irq_lock, flags);
- crime_int = crime_read(CRIME_HARD_INT);
+ crime_int = crime->hard_int;
crime_int &= ~(1 << (irq - 1));
- crime_write(crime_int, CRIME_HARD_INT);
+ crime->hard_int = crime_int;
spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
disable_crime_irq(irq);
macepci_mask |= MACEPCI_CONTROL_INT(irq - 9);
mace->pci.control = macepci_mask;
crime_mask |= 1 << (irq - 1);
- crime_write(crime_mask, CRIME_INT_MASK);
+ crime->imask = crime_mask;
spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask &= ~(1 << (irq - 1));
- crime_write(crime_mask, CRIME_INT_MASK);
+ crime->imask = crime_mask;
flush_crime_bus();
macepci_mask &= ~MACEPCI_CONTROL_INT(irq - 9);
mace->pci.control = macepci_mask;
DBG ("crime_int %08x enabled\n", crime_int);
spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask |= crime_int;
- crime_write(crime_mask, CRIME_INT_MASK);
+ crime->imask = crime_mask;
maceisa_mask |= 1 << (irq - 33);
- mace_perif_ctrl_write(maceisa_mask, imask);
+ mace->perif.ctrl.imask = maceisa_mask;
spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
if(!(maceisa_mask & MACEISA_SUPERIO_INT))
crime_int |= MACE_SUPERIO_INT;
crime_mask &= ~crime_int;
- crime_write(crime_mask, CRIME_INT_MASK);
+ crime->imask = crime_mask;
flush_crime_bus();
- mace_perif_ctrl_write(maceisa_mask, imask);
+ mace->perif.ctrl.imask = maceisa_mask;
flush_mace_bus();
spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
case MACEISA_SERIAL2_TDMAPR_IRQ:
/* edge triggered */
spin_lock_irqsave(&ip32_irq_lock, flags);
- mace_int = mace_perif_ctrl_read(istat);
+ mace_int = mace->perif.ctrl.istat;
mace_int &= ~(1 << (irq - 33));
- mace_perif_ctrl_write(mace_int, istat);
+ mace->perif.ctrl.istat = mace_int;
spin_unlock_irqrestore(&ip32_irq_lock, flags);
break;
}
spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask |= 1 << (irq - 1);
- crime_write(crime_mask, CRIME_INT_MASK);
+ crime->imask = crime_mask;
spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
spin_lock_irqsave(&ip32_irq_lock, flags);
crime_mask &= ~(1 << (irq - 1));
- crime_write(crime_mask, CRIME_INT_MASK);
+ crime->imask = crime_mask;
flush_crime_bus();
spin_unlock_irqrestore(&ip32_irq_lock, flags);
}
static void ip32_unknown_interrupt(struct pt_regs *regs)
{
- uint64_t crime;
-
printk ("Unknown interrupt occurred!\n");
printk ("cp0_status: %08x\n", read_c0_status());
printk ("cp0_cause: %08x\n", read_c0_cause());
- crime = crime_read(CRIME_INT_MASK);
- printk ("CRIME intr mask: %016lx\n", crime);
- crime = crime_read(CRIME_INT_STAT);
- printk ("CRIME intr status: %016lx\n", crime);
- crime = crime_read(CRIME_HARD_INT);
- printk ("CRIME hardware intr register: %016lx\n", crime);
- printk ("MACE ISA intr mask: %08lx\n", mace_perif_ctrl_read(imask));
- printk ("MACE ISA intr status: %08lx\n", mace_perif_ctrl_read(istat));
+ printk ("CRIME intr mask: %016lx\n", crime->imask);
+ printk ("CRIME intr status: %016lx\n", crime->istat);
+ printk ("CRIME hardware intr register: %016lx\n", crime->hard_int);
+ printk ("MACE ISA intr mask: %08lx\n", mace->perif.ctrl.imask);
+ printk ("MACE ISA intr status: %08lx\n", mace->perif.ctrl.istat);
printk ("MACE PCI control register: %08x\n", mace->pci.control);
printk("Register dump:\n");
uint64_t crime_int;
int irq = 0;
- crime_int = crime_read(CRIME_INT_STAT) & crime_mask;
+ crime_int = crime->istat & crime_mask;
irq = ffs(crime_int);
crime_int = 1 << (irq - 1);
if (crime_int & CRIME_MACEISA_INT_MASK) {
- unsigned long mace_int = mace_perif_ctrl_read(istat);
+ unsigned long mace_int = mace->perif.ctrl.istat;
irq = ffs(mace_int & maceisa_mask) + 32;
}
DBG("*irq %u*\n", irq);
ll_timer_interrupt(IP32_R4K_TIMER_IRQ, regs);
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
unsigned int irq;
- init_generic_irq();
/* Install our interrupt handler, then clear and disable all
* CRIME and MACE interrupts. */
- crime_write(0, CRIME_INT_MASK);
- crime_write(0, CRIME_HARD_INT);
- crime_write(0, CRIME_SOFT_INT);
- mace_perif_ctrl_write(0, istat);
- mace_perif_ctrl_write(0, imask);
+ crime->imask = 0;
+ crime->hard_int = 0;
+ crime->soft_int = 0;
+ mace->perif.ctrl.istat = 0;
+ mace->perif.ctrl.imask = 0;
set_except_vector(0, ip32_handle_int);
for (irq = 0; irq <= IP32_IRQ_MAX; irq++) {
static void ip32_machine_restart(char *cmd)
{
- crime_write(CRIME_CONTROL_HARD_RESET, CRIME_CONTROL);
+ crime->control = CRIME_CONTROL_HARD_RESET;
while (1);
}
static void blink_timeout(unsigned long data)
{
- unsigned long led = mace_perif_ctrl_read(misc) ^ MACEISA_LED_RED;
- mace_perif_ctrl_write(led, misc);
- mod_timer(&blink_timer, jiffies+data);
+ unsigned long led = mace->perif.ctrl.misc ^ MACEISA_LED_RED;
+ mace->perif.ctrl.misc = led;
+ mod_timer(&blink_timer, jiffies + data);
}
static void debounce(unsigned long data)
has_paniced = 1;
/* turn off the green LED */
- led = mace_perif_ctrl_read(misc) | MACEISA_LED_GREEN;
- mace_perif_ctrl_write(led, misc);
+ led = mace->perif.ctrl.misc | MACEISA_LED_GREEN;
+ mace->perif.ctrl.misc = led;
blink_timer.data = PANIC_FREQ;
blink_timeout(PANIC_FREQ);
static __init int ip32_reboot_setup(void)
{
/* turn on the green led only */
- unsigned long led = mace_perif_ctrl_read(misc);
+ unsigned long led = mace->perif.ctrl.misc;
led |= MACEISA_LED_RED;
led &= ~MACEISA_LED_GREEN;
- mace_perif_ctrl_write(led, misc);
+ mace->perif.ctrl.misc = led;
_machine_restart = ip32_machine_restart;
_machine_halt = ip32_machine_halt;
{
printk(KERN_INFO "Calibrating system timer... ");
write_c0_count(0);
- crime_write(0, CRIME_TIMER);
- while (crime_read(CRIME_TIMER) < CRIME_MASTER_FREQ * WAIT_MS / 1000) ;
+ crime->timer = 0;
+ while (crime->timer < CRIME_MASTER_FREQ * WAIT_MS / 1000) ;
mips_hpt_frequency = read_c0_count() * 1000 / WAIT_MS;
printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000);
}
o2_serial[0].type = PORT_16550A;
o2_serial[0].line = 0;
o2_serial[0].irq = MACEISA_SERIAL1_IRQ;
- o2_serial[0].flags = STD_COM_FLAGS | UPF_RESOURCES;
+ o2_serial[0].flags = STD_COM_FLAGS;
o2_serial[0].uartclk = BASE_BAUD * 16;
o2_serial[0].iotype = UPIO_MEM;
o2_serial[0].membase = (char *)&mace->isa.serial1;
o2_serial[1].type = PORT_16550A;
o2_serial[1].line = 1;
o2_serial[1].irq = MACEISA_SERIAL2_IRQ;
- o2_serial[1].flags = STD_COM_FLAGS | UPF_RESOURCES;
+ o2_serial[1].flags = STD_COM_FLAGS;
o2_serial[1].uartclk = BASE_BAUD * 16;
o2_serial[1].iotype = UPIO_MEM;
o2_serial[1].membase = (char *)&mace->isa.serial2;
#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
+#include <linux/linkage.h>
#include <linux/mm.h>
#include <linux/blkdev.h>
#include <linux/bootmem.h>
#ifdef CONFIG_BLK_DEV_INITRD
extern unsigned long initrd_start, initrd_end;
-extern void * __rd_start, * __rd_end;
-#endif
-
-#ifdef CONFIG_SMP
-static int reboot_smp = 0;
#endif
#ifdef CONFIG_KGDB
extern int kgdb_port;
#endif
-static void cfe_linux_exit(void)
+static void ATTRIB_NORET cfe_linux_exit(void *arg)
{
-#ifdef CONFIG_SMP
+ int warm = *(int *)arg;
+
if (smp_processor_id()) {
- if (reboot_smp) {
- /* Don't repeat the process from another CPU */
- for (;;);
- } else {
+ static int reboot_smp;
+
+ /* Don't repeat the process from another CPU */
+ if (!reboot_smp) {
/* Get CPU 0 to do the cfe_exit */
reboot_smp = 1;
- smp_call_function((void *)_machine_restart, NULL, 1, 0);
- for (;;);
+ smp_call_function(cfe_linux_exit, arg, 1, 0);
}
+ } else {
+ printk("Passing control back to CFE...\n");
+ cfe_exit(warm, 0);
+ printk("cfe_exit returned??\n");
}
-#endif
- printk("passing control back to CFE\n");
- cfe_exit(1, 0);
- printk("cfe_exit returned??\n");
- while(1);
+ while (1);
+}
+
+static void ATTRIB_NORET cfe_linux_restart(char *command)
+{
+ static const int zero;
+
+ cfe_linux_exit((void *)&zero);
+}
+
+static void ATTRIB_NORET cfe_linux_halt(void)
+{
+ static const int one = 1;
+
+ cfe_linux_exit((void *)&one);
}
static __init void prom_meminit(void)
unsigned long initrd_pstart;
unsigned long initrd_pend;
-#ifdef CONFIG_EMBEDDED_RAMDISK
- /* If we're using an embedded ramdisk, then __rd_start and __rd_end
- are defined by the linker to be on either side of the ramdisk
- area. Otherwise, initrd_start should be defined by kernel command
- line arguments */
- if (initrd_start == 0) {
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
- }
-#endif
-
initrd_pstart = CPHYSADDR(initrd_start);
initrd_pend = CPHYSADDR(initrd_end);
if (initrd_start &&
char *arg;
#endif
- _machine_restart = (void (*)(char *))cfe_linux_exit;
- _machine_halt = cfe_linux_exit;
- _machine_power_off = cfe_linux_exit;
+ _machine_restart = cfe_linux_restart;
+ _machine_halt = cfe_linux_halt;
+ _machine_power_off = cfe_linux_halt;
/*
* Check if a loader was used; if NOT, the 4 arguments are
* Use CFE to find out how many CPUs are available, setting up
* phys_cpu_present_map and the logical/physical mappings.
* XXXKW will the boot CPU ever not be physical 0?
+ *
+ * Common setup before any secondaries are started
*/
-void __init prom_build_cpu_map(void)
+void __init prom_prepare_cpus(unsigned int max_cpus)
{
int i, num;
printk("Detected %i available secondary CPU(s)\n", num);
}
-/*
- * Common setup before any secondaries are started
- */
-void prom_prepare_cpus(unsigned int max_cpus)
-{
-}
-
/*
* Setup the PC, SP, and GP of a secondary processor and start it
* running!
#endif
#ifdef CONFIG_KGDB
-#include <asm/gdb-stub.h>
-extern void breakpoint(void);
static int kgdb_irq;
-/* kgdb is on when configured. Pass "nokgdb" kernel arg to turn it off */
-static int kgdb_flag = 1;
-static int __init nokgdb(char *str)
-{
- kgdb_flag = 0;
- return 1;
-}
-__setup("nokgdb", nokgdb);
-
/* Default to UART1 */
int kgdb_port = 1;
#ifdef CONFIG_SIBYTE_SB1250_DUART
}
/*
- * init_IRQ is called early in the boot sequence from init/main.c. It
- * is responsible for setting up the interrupt mapper and installing the
- * handler that will be responsible for dispatching interrupts to the
- * "right" place.
+ * arch_init_irq is called early in the boot sequence from init/main.c via
+ * init_IRQ. It is responsible for setting up the interrupt mapper and
+ * installing the handler that will be responsible for dispatching interrupts
+ * to the "right" place.
*/
/*
* For now, map all interrupts to IP[2]. We could save
#define IMR_IP5_VAL K_INT_MAP_I3
#define IMR_IP6_VAL K_INT_MAP_I4
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
unsigned int i;
IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
(kgdb_irq<<3)));
sb1250_unmask_irq(0, kgdb_irq);
-
- prom_printf("Waiting for GDB on UART port %d\n", kgdb_port);
- set_debug_traps();
- breakpoint();
}
#endif
}
/*
* sb1250_handle_int() is the routine that is actually called when an interrupt
- * occurs. It is installed as the exception vector handler in init_IRQ() in
- * arch/mips/sibyte/sb1250/irq.c
+ * occurs. It is installed as the exception vector handler in arch_init_irq()
+ * in arch/mips/sibyte/sb1250/irq.c
*
* In the handle we figure out which interrupts need handling, and use that to
* call the dispatcher, which will take care of actually calling registered
#include <linux/blkdev.h>
#include <linux/bootmem.h>
#include <linux/smp.h>
+#include <linux/initrd.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
-#ifdef CONFIG_EMBEDDED_RAMDISK
-/* These are symbols defined by the ramdisk linker script */
-extern unsigned char __rd_start;
-extern unsigned char __rd_end;
-#endif
-
#define MAX_RAM_SIZE ((CONFIG_SIBYTE_STANDALONE_RAM_SIZE * 1024 * 1024) - 1)
static __init void prom_meminit(void)
unsigned long initrd_pstart;
unsigned long initrd_pend;
-#ifdef CONFIG_EMBEDDED_RAMDISK
- /* If we're using an embedded ramdisk, then __rd_start and __rd_end
- are defined by the linker to be on either side of the ramdisk
- area. Otherwise, initrd_start should be defined by kernel command
- line arguments */
- if (initrd_start == 0) {
- initrd_start = (unsigned long)&__rd_start;
- initrd_end = (unsigned long)&__rd_end;
- }
-#endif
-
initrd_pstart = __pa(initrd_start);
initrd_pend = __pa(initrd_end);
if (initrd_start &&
/*
* Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#include <linux/init.h>
+#include <linux/tty.h>
+#include <linux/initrd.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/reboot.h>
#include <asm/time.h>
#include <asm/traps.h>
-#include <asm/pci_channel.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_genbus.h>
* driver compatibility reasons interrupts 0 - 15 to be the i8295
* interrupts even if the hardware uses a different interrupt numbering.
*/
-void __init init_IRQ (void)
+void __init arch_init_irq(void)
{
int i;
set_except_vector(0, sni_rm200_pci_handle_int);
- init_generic_irq();
init_i8259_irqs(); /* Integrated i8259 */
init_pciasic();
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1996, 1997, 1998, 2000, 2003, 2004 by Ralf Baechle
+ * Copyright (C) 1996, 97, 98, 2000, 03, 04 Ralf Baechle (ralf@linux-mips.org)
*/
#include <linux/config.h>
#include <linux/eisa.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mc146818-time.h>
-#include <asm/pci_channel.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/reboot.h>
obj-y += tx4927_prom.o tx4927_setup.o tx4927_irq.o tx4927_irq_handler.o
+obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
obj-$(CONFIG_KGDB) += tx4927_dbgio.o
/*
* DEBUG
*/
-#define TX4927_IRQ_CHECK_CP0
-#define TX4927_IRQ_CHECK_PIC
#undef TX4927_IRQ_DEBUG
{
TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_STARTUP, "irq=%d \n", irq);
-#ifdef TX4927_IRQ_CHECK_CP0
- {
- if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
tx4927_irq_cp0_enable(irq);
return (0);
{
TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_SHUTDOWN, "irq=%d \n", irq);
-#ifdef TX4927_IRQ_CHECK_CP0
- {
- if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
tx4927_irq_cp0_disable(irq);
return;
TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENABLE, "irq=%d \n", irq);
-#ifdef TX4927_IRQ_CHECK_CP0
- {
- if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
spin_lock_irqsave(&tx4927_cp0_lock, flags);
tx4927_irq_cp0_modify(CCP0_STATUS, 0, tx4927_irq_cp0_mask(irq));
TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_DISABLE, "irq=%d \n", irq);
-#ifdef TX4927_IRQ_CHECK_CP0
- {
- if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
spin_lock_irqsave(&tx4927_cp0_lock, flags);
tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0);
{
TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_MASK, "irq=%d \n", irq);
-#ifdef TX4927_IRQ_CHECK_CP0
- {
- if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
tx4927_irq_cp0_disable(irq);
return;
{
TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENDIRQ, "irq=%d \n", irq);
-#ifdef TX4927_IRQ_CHECK_CP0
- {
- if (irq < TX4927_IRQ_CP0_BEG || irq > TX4927_IRQ_CP0_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
tx4927_irq_cp0_enable(irq);
}
{
TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_STARTUP, "irq=%d\n", irq);
-#ifdef TX4927_IRQ_CHECK_PIC
- {
- if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
tx4927_irq_pic_enable(irq);
return (0);
{
TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_SHUTDOWN, "irq=%d\n", irq);
-#ifdef TX4927_IRQ_CHECK_PIC
- {
- if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
tx4927_irq_pic_disable(irq);
return;
TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENABLE, "irq=%d\n", irq);
-#ifdef TX4927_IRQ_CHECK_PIC
- {
- if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
spin_lock_irqsave(&tx4927_pic_lock, flags);
tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq), 0,
TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_DISABLE, "irq=%d\n", irq);
-#ifdef TX4927_IRQ_CHECK_PIC
- {
- if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
spin_lock_irqsave(&tx4927_pic_lock, flags);
tx4927_irq_pic_modify(tx4927_irq_pic_addr(irq),
{
TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_MASK, "irq=%d\n", irq);
-#ifdef TX4927_IRQ_CHECK_PIC
- {
- if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
tx4927_irq_pic_disable(irq);
return;
{
TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENDIRQ, "irq=%d\n", irq);
-#ifdef TX4927_IRQ_CHECK_PIC
- {
- if (irq < TX4927_IRQ_PIC_BEG || irq > TX4927_IRQ_PIC_END) {
- TX4927_IRQ_DPRINTK(TX4927_IRQ_EROR,
- "bad irq=%d \n", irq);
- panic("\n");
- }
- }
-#endif
-
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
tx4927_irq_pic_enable(irq);
}
}
#endif
-#ifdef CONFIG_KGDB
- {
- printk("Calling breakpoint() -- start remote kgdb\n");
- set_debug_traps();
- breakpoint();
- printk("Calling breakpoint() -- done\n");
- }
-#endif
-
return;
}
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#ifdef CONFIG_RTC_DS1742
-#include <asm/rtc_ds1742.h>
+#include <linux/ds1742rtc.h>
#endif
#ifdef CONFIG_TOSHIBA_FPCIB0
-#include <asm/smsc_fdc37m81x.h>
+#include <asm/tx4927/smsc_fdc37m81x.h>
#endif
#include <asm/tx4927/toshiba_rbtx4927.h>
#endif
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
extern void tx4927_irq_init(void);
}
#endif
-#ifdef CONFIG_PCI
- {
- extern void toshiba_rbtx4927_pci_irq_init(void);
- toshiba_rbtx4927_pci_irq_init();
- }
-#endif
-
wbflush();
return;
*
* Copyright 2001-2002 MontaVista Software Inc.
*
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ *
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
{
return "Toshiba RBTX4927/RBTX4937";
}
+
+char * __init prom_getcmdline(void)
+{
+ return &(arcs_cmdline[0]);
+}
+
*
* Copyright 2001-2002 MontaVista Software Inc.
*
- * Copyright (C) 1996, 1997, 2001 Ralf Baechle
+ * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2000 RidgeRun, Inc.
* Author: RidgeRun, Inc.
* glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
* Copyright 2002 MontaVista Software Inc.
* Author: Michael Pruznick, michael_pruznick@mvista.com
*
- * Copyright (C) 2000-2001 Toshiba Corporation
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#ifdef CONFIG_RTC_DS1742
-#include <asm/rtc_ds1742.h>
+#include <linux/ds1742rtc.h>
#endif
#ifdef CONFIG_TOSHIBA_FPCIB0
-#include <asm/smsc_fdc37m81x.h>
+#include <asm/tx4927/smsc_fdc37m81x.h>
#endif
#include <asm/tx4927/toshiba_rbtx4927.h>
#ifdef CONFIG_PCI
#include <asm/tx4927/tx4927_pci.h>
-#include <asm/pci_channel.h>
#endif
#ifdef CONFIG_BLK_DEV_IDEPCI
#include <linux/hdreg.h>
unsigned long tx4927_ce_base[8];
void tx4927_pci_setup(void);
void tx4927_reset_pci_pcic(void);
-#ifdef TX4927_SUPPORT_PCI_66
-void tx4927_pci66_setup(void);
-extern int tx4927_pci66_check(void);
-#endif
int tx4927_pci66 = 0; /* 0:auto */
#endif
char *toshiba_name = "";
#ifdef CONFIG_PCI
-void tx4927_dump_pcic_settings(void)
-{
- printk("%s pcic settings:",toshiba_name);
- {
- int i;
- unsigned long *preg = (unsigned long *) tx4927_pcicptr;
- for (i = 0; i < sizeof(struct tx4927_pcic_reg); i += 4) {
- if (i % 32 == 0)
- printk("\n%04x:", i);
- if (preg == &tx4927_pcicptr->g2pintack
- || preg == &tx4927_pcicptr->g2pspc
-#ifdef CONFIG_TX4927BUG_WORKAROUND
- || preg == &tx4927_pcicptr->g2pcfgadrs
- || preg == &tx4927_pcicptr->g2pcfgdata
-#endif
- ) {
- printk(" XXXXXXXX");
- preg++;
- continue;
- }
- printk(" %08lx", *preg++);
- if (preg == &tx4927_pcicptr->g2pcfgadrs)
- break;
- }
- printk("\n");
- }
-}
-
static void tx4927_pcierr_interrupt(int irq, void *dev_id,
struct pt_regs *regs)
{
- extern void tx4927_dump_pcic_settings(void);
-
#ifdef CONFIG_BLK_DEV_IDEPCI
/* ignore MasterAbort for ide probing... */
if (irq == TX4927_IRQ_IRC_PCIERR &&
}
#endif
printk("PCI error interrupt (irq 0x%x).\n", irq);
+
printk("pcistat:%04x, g2pstatus:%08lx, pcicstatus:%08lx\n",
(unsigned short) (tx4927_pcicptr->pcistatus >> 16),
tx4927_pcicptr->g2pstatus, tx4927_pcicptr->pcicstatus);
(unsigned long) (tx4927_ccfgptr->tear >> 32),
(unsigned long) tx4927_ccfgptr->tear);
show_regs(regs);
- //tx4927_dump_pcic_settings();
- panic("PCI error at PC:%08lx.", regs->cp0_epc);
}
-static struct irqaction pcic_action = {
- tx4927_pcierr_interrupt, 0, 0, "PCI-C", NULL, NULL
-};
-
-static struct irqaction pcierr_action = {
- tx4927_pcierr_interrupt, 0, 0, "PCI-ERR", NULL, NULL
-};
-
-
void __init toshiba_rbtx4927_pci_irq_init(void)
{
- setup_irq(TX4927_IRQ_IRC_PCIC, &pcic_action);
- setup_irq(TX4927_IRQ_IRC_PCIERR, &pcierr_action);
return;
}
#endif /* CONFIG_PCI */
#ifdef CONFIG_PCI
-#ifdef TX4927_SUPPORT_PCI_66
-void tx4927_pci66_setup(void)
-{
- int pciclk, pciclkin = 1;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI66,
- "-\n");
-
- if (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66)
- return;
-
- tx4927_reset_pci_pcic();
-
- /* Assert M66EN */
- tx4927_ccfgptr->ccfg |= TX4927_CCFG_PCI66;
- /* set PCICLK 66MHz */
- if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
- unsigned int pcidivmode = 0;
- pcidivmode =
- (unsigned long) tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIDIVMODE_MASK;
- if (tx4927_cpu_clock >= 170000000) {
- /* CPU 200MHz */
- pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
- pciclk = tx4927_cpu_clock / 3;
- } else {
- /* CPU 166MHz */
- pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
- pciclk = tx4927_cpu_clock * 2 / 5;
- }
- tx4927_ccfgptr->ccfg =
- (tx4927_ccfgptr->ccfg & ~TX4927_CCFG_PCIDIVMODE_MASK)
- | pcidivmode;
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCI66,
- ":PCICLK: ccfg:0x%08lx\n",
- (unsigned long) tx4927_ccfgptr->ccfg);
- } else {
- int pciclk_setting = *tx4927_pci_clk_ptr;
- pciclkin = 0;
- pciclk = 66666666;
- pciclk_setting &= ~TX4927_PCI_CLK_MASK;
- pciclk_setting |= TX4927_PCI_CLK_66;
- *tx4927_pci_clk_ptr = pciclk_setting;
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCI66,
- "PCICLK: pci_clk:%02x\n", *tx4927_pci_clk_ptr);
- }
-
- udelay(10000);
-
- /* clear PCIC reset */
- tx4927_ccfgptr->clkctr &= ~TX4927_CLKCTR_PCIRST;
- /* clear PCI reset */
- *tx4927_pcireset_ptr = 0;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI66,
- "+\n");
- return;
-}
-#endif /* TX4927_SUPPORT_PCI_66 */
-
void print_pci_status(void)
{
printk("PCI STATUS %lx\n", tx4927_pcicptr->pcistatus);
printk("PCIC STATUS %lx\n", tx4927_pcicptr->pcicstatus);
}
+extern struct pci_controller tx4927_controller;
+
static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
int top_bus, int busnr, int devfn)
{
static struct pci_dev dev;
static struct pci_bus bus;
- dev.bus = &bus;
- dev.sysdata = hose;
+ dev.sysdata = (void *)hose;
dev.devfn = devfn;
bus.number = busnr;
bus.ops = hose->pci_ops;
-
- if (busnr != top_bus)
- /* Fake a parent bus structure. */
- bus.parent = &bus;
- else
- bus.parent = NULL;
+ bus.parent = NULL;
+ dev.bus = &bus;
return &dev;
}
EARLY_PCI_OP(write, word, u16)
EARLY_PCI_OP(write, dword, u32)
-static int __init tx4927_pcibios_init(int busno, struct pci_controller *hose)
+static int __init tx4927_pcibios_init(void)
{
unsigned int id;
u32 pci_devfn;
+ int devfn_start = 0;
+ int devfn_stop = 0xff;
+ int busno = 0; /* One bus on the Toshiba */
+ struct pci_controller *hose = &tx4927_controller;
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
"-\n");
- for (pci_devfn = 0x0; pci_devfn < 0xff; pci_devfn++) {
+ for (pci_devfn = devfn_start; pci_devfn < devfn_stop; pci_devfn++) {
early_read_config_dword(hose, busno, busno, pci_devfn,
PCI_VENDOR_ID, &id);
}
+ register_pci_controller(&tx4927_controller);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
"+\n");
- return busno;
+ return 0;
}
+arch_initcall(tx4927_pcibios_init);
+
extern struct resource pci_io_resource;
extern struct resource pci_mem_resource;
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "-\n");
-#ifndef TX4927_SUPPORT_PCI_66
- if (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66)
- printk("PCI 66 current unsupported\n");
-#endif
-
mips_memory_upper = tx4927_get_mem_size() << 20;
mips_memory_upper += KSEG0;
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
/* PCI->GB mappings (I/O 256B) */
tx4927_pcicptr->p2giopbase = 0; /* 256B */
-
-#ifdef TX4927_SUPPORT_COMMAND_IO
- tx4927_pcicptr->p2giogbase = 0 | TX4927_PCIC_P2GIOGBASE_TIOEN |
-#ifdef __BIG_ENDIAN
- TX4927_PCIC_P2GIOGBASE_TECHG
-#else
- TX4927_PCIC_P2GIOGBASE_TBSDIS
-#endif
- ;
-#else
- tx4927_pcicptr->p2giogbase = 0;
-#endif
-
/* PCI->GB mappings (MEM 512MB) M0 gets all of memory */
tx4927_pcicptr->p2gm0plbase = 0;
tx4927_pcicptr->p2gm0pubase = 0;
if (tx4927_pcic_trdyto >= 0) {
tx4927_pcicptr->g2ptocnt &= ~0xff;
tx4927_pcicptr->g2ptocnt |= (tx4927_pcic_trdyto & 0xff);
- //printk("%s PCIC -- TRDYTO:%02lx\n",toshiba_name,
- // tx4927_pcicptr->g2ptocnt & 0xff);
}
/* Clear All Local Bus Status */
tx4927_pcicptr->pcistatus = PCI_COMMAND_MASTER |
PCI_COMMAND_MEMORY |
-#ifdef TX4927_SUPPORT_COMMAND_IO
- PCI_COMMAND_IO |
-#endif
PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
":pci setup complete:\n");
- //tx4927_dump_pcic_settings();
-
- tx4927_pcibios_init(0, &tx4927_controller);
-
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "+\n");
}
void __init toshiba_rbtx4927_setup(void)
{
vu32 cp0_config;
+ char *argptr;
printk("CPU is %s\n", toshiba_name);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
"+\n");
-
-
- mips_io_port_base = KSEG1 + TBTX4927_ISA_IO_OFFSET;
+ set_io_port_base(KSEG1 + TBTX4927_ISA_IO_OFFSET);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
":mips_io_port_base=0x%08lx\n",
mips_io_port_base);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
":Resource\n");
- ioport_resource.start = 0;
ioport_resource.end = 0xffffffff;
- iomem_resource.start = 0;
iomem_resource.end = 0xffffffff;
-
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
":ResetRoutines\n");
_machine_restart = toshiba_rbtx4927_restart;
tx4927_sdramcptr->tr |= 0x02000000; /* RCD:3tck */
#endif
-#ifdef TX4927_SUPPORT_PCI_66
- tx4927_pci66_setup();
-#endif
-
tx4927_pci_setup();
-#endif
-
-
- {
- u32 id = 0;
- early_read_config_dword(&tx4927_controller, 0, 0, 0x90,
- PCI_VENDOR_ID, &id);
- if (id == 0x94601055) {
- tx4927_using_backplane = 1;
- printk("backplane board IS installed\n");
- } else {
- printk("backplane board NOT installed\n");
- }
- }
+ if (tx4927_using_backplane == 1)
+ printk("backplane board IS installed\n");
+ else
+ printk("No Backplane \n");
/* this is on ISA bus behind PCI bus, so need PCI up first */
#ifdef CONFIG_TOSHIBA_FPCIB0
}
#endif
+#endif /* CONFIG_PCI */
+
+#ifdef CONFIG_SERIAL_TXX9_CONSOLE
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "console=") == NULL) {
+ strcat(argptr, " console=ttyS0,38400");
+ }
+#endif
+
+#ifdef CONFIG_ROOT_NFS
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "root=") == NULL) {
+ strcat(argptr, " root=/dev/nfs rw");
+ }
+#endif
+
+
+#ifdef CONFIG_IP_PNP
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "ip=") == NULL) {
+ strcat(argptr, " ip=any");
+ }
+#endif
+
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- "+\n");
+ "+\n");
}
+#ifdef CONFIG_RTC_DS1742
+extern unsigned long rtc_ds1742_get_time(void);
+extern int rtc_ds1742_set_time(unsigned long);
+extern void rtc_ds1742_wait(void);
+#endif
+
void __init
toshiba_rbtx4927_time_init(void)
{
static struct irqaction reserved =
{ no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade", NULL, NULL };
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
int i;
- extern irq_desc_t irq_desc[];
set_except_vector(0, vr4181_handle_irq);
*/
setup_irq(VR4181_IRQ_RTCL1, &reserved);
setup_irq(VR4181_IRQ_RTCL2, &reserved);
-
-#ifdef CONFIG_KGDB
- printk("Setting debug traps - please connect the remote debugger.\n");
-
- set_debug_traps();
-
- // you may move this line to whereever you want
- breakpoint();
-#endif
}
setup_irq(INT4_CASCADE_IRQ, &icu_cascade);
}
-void __init init_IRQ(void)
+void __init arch_init_irq(void)
{
- memset(irq_desc, 0, sizeof(irq_desc));
-
- init_generic_irq();
mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
init_vr41xx_icu_irq();
init_vr41xx_giuint_irq();
#define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */
#endif
-/*
- * Memory segments (32bit kernel mode addresses)
- * These are the traditional names used in the 32-bit universe.
- */
-#define KUSEG 0x00000000
-#define KSEG0 0x80000000
-#define KSEG1 0xa0000000
-#define KSEG2 0xc0000000
-#define KSEG3 0xe0000000
-
/*
* Returns the kernel segment base of a given address
*/
#define CPHYSADDR(a) ((_ACAST32_ (a)) & 0x1fffffff)
#define XPHYSADDR(a) ((_ACAST64_ (a)) & 0x000000ffffffffff)
-/*
- * Map an address to a certain kernel segment
- */
-#define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
-#define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
-#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
-#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
-
-#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
-#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
-#define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
-#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
+#ifdef CONFIG_MIPS64
/*
* Memory segments (64bit kernel mode addresses)
#define CKSSEG 0xffffffffc0000000
#define CKSEG3 0xffffffffe0000000
+#define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0)
+#define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1)
+#define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
+#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
+
+#else
+
+#define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
+#define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
+#define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
+#define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
+
+/*
+ * Map an address to a certain kernel segment
+ */
+#define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
+#define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
+#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2)
+#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3)
+
+/*
+ * Memory segments (32bit kernel mode addresses)
+ * These are the traditional names used in the 32-bit universe.
+ */
+#define KUSEG 0x00000000
+#define KSEG0 0x80000000
+#define KSEG1 0xa0000000
+#define KSEG2 0xc0000000
+#define KSEG3 0xe0000000
+
+#define CKUSEG 0x00000000
+#define CKSEG0 0x80000000
+#define CKSEG1 0xa0000000
+#define CKSEG2 0xc0000000
+#define CKSEG3 0xe0000000
+
+#endif
+
/*
* Cache modes for XKPHYS address conversion macros
*/
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
- .macro fpu_save_double thread tmp=t0
- cfc1 \tmp, fcr31
+ .macro fpu_save_double thread status tmp1=t0 tmp2
+ cfc1 \tmp1, fcr31
sdc1 $f0, THREAD_FPR0(\thread)
sdc1 $f2, THREAD_FPR2(\thread)
sdc1 $f4, THREAD_FPR4(\thread)
sdc1 $f26, THREAD_FPR26(\thread)
sdc1 $f28, THREAD_FPR28(\thread)
sdc1 $f30, THREAD_FPR30(\thread)
- sw \tmp, THREAD_FCR31(\thread)
+ sw \tmp1, THREAD_FCR31(\thread)
.endm
.macro fpu_save_single thread tmp=t0
.macro fpu_save_16even thread tmp=t0
cfc1 \tmp, fcr31
+ sdc1 $f0, THREAD_FPR0(\thread)
sdc1 $f2, THREAD_FPR2(\thread)
sdc1 $f4, THREAD_FPR4(\thread)
sdc1 $f6, THREAD_FPR6(\thread)
sdc1 $f31, THREAD_FPR31(\thread)
.endm
+ .macro fpu_save_double thread status tmp1 tmp2
+ sll \tmp2, \tmp1, 5
+ bgez \tmp2, 2f
+ fpu_save_16odd \thread
+2:
+ fpu_save_16even \thread \tmp1 # clobbers t1
+ .endm
+
.macro fpu_restore_16even thread tmp=t0
lw \tmp, THREAD_FCR31(\thread)
ldc1 $f0, THREAD_FPR0(\thread)
ldc1 $f31, THREAD_FPR31(\thread)
.endm
+ .macro fpu_restore_double thread tmp
+ mfc0 t0, CP0_STATUS
+ sll t1, t0, 5
+ bgez t1, 1f # 16 register mode?
+
+ fpu_restore_16odd a0
+1: fpu_restore_16even a0, t0 # clobbers t0
+ .endm
+
.macro cpu_save_nonscratch thread
LONG_S s0, THREAD_REG16(\thread)
LONG_S s1, THREAD_REG17(\thread)
#ifndef _ASM_ATOMIC_H
#define _ASM_ATOMIC_H
+#include <asm/cpu-features.h>
+#include <asm/war.h>
+
extern spinlock_t atomic_lock;
typedef struct { volatile int counter; } atomic_t;
*/
#define atomic_set(v,i) ((v)->counter = (i))
-#ifdef CONFIG_CPU_HAS_LLSC
-
/*
* atomic_add - add integer to atomic variable
* @i: integer value to add
*/
static __inline__ void atomic_add(int i, atomic_t * v)
{
- unsigned long temp;
-
- __asm__ __volatile__(
- "1: ll %0, %1 # atomic_add \n"
- " addu %0, %2 \n"
- " sc %0, %1 \n"
- " beqz %0, 1b \n"
- : "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter));
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %0, %1 # atomic_add \n"
+ " addu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqzl %0, 1b \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %0, %1 # atomic_add \n"
+ " addu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 1b \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else {
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ v->counter += i;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+ }
}
/*
*/
static __inline__ void atomic_sub(int i, atomic_t * v)
{
- unsigned long temp;
-
- __asm__ __volatile__(
- "1: ll %0, %1 # atomic_sub \n"
- " subu %0, %2 \n"
- " sc %0, %1 \n"
- " beqz %0, 1b \n"
- : "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter));
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %0, %1 # atomic_sub \n"
+ " subu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqzl %0, 1b \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %0, %1 # atomic_sub \n"
+ " subu %0, %2 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 1b \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else {
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ v->counter -= i;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+ }
}
/*
*/
static __inline__ int atomic_add_return(int i, atomic_t * v)
{
- unsigned long temp, result;
-
- __asm__ __volatile__(
- "1: ll %1, %2 # atomic_add_return \n"
- " addu %0, %1, %3 \n"
- " sc %0, %2 \n"
- " beqz %0, 1b \n"
- " addu %0, %1, %3 \n"
- " sync \n"
- : "=&r" (result), "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter)
- : "memory");
+ unsigned long result;
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %1, %2 # atomic_add_return \n"
+ " addu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqzl %0, 1b \n"
+ " addu %0, %1, %3 \n"
+ " sync \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %1, %2 # atomic_add_return \n"
+ " addu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqz %0, 1b \n"
+ " addu %0, %1, %3 \n"
+ " sync \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else {
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ result = v->counter;
+ result += i;
+ v->counter = result;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+ }
return result;
}
static __inline__ int atomic_sub_return(int i, atomic_t * v)
{
- unsigned long temp, result;
-
- __asm__ __volatile__(
- "1: ll %1, %2 # atomic_sub_return \n"
- " subu %0, %1, %3 \n"
- " sc %0, %2 \n"
- " beqz %0, 1b \n"
- " subu %0, %1, %3 \n"
- " sync \n"
- : "=&r" (result), "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter)
- : "memory");
+ unsigned long result;
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %1, %2 # atomic_sub_return \n"
+ " subu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqzl %0, 1b \n"
+ " subu %0, %1, %3 \n"
+ " sync \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %1, %2 # atomic_sub_return \n"
+ " subu %0, %1, %3 \n"
+ " sc %0, %2 \n"
+ " beqz %0, 1b \n"
+ " subu %0, %1, %3 \n"
+ " sync \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else {
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ result = v->counter;
+ result -= i;
+ v->counter = result;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+ }
return result;
}
*/
static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
{
- unsigned long temp, result;
-
- __asm__ __volatile__(
- "1: ll %1, %2 # atomic_sub_if_positive\n"
- " subu %0, %1, %3 \n"
- " bltz %0, 1f \n"
- " sc %0, %2 \n"
- " beqz %0, 1b \n"
- " sync \n"
- "1: \n"
- : "=&r" (result), "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter)
- : "memory");
+ unsigned long result;
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %1, %2 # atomic_sub_if_positive\n"
+ " subu %0, %1, %3 \n"
+ " bltz %0, 1f \n"
+ " sc %0, %2 \n"
+ " beqzl %0, 1b \n"
+ " sync \n"
+ "1: \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: ll %1, %2 # atomic_sub_if_positive\n"
+ " subu %0, %1, %3 \n"
+ " bltz %0, 1f \n"
+ " sc %0, %2 \n"
+ " beqz %0, 1b \n"
+ " sync \n"
+ "1: \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else {
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ result = v->counter;
+ result -= i;
+ if (result >= 0)
+ v->counter = result;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+ }
return result;
}
-#else
-
-/*
- * The MIPS I implementation is only atomic with respect to
- * interrupts. R3000 based multiprocessor machines are rare anyway ...
- *
- * atomic_add - add integer to atomic variable
- * @i: integer value to add
- * @v: pointer of type atomic_t
- *
- * Atomically adds @i to @v.
- */
-static __inline__ void atomic_add(int i, atomic_t * v)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&atomic_lock, flags);
- v->counter += i;
- spin_unlock_irqrestore(&atomic_lock, flags);
-}
-
-/*
- * atomic_sub - subtract the atomic variable
- * @i: integer value to subtract
- * @v: pointer of type atomic_t
- *
- * Atomically subtracts @i from @v.
- */
-static __inline__ void atomic_sub(int i, atomic_t * v)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&atomic_lock, flags);
- v->counter -= i;
- spin_unlock_irqrestore(&atomic_lock, flags);
-}
-
-static __inline__ int atomic_add_return(int i, atomic_t * v)
-{
- unsigned long flags;
- int temp;
-
- spin_lock_irqsave(&atomic_lock, flags);
- temp = v->counter;
- temp += i;
- v->counter = temp;
- spin_unlock_irqrestore(&atomic_lock, flags);
-
- return temp;
-}
-
-static __inline__ int atomic_sub_return(int i, atomic_t * v)
-{
- unsigned long flags;
- int temp;
-
- spin_lock_irqsave(&atomic_lock, flags);
- temp = v->counter;
- temp -= i;
- v->counter = temp;
- spin_unlock_irqrestore(&atomic_lock, flags);
-
- return temp;
-}
-
-/*
- * atomic_sub_if_positive - add integer to atomic variable
- * @v: pointer of type atomic_t
- *
- * Atomically test @v and decrement if it is greater than 0.
- * The function returns the old value of @v minus 1.
- */
-static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
-{
- unsigned long flags;
- int temp;
-
- spin_lock_irqsave(&atomic_lock, flags);
- temp = v->counter;
- temp -= i;
- if (temp >= 0)
- v->counter = temp;
- spin_unlock_irqrestore(&atomic_lock, flags);
-
- return temp;
-}
-
-#endif /* CONFIG_CPU_HAS_LLSC */
-
#define atomic_dec_return(v) atomic_sub_return(1,(v))
#define atomic_inc_return(v) atomic_add_return(1,(v))
*/
#define atomic64_set(v,i) ((v)->counter = (i))
-#ifdef CONFIG_CPU_HAS_LLDSCD
-
/*
* atomic64_add - add integer to atomic variable
* @i: integer value to add
*/
static __inline__ void atomic64_add(long i, atomic64_t * v)
{
- unsigned long temp;
-
- __asm__ __volatile__(
- "1: lld %0, %1 # atomic64_add \n"
- " addu %0, %2 \n"
- " scd %0, %1 \n"
- " beqz %0, 1b \n"
- : "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter));
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: lld %0, %1 # atomic64_add \n"
+ " addu %0, %2 \n"
+ " scd %0, %1 \n"
+ " beqzl %0, 1b \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: lld %0, %1 # atomic64_add \n"
+ " addu %0, %2 \n"
+ " scd %0, %1 \n"
+ " beqz %0, 1b \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else {
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ v->counter += i;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+ }
}
/*
*/
static __inline__ void atomic64_sub(long i, atomic64_t * v)
{
- unsigned long temp;
-
- __asm__ __volatile__(
- "1: lld %0, %1 # atomic64_sub \n"
- " subu %0, %2 \n"
- " scd %0, %1 \n"
- " beqz %0, 1b \n"
- : "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter));
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: lld %0, %1 # atomic64_sub \n"
+ " subu %0, %2 \n"
+ " scd %0, %1 \n"
+ " beqzl %0, 1b \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: lld %0, %1 # atomic64_sub \n"
+ " subu %0, %2 \n"
+ " scd %0, %1 \n"
+ " beqz %0, 1b \n"
+ : "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter));
+ } else {
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ v->counter -= i;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+ }
}
/*
*/
static __inline__ long atomic64_add_return(long i, atomic64_t * v)
{
- unsigned long temp, result;
-
- __asm__ __volatile__(
- "1: lld %1, %2 # atomic64_add_return \n"
- " addu %0, %1, %3 \n"
- " scd %0, %2 \n"
- " beqz %0, 1b \n"
- " addu %0, %1, %3 \n"
- " sync \n"
- : "=&r" (result), "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter)
- : "memory");
+ unsigned long result;
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: lld %1, %2 # atomic64_add_return \n"
+ " addu %0, %1, %3 \n"
+ " scd %0, %2 \n"
+ " beqzl %0, 1b \n"
+ " addu %0, %1, %3 \n"
+ " sync \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: lld %1, %2 # atomic64_add_return \n"
+ " addu %0, %1, %3 \n"
+ " scd %0, %2 \n"
+ " beqz %0, 1b \n"
+ " addu %0, %1, %3 \n"
+ " sync \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else {
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ result = v->counter;
+ result += i;
+ v->counter = result;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+ }
return result;
}
static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
{
- unsigned long temp, result;
-
- __asm__ __volatile__(
- "1: lld %1, %2 # atomic64_sub_return \n"
- " subu %0, %1, %3 \n"
- " scd %0, %2 \n"
- " beqz %0, 1b \n"
- " subu %0, %1, %3 \n"
- " sync \n"
- : "=&r" (result), "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter)
- : "memory");
+ unsigned long result;
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: lld %1, %2 # atomic64_sub_return \n"
+ " subu %0, %1, %3 \n"
+ " scd %0, %2 \n"
+ " beqzl %0, 1b \n"
+ " subu %0, %1, %3 \n"
+ " sync \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: lld %1, %2 # atomic64_sub_return \n"
+ " subu %0, %1, %3 \n"
+ " scd %0, %2 \n"
+ " beqz %0, 1b \n"
+ " subu %0, %1, %3 \n"
+ " sync \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else {
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ result = v->counter;
+ result -= i;
+ v->counter = result;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+ }
return result;
}
*/
static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
{
- unsigned long temp, result;
-
- __asm__ __volatile__(
- "1: lld %1, %2 # atomic64_sub_if_positive\n"
- " dsubu %0, %1, %3 \n"
- " bltz %0, 1f \n"
- " scd %0, %2 \n"
- " beqz %0, 1b \n"
- " sync \n"
- "1: \n"
- : "=&r" (result), "=&r" (temp), "=m" (v->counter)
- : "Ir" (i), "m" (v->counter)
- : "memory");
+ unsigned long result;
+
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: lld %1, %2 # atomic64_sub_if_positive\n"
+ " dsubu %0, %1, %3 \n"
+ " bltz %0, 1f \n"
+ " scd %0, %2 \n"
+ " beqzl %0, 1b \n"
+ " sync \n"
+ "1: \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: lld %1, %2 # atomic64_sub_if_positive\n"
+ " dsubu %0, %1, %3 \n"
+ " bltz %0, 1f \n"
+ " scd %0, %2 \n"
+ " beqz %0, 1b \n"
+ " sync \n"
+ "1: \n"
+ : "=&r" (result), "=&r" (temp), "=m" (v->counter)
+ : "Ir" (i), "m" (v->counter)
+ : "memory");
+ } else {
+ unsigned long flags;
+
+ spin_lock_irqsave(&atomic_lock, flags);
+ result = v->counter;
+ result -= i;
+ if (result >= 0)
+ v->counter = result;
+ spin_unlock_irqrestore(&atomic_lock, flags);
+ }
return result;
}
-#else
-
-/*
- * This implementation is only atomic with respect to interrupts. It can't
- * be used on SMP
- *
- * atomic64_add - add integer to atomic variable
- * @i: integer value to add
- * @v: pointer of type atomic64_t
- *
- * Atomically adds @i to @v.
- */
-static __inline__ void atomic64_add(long i, atomic64_t * v)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&atomic_lock, flags);
- v->counter += i;
- spin_unlock_irqrestore(&atomic_lock, flags);
-}
-
-/*
- * atomic64_sub - subtract the atomic variable
- * @i: integer value to subtract
- * @v: pointer of type atomic64_t
- *
- * Atomically subtracts @i from @v.
- */
-static __inline__ void atomic64_sub(long i, atomic64_t * v)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&atomic_lock, flags);
- v->counter -= i;
- spin_unlock_irqrestore(&atomic_lock, flags);
-}
-
-static __inline__ long atomic64_add_return(long i, atomic64_t * v)
-{
- unsigned long flags;
- long temp;
-
- spin_lock_irqsave(&atomic_lock, flags);
- temp = v->counter;
- temp += i;
- v->counter = temp;
- spin_unlock_irqrestore(&atomic_lock, flags);
-
- return temp;
-}
-
-static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
-{
- unsigned long flags;
- long temp;
-
- spin_lock_irqsave(&atomic_lock, flags);
- temp = v->counter;
- temp -= i;
- v->counter = temp;
- spin_unlock_irqrestore(&atomic_lock, flags);
-
- return temp;
-}
-
-/*
- * atomic64_sub_if_positive - add integer to atomic variable
- * @v: pointer of type atomic64_t
- *
- * Atomically test @v and decrement if it is greater than 0.
- * The function returns the old value of @v minus 1.
- */
-static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
-{
- unsigned long flags;
- long temp;
-
- spin_lock_irqsave(&atomic_lock, flags);
- temp = v->counter;
- temp -= i;
- if (temp >= 0)
- v->counter = temp;
- spin_unlock_irqrestore(&atomic_lock, flags);
-
- return temp;
-}
-
-#endif /* CONFIG_CPU_HAS_LLDSCD */
-
#define atomic64_dec_return(v) atomic64_sub_return(1,(v))
#define atomic64_inc_return(v) atomic64_add_return(1,(v))
+++ /dev/null
-/*
- * baget.h: Definitions specific to Baget/MIPS machines.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#ifndef _MIPS_BAGET_H
-#define _MIPS_BAGET_H
-
-#include "vic.h"
-#include "vac.h"
-
-#define VIC_BASE 0xBFFC0000
-#define VAC_BASE 0xBFFD0000
-
-
-/* Baget interrupt registers and their sizes */
-
-struct baget_int_reg {
- unsigned long address;
- int size; /* in bytes */
-};
-#define BAGET_INT_NONE {0,0}
-
-#define BAGET_INT0_ACK {0xbffa0003,1}
-#define BAGET_INT1_ACK {0xbffa0008,4}
-#define BAGET_INT5_ACK {0xbff00000,1}
-
-#define BAGET_WRERR_ACK ((volatile char*)0xbff00000)
-
-
-/* Baget address spaces */
-
-#define BAGET_A24M_BASE 0xFC000000 /* VME-master A24 base address */
-#define BAGET_A24S_BASE 0x00000000 /* VME-slave A24 base address */
-#define BAGET_A24S_MASK 0x00c00000 /* VME-slave A24 address mask */
-#define BAGET_GSW_BASE 0xf000 /* global switches address base */
-#define BAGET_MSW_BASE(P) (0xe000+(P)*0x100) /* module switches address base */
-
-#define BAGET_LED_BASE ((volatile short *)(0xbffd0000 + 0x00001800))
-
-#define BAGET_PIL_NR 8
-#define BAGET_IRQ_NR NR_IRQS /* 64 */
-#define BAGET_IRQ_MASK(x) ((NR_IRQS-1) & (x))
-
-#define BAGET_FPU_IRQ 0x26
-#define BAGET_VIC_TIMER_IRQ 0x32
-#define BAGET_VAC_TIMER_IRQ 0x36
-#define BAGET_BSM_IRQ 0x3C
-
-#define BAGET_LANCE_MEM_BASE 0xfcf10000
-#define BAGET_LANCE_MEM_SIZE 0x10000
-#define BAGET_LANCE_IO_BASE 0xbffeff00
-
-#define BALO_OFFSET 0x400000 /* sync with ld.script.balo */
-#define BALO_SIZE 0x200000 /* sync with image segs size */
-
-/* move it to the right place, somehere in include/asm */
-#define CAUSE_DBE 0x1C
-#define CAUSE_MASK 0x7C
-
-/* Simple debug fascilities */
-extern void outc(char);
-extern void outs(char *);
-extern void baget_write(char *s, int l);
-extern int baget_printk(const char *, ...);
-extern void balo_printf( char *f, ... );
-extern void balo_hungup(void);
-
-#endif /* !(_MIPS_BAGET_H) */
+++ /dev/null
-/*
- * vac.h: Various VIC controller defines. The VIC is a VME controller
- * used in Baget/MIPS series.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#ifndef _ASM_VAC_H
-#define _ASM_VAC_H
-
-#define VAC_SLSEL1_MASK 0x000
-#define VAC_SLSEL1_BASE 0x100
-#define VAC_SLSEL0_MASK 0x200
-#define VAC_SLSEL0_BASE 0x300
-#define VAC_ICFSEL_BASE 0x400
-#define VAC_ICFSEL_GLOBAL_VAL(x) (((x)>>8)&0xff)
-#define VAC_ICFSEL_MODULE_VAL(x) ((x)&0xff)
-#define VAC_DRAM_MASK 0x500
-#define VAC_BNDR2 0x600
-#define VAC_BNDR3 0x700
-#define VAC_A24_BASE 0x800
-#define VAC_A24_MASK (0x3f<<9)
-#define VAC_A24_D32_ENABLE (1<<8)
-#define VAC_A24_A24_CACHINH (1<<7)
-#define VAC_A24_A16D32_ENABLE (1<<6)
-#define VAC_A24_A16D32 (1<<5)
-#define VAC_A24_DATAPATH (1<<4)
-#define VAC_A24_IO_CACHINH (1<<3)
-#define VAC_REG1 0x900
-#define VAC_REG2 0xA00
-#define VAC_REG3 0xB00
-#define VAC_REG_WORD (1<<15)
-#define VAC_REG_ASIZ1 (1<<14)
-#define VAC_REG_ASIZ0 (1<<13)
-#define VAC_REG_ASIZ_VAL(x) (((x)>>13)&3)
-#define VAC_REG_CACHINH (1<<12)
-#define VAC_REG_INACTIVE (0<<10)
-#define VAC_REG_SHARED (1<<10)
-#define VAC_REG_VSB (2<<10)
-#define VAC_REG_MWB (3<<10)
-#define VAC_REG_MASK (3<<10)
-#define VAC_REG_MODE(x) (((x)>>10)&3)
-#define VAC_IOSEL4_CTRL 0xC00
-#define VAC_IOSEL5_CTRL 0xD00
-#define VAC_SHRCS_CTRL 0xE00
-#define VAC_EPROMCS_CTRL 0xF00
-#define VAC_IOSEL0_CTRL 0x1000
-#define VAC_IOSEL1_CTRL 0x1100
-#define VAC_IOSEL2_CTRL 0x1200
-#define VAC_IOSEL3_CTRL 0x1300
-#define VAC_CTRL_IOWR (1<<0)
-#define VAC_CTRL_IORD (1<<1)
-#define VAC_CTRL_DELAY_IOSELI(x) (((x)&3)<<2)
-#define VAC_CTRL_DELAY_IOSELI_VAL(x) (((x)>>2)&3)
-#define VAC_CTRL_DELAY_IOWR(x) (((x)&3)<<4)
-#define VAC_CTRL_DELAY_IOWR_VAL(x) (((x)>>4)&3)
-#define VAC_CTRL_DELAY_IORD(x) (((x)&3)<<6)
-#define VAC_CTRL_DELAY_IORD_VAL(x) (((x)>>6)&3)
-#define VAC_CTRL_RECOVERY_IOSELI(x) ((((x)-1)&7)<<8)
-#define VAC_CTRL_RECOVERY_IOSELI_VAL(x) ((((x)>>8)&7)+1)
-#define VAC_CTRL_DSACK0 (1<<11)
-#define VAC_CTRL_DSACK1 (1<<12)
-#define VAC_CTRL_DELAY_DSACKI(x) ((((x)-1)&7)<<13)
-#define VAC_CTRL_DELAY_DSACKI_VAL(x) ((((x)>>13)&7)+1)
-#define VAC_DECODE_CTRL 0x1400
-#define VAC_DECODE_FPUCS (1<<0)
-#define VAC_DECODE_CPUCLK(x) (((x)&3)<<1)
-#define VAC_DECODE_CPUCLK_VAL(x) (((x)>>1)&3)
-#define VAC_DECODE_RDR_SLSEL0 (1<<3)
-#define VAC_DECODE_RDR_SLSEL1 (1<<4)
-#define VAC_DECODE_DSACK (1<<5)
-#define VAC_DECODE_QFY_BNDR (1<<6)
-#define VAC_DECODE_QFY_ICFSEL (1<<7)
-#define VAC_DECODE_QFY_SLSEL1 (1<<8)
-#define VAC_DECODE_QFY_SLSEL0 (1<<9)
-#define VAC_DECODE_CMP_SLSEL1_LO (1<<10)
-#define VAC_DECODE_CMP_SLSEL1_HI (1<<11)
-#define VAC_DECODE_CMP_SLSEL1_VAL(x) (((x)>>10)&3)
-#define VAC_DECODE_DRAMCS (3<<12)
-#define VAC_DECODE_SHRCS (2<<12)
-#define VAC_DECODE_VSBSEL (1<<12)
-#define VAC_DECODE_EPROMCS (0<<12)
-#define VAC_DECODE_MODE_VAL(x) (((x)>>12)&3)
-#define VAC_DECODE_QFY_DRAMCS (1<<14)
-#define VAC_DECODE_DSACKI (1<<15)
-#define VAC_INT_STATUS 0x1500
-#define VAC_INT_CTRL 0x1600
-#define VAC_INT_CTRL_TIMER_PIO11 (3<<0)
-#define VAC_INT_CTRL_TIMER_PIO10 (2<<0)
-#define VAC_INT_CTRL_TIMER_PIO7 (1<<0)
-#define VAC_INT_CTRL_TIMER_DISABLE (0<<0)
-#define VAC_INT_CTRL_TIMER_MASK (3<<0)
-#define VAC_INT_CTRL_UART_B_PIO11 (3<<2)
-#define VAC_INT_CTRL_UART_B_PIO10 (2<<2)
-#define VAC_INT_CTRL_UART_B_PIO7 (1<<2)
-#define VAC_INT_CTRL_UART_B_DISABLE (0<<2)
-#define VAC_INT_CTRL_UART_A_PIO11 (3<<4)
-#define VAC_INT_CTRL_UART_A_PIO10 (2<<4)
-#define VAC_INT_CTRL_UART_A_PIO7 (1<<4)
-#define VAC_INT_CTRL_UART_A_DISABLE (0<<4)
-#define VAC_INT_CTRL_MBOX_PIO11 (3<<6)
-#define VAC_INT_CTRL_MBOX_PIO10 (2<<6)
-#define VAC_INT_CTRL_MBOX_PIO7 (1<<6)
-#define VAC_INT_CTRL_MBOX_DISABLE (0<<6)
-#define VAC_INT_CTRL_PIO4_PIO11 (3<<8)
-#define VAC_INT_CTRL_PIO4_PIO10 (2<<8)
-#define VAC_INT_CTRL_PIO4_PIO7 (1<<8)
-#define VAC_INT_CTRL_PIO4_DISABLE (0<<8)
-#define VAC_INT_CTRL_PIO7_PIO11 (3<<10)
-#define VAC_INT_CTRL_PIO7_PIO10 (2<<10)
-#define VAC_INT_CTRL_PIO7_PIO7 (1<<10)
-#define VAC_INT_CTRL_PIO7_DISABLE (0<<10)
-#define VAC_INT_CTRL_PIO8_PIO11 (3<<12)
-#define VAC_INT_CTRL_PIO8_PIO10 (2<<12)
-#define VAC_INT_CTRL_PIO8_PIO7 (1<<12)
-#define VAC_INT_CTRL_PIO8_DISABLE (0<<12)
-#define VAC_INT_CTRL_PIO9_PIO11 (3<<14)
-#define VAC_INT_CTRL_PIO9_PIO10 (2<<14)
-#define VAC_INT_CTRL_PIO9_PIO7 (1<<14)
-#define VAC_INT_CTRL_PIO9_DISABLE (0<<14)
-#define VAC_DEV_LOC 0x1700
-#define VAC_DEV_LOC_IOSEL(x) (1<<(x))
-#define VAC_PIO_DATA_OUT 0x1800
-#define VAC_PIO_PIN 0x1900
-#define VAC_PIO_DIRECTION 0x1A00
-#define VAC_PIO_DIR_OUT(x) (1<<(x))
-#define VAC_PIO_DIR_IN(x) (0<<(x))
-#define VAC_PIO_DIR_FCIACK (1<<14)
-#define VAC_PIO_FUNC 0x1B00
-#define VAC_PIO_FUNC_UART_A_TX (1<<0)
-#define VAC_PIO_FUNC_UART_A_RX (1<<1)
-#define VAC_PIO_FUNC_UART_B_TX (1<<2)
-#define VAC_PIO_FUNC_UART_B_RX (1<<3)
-#define VAC_PIO_FUNC_IORD (1<<4)
-#define VAC_PIO_FUNC_IOWR (1<<5)
-#define VAC_PIO_FUNC_IOSEL3 (1<<6)
-#define VAC_PIO_FUNC_IRQ7 (1<<7)
-#define VAC_PIO_FUNC_IOSEL4 (1<<8)
-#define VAC_PIO_FUNC_IOSEL5 (1<<9)
-#define VAC_PIO_FUNC_IRQ10 (1<<10)
-#define VAC_PIO_FUNC_IRQ11 (1<<11)
-#define VAC_PIO_FUNC_OUT (1<<12)
-#define VAC_PIO_FUNC_IOSEL2 (1<<13)
-#define VAC_PIO_FUNC_DELAY (1<<14)
-#define VAC_PIO_FUNC_FCIACK (1<<15)
-#define VAC_CPU_CLK_DIV 0x1C00
-#define VAC_UART_A_MODE 0x1D00
-#define VAC_UART_MODE_PARITY_ENABLE (1<<15) /* Inversed in manual ? */
-#define VAC_UART_MODE_PARITY_ODD (1<<14) /* Inversed in manual ? */
-#define VAC_UART_MODE_8BIT_CHAR (1<<13)
-#define VAC_UART_MODE_BAUD(x) (((x)&7)<<10)
-#define VAC_UART_MODE_CHAR_RX_ENABLE (1<<9)
-#define VAC_UART_MODE_CHAR_TX_ENABLE (1<<8)
-#define VAC_UART_MODE_TX_ENABLE (1<<7)
-#define VAC_UART_MODE_RX_ENABLE (1<<6)
-#define VAC_UART_MODE_SEND_BREAK (1<<5)
-#define VAC_UART_MODE_LOOPBACK (1<<4)
-#define VAC_UART_MODE_INITIAL (VAC_UART_MODE_8BIT_CHAR | \
- VAC_UART_MODE_TX_ENABLE | \
- VAC_UART_MODE_RX_ENABLE | \
- VAC_UART_MODE_CHAR_TX_ENABLE | \
- VAC_UART_MODE_CHAR_RX_ENABLE | \
- VAC_UART_MODE_BAUD(5)) /* 9600/4 */
-#define VAC_UART_A_TX 0x1E00
-#define VAC_UART_B_MODE 0x1F00
-#define VAC_UART_A_RX 0x2000
-#define VAC_UART_RX_ERR_BREAK (1<<10)
-#define VAC_UART_RX_ERR_FRAME (1<<9)
-#define VAC_UART_RX_ERR_PARITY (1<<8)
-#define VAC_UART_RX_DATA_MASK (0xff)
-#define VAC_UART_B_RX 0x2100
-#define VAC_UART_B_TX 0x2200
-#define VAC_UART_A_INT_MASK 0x2300
-#define VAC_UART_INT_RX_READY (1<<15)
-#define VAC_UART_INT_RX_FULL (1<<14)
-#define VAC_UART_INT_RX_BREAK_CHANGE (1<<13)
-#define VAC_UART_INT_RX_ERRS (1<<12)
-#define VAC_UART_INT_TX_READY (1<<11)
-#define VAC_UART_INT_TX_EMPTY (1<<10)
-#define VAC_UART_B_INT_MASK 0x2400
-#define VAC_UART_A_INT_STATUS 0x2500
-#define VAC_UART_STATUS_RX_READY (1<<15)
-#define VAC_UART_STATUS_RX_FULL (1<<14)
-#define VAC_UART_STATUS_RX_BREAK_CHANGE (1<<13)
-#define VAC_UART_STATUS_RX_ERR_PARITY (1<<12)
-#define VAC_UART_STATUS_RX_ERR_FRAME (1<<11)
-#define VAC_UART_STATUS_RX_ERR_OVERRUN (1<<10)
-#define VAC_UART_STATUS_TX_READY (1<<9)
-#define VAC_UART_STATUS_TX_EMPTY (1<<8)
-#define VAC_UART_STATUS_INTS (0xff<<8)
-#define VAC_UART_B_INT_STATUS 0x2600
-#define VAC_TIMER_DATA 0x2700
-#define VAC_TIMER_CTRL 0x2800
-#define VAC_TIMER_ONCE (1<<15)
-#define VAC_TIMER_ENABLE (1<<14)
-#define VAC_TIMER_PRESCALE(x) (((x)&0x3F)<<8)
-#define VAC_ID 0x2900
-
-
-#ifndef __ASSEMBLY__
-
-#define vac_inb(p) (*(volatile unsigned char *)(VAC_BASE + (p)))
-#define vac_outb(v,p) (*((volatile unsigned char *)(VAC_BASE + (p))) = v)
-#define vac_inw(p) (*(volatile unsigned short*)(VAC_BASE + (p)))
-#define vac_outw(v,p) (*((volatile unsigned short*)(VAC_BASE + (p))) = v)
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_VAC_H */
+++ /dev/null
-/*
- * vic.h: Various VIC controller defines. The VIC is an interrupt controller
- * used in Baget/MIPS series.
- *
- * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
- */
-#ifndef _ASM_BAGET_VIC_H
-#define _ASM_BAGET_VIC_H
-
-#define VIC_VME_II 0x3
-#define VIC_VME_INT1 0x7
-#define VIC_VME_INT2 0xB
-#define VIC_VME_INT3 0xF
-#define VIC_VME_INT4 0x13
-#define VIC_VME_INT5 0x17
-#define VIC_VME_INT6 0x1B
-#define VIC_VME_INT7 0x1F
-#define VIC_DMA_INT 0x23
-#define VIC_LINT1 0x27
-#define VIC_LINT2 0x2B
-#define VIC_LINT3 0x2F
-#define VIC_LINT4 0x33
-#define VIC_LINT5 0x37
-#define VIC_LINT6 0x3B
-#define VIC_LINT7 0x3F
-#define VIC_ICGS_INT 0x43
-#define VIC_ICMS_INT 0x47
-#define VIC_INT_IPL(lev) ((~(lev))&0x7)
-#define VIC_INT_ACTIVE (1<<3)
-#define VIC_INT_AUTO (0<<4)
-#define VIC_INT_NOAUTO (1<<4)
-#define VIC_INT_LEVEL (0<<5)
-#define VIC_INT_EDGE (1<<5)
-#define VIC_INT_LOW (0<<6)
-#define VIC_INT_HIGH (1<<6)
-#define VIC_INT_ENABLE (0<<7)
-#define VIC_INT_DISABLE (1<<7)
-#define VIC_INT_SWITCH(x) (1<<(((x)&0x3)+4))
-#define VIC_ERR_INT 0x4B
-#define VIC_ERR_INT_SYSFAIL_ACTIVE (1<<3)
-#define VIC_ERR_INT_SYSFAIL (1<<4)
-#define VIC_ERR_INT_TIMO (1<<5)
-#define VIC_ERR_INT_WRPOST (1<<6)
-#define VIC_ERR_INT_ACFAIL (1<<7)
-#define VIC_ICGS_BASE 0x4F
-#define VIC_ICMS_BASE 0x53
-#define VIC_ICxS_BASE_GSWITCH_MASK 0x3
-#define VIC_ICxS_BASE_ID(x) (((x)&0x3f)<<2)
-#define VIC_LOCAL_BASE 0x57
-#define VIC_LOCAL_BASE_LINT_MASK 0x7
-#define VIC_LOCAL_BASE_ID(x) (((x)&0x1f)<<3)
-#define VIC_ERR_BASE 0x5B
-#define VIC_ERR_BASE_ACFAIL 0
-#define VIC_ERR_BASE_WRPOST 1
-#define VIC_ERR_BASE_TIMO 2
-#define VIC_ERR_BASE_SYSFAIL 3
-#define VIC_ERR_BASE_VMEACK 4
-#define VIC_ERR_BASE_DMA 5
-#define VIC_ERR_BASE_ID(x) (((x)&0x1f)<<3)
-#define VIC_ICS 0x5F
-#define VIC_IC0 0x63
-#define VIC_IC1 0x67
-#define VIC_IC2 0x6B
-#define VIC_IC3 0x6F
-#define VIC_IC4 0x73
-#define VIC_ID 0x77
-#define VIC_IC6 0x7B
-#define VIC_IC6_IRESET_STATUS (1<<7)
-#define VIC_IC6_HALT_STATUS (1<<6)
-#define VIC_IC6_SYSRESET (3<<0)
-#define VIC_IC6_RESET (2<<0)
-#define VIC_IC6_HALT (1<<0)
-#define VIC_IC6_RUN (0<<0)
-#define VIC_IC7 0x7F
-#define VIC_IC7_SYSFAIL (1<<7)
-#define VIC_IC7_RESET (1<<6)
-#define VIC_IC7_VME_MASTER (1<<5)
-#define VIC_IC7_SEMSET(x) ((1<<(x))&0x1f)
-#define VIC_VME_REQ 0x83
-#define VIC_VME_BASE1 0x87
-#define VIC_VME_BASE2 0x8B
-#define VIC_VME_BASE3 0x8F
-#define VIC_VME_BASE4 0x93
-#define VIC_VME_BASE5 0x97
-#define VIC_VME_BASE6 0x9B
-#define VIC_VME_BASE7 0x9F
-#define VIC_XFER_TIMO 0xA3
-#define VIC_XFER_TIMO_VME_PERIOD_INF (7<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_512 (6<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_256 (5<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_128 (4<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_64 (3<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_32 (2<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_16 (1<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_4 (0<<5)
-#define VIC_XFER_TIMO_VME_PERIOD_VAL(x) (((x)>>5)&7)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_INF (7<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_512 (6<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_256 (5<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_128 (4<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_64 (3<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_32 (2<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_16 (1<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_4 (0<<2)
-#define VIC_XFER_TIMO_LOCAL_PERIOD_VAL(x) (((x)>>2)&7)
-#define VIC_XFER_TIMO_ARB (1<<1)
-#define VIC_XFER_TIMO_VME (1<<0)
-#define VIC_LOCAL_TIM 0xA7
-#define VIC_LOCAL_TIM_PAS_ASSERT(x) (((x)-2)&0xf)
-#define VIC_LOCAL_TIM_PAS_ASSERT_VAL(x) (((x)&0xf)+2)
-#define VIC_LOCAT_TIM_DS_DEASSERT(x) ((((x)-1)&1)<<4)
-#define VIC_LOCAT_TIM_DS_DEASSERT_VAL(x) ((((x)>>4)&1)+1)
-#define VIC_LOCAL_TIM_PAS_DEASSERT(x) ((((x)-1)&0x7)<<5)
-#define VIC_LOCAL_TIM_PAS_DEASSERT_VAL(x) ((((x)>>5)&0x7)+1)
-#define VIC_BXFER_DEF 0xAB
-#define VIC_BXFER_DEF_VME_CROSS (1<<3)
-#define VIC_BXFER_DEF_LOCAL_CROSS (1<<2)
-#define VIC_BXFER_DEF_AMSR (1<<1)
-#define VIC_BXFER_DEF_DUAL (1<<0)
-#define VIC_IFACE_CFG 0xAF
-#define VIC_IFACE_CFG_RMC3 (1<<7)
-#define VIC_IFACE_CFG_RMC2 (1<<6)
-#define VIC_IFACE_CFG_RMC1 (1<<5)
-#define VIC_IFACE_CFG_HALT (1<<4)
-#define VIC_IFACE_CFG_NOHALT (0<<4)
-#define VIC_IFACE_CFG_NORMC (1<<3)
-#define VIC_IFACE_CFG_DEADLOCK_VAL(x) (((x)>>3)&3)
-#define VIC_IFACE_CFG_MSTAB (1<<2)
-#define VIC_IFACE_CFG_TURBO (1<<1)
-#define VIC_IFACE_CFG_NOTURBO (0<<1)
-#define VIC_IFACE_CFG_VME (1<<0)
-#define VIC_REQ_CFG 0xB3
-#define VIC_REQ_CFG_FAIRNESS_DISABLED 0
-#define VIC_REQ_CFG_FAIRNESS_ENABLED 1
-#define VIC_REQ_CFG_TIMO_DISABLED 0xf
-#define VIC_REQ_CFG_DRAM_REFRESH (1<<4)
-#define VIC_REQ_CFG_LEVEL(x) (((x)&3)<<5)
-#define VIC_REQ_CFG_PRIO_ARBITRATION (1<<7)
-#define VIC_REQ_CFG_RR_ARBITRATION (0<<7)
-#define VIC_AMS 0xB7
-#define VIC_AMS_AM_2_0 (1<<7)
-#define VIC_AMS_AM_5_3 (1<<6)
-#define VIC_AMS_CODE(x) ((x)&0x1f)
-#define VIC_BERR_STATUS 0xBB
-#define VIC_DMA_STATUS 0xBF
-#define VIC_SS0CR0 0xC3
-#define VIC_SS1CR0 0xCB
-#define VIC_SSxCR0_LOCAL_XFER_ACCEL (2)
-#define VIC_SSxCR0_LOCAL_XFER_SINGLE (1)
-#define VIC_SSxCR0_LOCAL_XFER_NONE (0)
-#define VIC_SSxCR0_A32 (0<<2)
-#define VIC_SSxCR0_A24 (1<<2)
-#define VIC_SSxCR0_A16 (2<<2)
-#define VIC_SSxCR0_USER (3<<2)
-#define VIC_SSxCR0_D32 (1<<4)
-#define VIC_SSxCR0_SUPER (1<<5)
-#define VIC_SS0CR0_TIMER_FREQ_MASK (3<<6)
-#define VIC_SS0CR0_TIMER_FREQ_NONE (0<<6)
-#define VIC_SS0CR0_TIMER_FREQ_50HZ (1<<6)
-#define VIC_SS0CR0_TIMER_FREQ_1000HZ (2<<6)
-#define VIC_SS0CR0_TIMER_FREQ_100HZ (3<<6)
-#define VIC_SS1CR0_MASTER_WRPOST (1<<6)
-#define VIC_SS1CR0_SLAVE_WRPOST (1<<7)
-#define VIC_SS0CR1 0xC7
-#define VIC_SS1CR1 0xCF
-#define VIC_SSxCR1_TF2(x) (((x)&0xf)<<4)
-#define VIC_SSxCR1_TF1(x) ((x)&0xf)
-#define VIC_RELEASE 0xD3
-#define VIC_RELEASE_BLKXFER_BLEN(x) ((x)&0x1f)
-#define VIC_RELEASE_ROR (0<<6)
-#define VIC_RELEASE_RWD (1<<6)
-#define VIC_RELEASE_ROC (2<<6)
-#define VIC_RELEASE_BCAP (3<<6)
-#define VIC_BXFER_CTRL 0xD7
-#define VIC_BXFER_CTRL_MODULE (1<<7)
-#define VIC_BXFER_CTRL_LOCAL (1<<6)
-#define VIC_BXFER_CTRL_MOVEM (1<<5)
-#define VIC_BXFER_CTRL_READ (1<<4)
-#define VIC_BXFER_CTRL_WRITE (0<<4)
-#define VIC_BXFER_CTRL_INTERLEAVE(x) ((x)&0xf)
-#define VIC_BXFER_LEN_LO 0xDB
-#define VIC_BXFER_LEN_HI 0xDF
-#define VIC_SYS_RESET 0xE3
-
-#ifndef __ASSEMBLY__
-
-#define vic_inb(p) (*(volatile unsigned char *)(VIC_BASE + (p)))
-#define vic_outb(v,p) (*((volatile unsigned char *)(VIC_BASE + (p))) = v)
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _ASM_BAGET_VIC_H */
#include <linux/compiler.h>
#include <linux/types.h>
#include <asm/byteorder.h> /* sigh ... */
+#include <asm/cpu-features.h>
#if (_MIPS_SZLONG == 32)
#define SZLONG_LOG 5
#define SZLONG_MASK 31UL
-#define __LL "ll"
-#define __SC "sc"
+#define __LL "ll "
+#define __SC "sc "
#define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x))
#elif (_MIPS_SZLONG == 64)
#define SZLONG_LOG 6
#define SZLONG_MASK 63UL
-#define __LL "lld"
-#define __SC "scd"
+#define __LL "lld "
+#define __SC "scd "
#define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x))
#endif
#ifdef __KERNEL__
+#include <asm/interrupt.h>
#include <asm/sgidefs.h>
-#include <asm/system.h>
+#include <asm/war.h>
/*
* clear_bit() doesn't provide any barrier for the compiler.
* Only disable interrupt for kernel mode stuff to keep usermode stuff
* that dares to use kernel include files alive.
*/
+
#define __bi_flags unsigned long flags
-#define __bi_cli() local_irq_disable()
-#define __bi_save_flags(x) local_save_flags(x)
#define __bi_local_irq_save(x) local_irq_save(x)
#define __bi_local_irq_restore(x) local_irq_restore(x)
#else
#define __bi_flags
-#define __bi_cli()
-#define __bi_save_flags(x)
#define __bi_local_irq_save(x)
#define __bi_local_irq_restore(x)
#endif /* __KERNEL__ */
-#ifdef CONFIG_CPU_HAS_LLSC
-
-/*
- * These functions for MIPS ISA > 1 are interrupt and SMP proof and
- * interrupt friendly
- */
-
/*
* set_bit - Atomically set a bit in memory
* @nr: the bit to set
unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
unsigned long temp;
- __asm__ __volatile__(
- "1:\t" __LL "\t%0, %1\t\t# set_bit\n\t"
- "or\t%0, %2\n\t"
- __SC "\t%0, %1\n\t"
- "beqz\t%0, 1b"
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ "1: " __LL "%0, %1 # set_bit \n"
+ " or %0, %2 \n"
+ " "__SC "%0, %1 \n"
+ " beqzl %0, 1b \n"
: "=&r" (temp), "=m" (*m)
: "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
+ "1: " __LL "%0, %1 # set_bit \n"
+ " or %0, %2 \n"
+ " "__SC "%0, %1 \n"
+ " beqz %0, 1b \n"
+ : "=&r" (temp), "=m" (*m)
+ : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
+ } else {
+ volatile unsigned long *a = addr;
+ unsigned long mask;
+ __bi_flags;
+
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
+ __bi_local_irq_save(flags);
+ *a |= mask;
+ __bi_local_irq_restore(flags);
+ }
}
/*
unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
unsigned long temp;
- __asm__ __volatile__(
- "1:\t" __LL "\t%0, %1\t\t# clear_bit\n\t"
- "and\t%0, %2\n\t"
- __SC "\t%0, %1\n\t"
- "beqz\t%0, 1b\n\t"
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ "1: " __LL "%0, %1 # clear_bit \n"
+ " and %0, %2 \n"
+ " " __SC "%0, %1 \n"
+ " beqzl %0, 1b \n"
+ : "=&r" (temp), "=m" (*m)
+ : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
+ "1: " __LL "%0, %1 # clear_bit \n"
+ " and %0, %2 \n"
+ " " __SC "%0, %1 \n"
+ " beqz %0, 1b \n"
: "=&r" (temp), "=m" (*m)
: "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
+ } else {
+ volatile unsigned long *a = addr;
+ unsigned long mask;
+ __bi_flags;
+
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
+ __bi_local_irq_save(flags);
+ *a &= ~mask;
+ __bi_local_irq_restore(flags);
+ }
}
/*
*/
static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
{
- unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
- unsigned long temp;
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
+ unsigned long temp;
- __asm__ __volatile__(
- "1:\t" __LL "\t%0, %1\t\t# change_bit\n\t"
- "xor\t%0, %2\n\t"
- __SC "\t%0, %1\n\t"
- "beqz\t%0, 1b"
+ __asm__ __volatile__(
+ "1: " __LL "%0, %1 # change_bit \n"
+ " xor %0, %2 \n"
+ " "__SC "%0, %1 \n"
+ " beqzl %0, 1b \n"
: "=&r" (temp), "=m" (*m)
: "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
+ } else if (cpu_has_llsc) {
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ "1: " __LL "%0, %1 # change_bit \n"
+ " xor %0, %2 \n"
+ " "__SC "%0, %1 \n"
+ " beqz %0, 1b \n"
+ : "=&r" (temp), "=m" (*m)
+ : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
+ } else {
+ volatile unsigned long *a = addr;
+ unsigned long mask;
+ __bi_flags;
+
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
+ __bi_local_irq_save(flags);
+ *a ^= mask;
+ __bi_local_irq_restore(flags);
+ }
}
/*
static inline int test_and_set_bit(unsigned long nr,
volatile unsigned long *addr)
{
- unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
- unsigned long temp, res;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t# test_and_set_bit\n"
- "1:\t" __LL "\t%0, %1\n\t"
- "or\t%2, %0, %3\n\t"
- __SC "\t%2, %1\n\t"
- "beqz\t%2, 1b\n\t"
- " and\t%2, %0, %3\n\t"
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
+ "1: " __LL "%0, %1 # test_and_set_bit \n"
+ " or %2, %0, %3 \n"
+ " " __SC "%2, %1 \n"
+ " beqzl %2, 1b \n"
+ " and %2, %0, %3 \n"
#ifdef CONFIG_SMP
- "sync\n\t"
+ "sync \n"
+#endif
+ : "=&r" (temp), "=m" (*m), "=&r" (res)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
+ : "memory");
+
+ return res != 0;
+ } else if (cpu_has_llsc) {
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
+ " .set noreorder # test_and_set_bit \n"
+ "1: " __LL "%0, %1 \n"
+ " or %2, %0, %3 \n"
+ " " __SC "%2, %1 \n"
+ " beqz %2, 1b \n"
+ " and %2, %0, %3 \n"
+#ifdef CONFIG_SMP
+ "sync \n"
#endif
".set\treorder"
: "=&r" (temp), "=m" (*m), "=&r" (res)
: "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
: "memory");
- return res != 0;
+ return res != 0;
+ } else {
+ volatile unsigned long *a = addr;
+ unsigned long mask;
+ int retval;
+ __bi_flags;
+
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
+ __bi_local_irq_save(flags);
+ retval = (mask & *a) != 0;
+ *a |= mask;
+ __bi_local_irq_restore(flags);
+
+ return retval;
+ }
}
/*
static inline int test_and_clear_bit(unsigned long nr,
volatile unsigned long *addr)
{
- unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
- unsigned long temp, res;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t# test_and_clear_bit\n"
- "1:\t" __LL "\t%0, %1\n\t"
- "or\t%2, %0, %3\n\t"
- "xor\t%2, %3\n\t"
- __SC "\t%2, %1\n\t"
- "beqz\t%2, 1b\n\t"
- " and\t%2, %0, %3\n\t"
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
+ "1: " __LL "%0, %1 # test_and_clear_bit \n"
+ " or %2, %0, %3 \n"
+ " xor %2, %3 \n"
+ __SC "%2, %1 \n"
+ " beqzl %2, 1b \n"
+ " and %2, %0, %3 \n"
#ifdef CONFIG_SMP
- "sync\n\t"
+ " sync \n"
#endif
- ".set\treorder"
: "=&r" (temp), "=m" (*m), "=&r" (res)
: "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
: "memory");
- return res != 0;
+ return res != 0;
+ } else if (cpu_has_llsc) {
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
+ " .set noreorder # test_and_clear_bit \n"
+ "1: " __LL "%0, %1 \n"
+ " or %2, %0, %3 \n"
+ " xor %2, %3 \n"
+ __SC "%2, %1 \n"
+ " beqz %2, 1b \n"
+ " and %2, %0, %3 \n"
+#ifdef CONFIG_SMP
+ " sync \n"
+#endif
+ " .set reorder \n"
+ : "=&r" (temp), "=m" (*m), "=&r" (res)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
+ : "memory");
+
+ return res != 0;
+ } else {
+ volatile unsigned long *a = addr;
+ unsigned long mask;
+ int retval;
+ __bi_flags;
+
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
+ __bi_local_irq_save(flags);
+ retval = (mask & *a) != 0;
+ *a &= ~mask;
+ __bi_local_irq_restore(flags);
+
+ return retval;
+ }
}
/*
static inline int test_and_change_bit(unsigned long nr,
volatile unsigned long *addr)
{
- unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
- unsigned long temp, res;
-
- __asm__ __volatile__(
- ".set\tnoreorder\t\t# test_and_change_bit\n"
- "1:\t" __LL "\t%0, %1\n\t"
- "xor\t%2, %0, %3\n\t"
- __SC "\t%2, %1\n\t"
- "beqz\t%2, 1b\n\t"
- " and\t%2, %0, %3\n\t"
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
+ "1: " __LL " %0, %1 # test_and_change_bit \n"
+ " xor %2, %0, %3 \n"
+ " "__SC "%2, %1 \n"
+ " beqzl %2, 1b \n"
+ " and %2, %0, %3 \n"
#ifdef CONFIG_SMP
- "sync\n\t"
+ " sync \n"
#endif
- ".set\treorder"
: "=&r" (temp), "=m" (*m), "=&r" (res)
: "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
: "memory");
- return res != 0;
-}
-
-/*
- * __test_and_change_bit - Change a bit and return its old value
- * @nr: Bit to change
- * @addr: Address to count from
- *
- * This operation is non-atomic and can be reordered.
- * If two examples of this operation race, one can appear to succeed
- * but actually fail. You must protect multiple accesses with a lock.
- */
-static inline int __test_and_change_bit(unsigned long nr,
- volatile unsigned long *addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask;
- int retval;
-
- a += (nr >> SZLONG_LOG);
- mask = 1UL << (nr & SZLONG_MASK);
- retval = ((mask & *a) != 0);
- *a ^= mask;
-
- return retval;
-}
-
-#else /* MIPS I */
-
-/*
- * set_bit - Atomically set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * This function is atomic and may not be reordered. See __set_bit()
- * if you do not require the atomic guarantees.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
-static inline void set_bit(unsigned long nr, volatile unsigned long * addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask;
- __bi_flags;
-
- a += nr >> SZLONG_LOG;
- mask = 1 << (nr & SZLONG_MASK);
- __bi_local_irq_save(flags);
- *a |= mask;
- __bi_local_irq_restore(flags);
-}
-
-/*
- * __set_bit - Set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * Unlike set_bit(), this function is non-atomic and may be reordered.
- * If it's called on the same region of memory simultaneously, the effect
- * may be that only one operation succeeds.
- */
-static inline void __set_bit(unsigned long nr, volatile unsigned long * addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask;
-
- a += nr >> SZLONG_LOG;
- mask = 1 << (nr & SZLONG_MASK);
- *a |= mask;
-}
-
-/*
- * clear_bit - Clears a bit in memory
- * @nr: Bit to clear
- * @addr: Address to start counting from
- *
- * clear_bit() is atomic and may not be reordered. However, it does
- * not contain a memory barrier, so if it is used for locking purposes,
- * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
- * in order to ensure changes are visible on other processors.
- */
-static inline void clear_bit(unsigned long nr, volatile unsigned long * addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask;
- __bi_flags;
+ return res != 0;
+ } else if (cpu_has_llsc) {
+ unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
+ unsigned long temp, res;
+
+ __asm__ __volatile__(
+ " .set noreorder # test_and_change_bit \n"
+ "1: " __LL " %0, %1 \n"
+ " xor %2, %0, %3 \n"
+ " "__SC "\t%2, %1 \n"
+ " beqz %2, 1b \n"
+ " and %2, %0, %3 \n"
+#ifdef CONFIG_SMP
+ " sync \n"
+#endif
+ " .set reorder \n"
+ : "=&r" (temp), "=m" (*m), "=&r" (res)
+ : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
+ : "memory");
- a += nr >> SZLONG_LOG;
- mask = 1 << (nr & SZLONG_MASK);
- __bi_local_irq_save(flags);
- *a &= ~mask;
- __bi_local_irq_restore(flags);
-}
+ return res != 0;
+ } else {
+ volatile unsigned long *a = addr;
+ unsigned long mask, retval;
+ __bi_flags;
-static inline void __clear_bit(unsigned long nr, volatile unsigned long * addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask;
+ a += nr >> SZLONG_LOG;
+ mask = 1 << (nr & SZLONG_MASK);
+ __bi_local_irq_save(flags);
+ retval = (mask & *a) != 0;
+ *a ^= mask;
+ __bi_local_irq_restore(flags);
- a += nr >> SZLONG_LOG;
- mask = 1 << (nr & SZLONG_MASK);
- *a &= ~mask;
+ return retval;
+ }
}
/*
- * change_bit - Toggle a bit in memory
+ * __test_and_change_bit - Change a bit and return its old value
* @nr: Bit to change
- * @addr: Address to start counting from
- *
- * change_bit() is atomic and may not be reordered.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
-static inline void change_bit(unsigned long nr, volatile unsigned long * addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask;
- __bi_flags;
-
- a += nr >> SZLONG_LOG;
- mask = 1 << (nr & SZLONG_MASK);
- __bi_local_irq_save(flags);
- *a ^= mask;
- __bi_local_irq_restore(flags);
-}
-
-/*
- * __change_bit - Toggle a bit in memory
- * @nr: the bit to change
- * @addr: the address to start counting from
- *
- * Unlike change_bit(), this function is non-atomic and may be reordered.
- * If it's called on the same region of memory simultaneously, the effect
- * may be that only one operation succeeds.
- */
-static inline void __change_bit(unsigned long nr, volatile unsigned long * addr)
-{
- unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
-
- *m ^= 1UL << (nr & SZLONG_MASK);
-}
-
-/*
- * test_and_set_bit - Set a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
-static inline int test_and_set_bit(unsigned long nr,
- volatile unsigned long * addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask;
- int retval;
- __bi_flags;
-
- a += nr >> SZLONG_LOG;
- mask = 1 << (nr & SZLONG_MASK);
- __bi_local_irq_save(flags);
- retval = (mask & *a) != 0;
- *a |= mask;
- __bi_local_irq_restore(flags);
-
- return retval;
-}
-
-/*
- * __test_and_set_bit - Set a bit and return its old value
- * @nr: Bit to set
* @addr: Address to count from
*
* This operation is non-atomic and can be reordered.
* If two examples of this operation race, one can appear to succeed
* but actually fail. You must protect multiple accesses with a lock.
*/
-static inline int __test_and_set_bit(unsigned long nr,
+static inline int __test_and_change_bit(unsigned long nr,
volatile unsigned long *addr)
{
volatile unsigned long *a = addr;
unsigned long mask;
int retval;
- a += nr >> SZLONG_LOG;
- mask = 1 << (nr & SZLONG_MASK);
- retval = (mask & *a) != 0;
- *a |= mask;
-
- return retval;
-}
-
-/*
- * test_and_clear_bit - Clear a bit and return its old value
- * @nr: Bit to clear
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
-static inline int test_and_clear_bit(unsigned long nr,
- volatile unsigned long * addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask;
- int retval;
- __bi_flags;
-
- a += nr >> SZLONG_LOG;
- mask = 1 << (nr & SZLONG_MASK);
- __bi_local_irq_save(flags);
- retval = (mask & *a) != 0;
- *a &= ~mask;
- __bi_local_irq_restore(flags);
-
- return retval;
-}
-
-/*
- * __test_and_clear_bit - Clear a bit and return its old value
- * @nr: Bit to clear
- * @addr: Address to count from
- *
- * This operation is non-atomic and can be reordered.
- * If two examples of this operation race, one can appear to succeed
- * but actually fail. You must protect multiple accesses with a lock.
- */
-static inline int __test_and_clear_bit(unsigned long nr,
- volatile unsigned long * addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask;
- int retval;
-
a += (nr >> SZLONG_LOG);
mask = 1UL << (nr & SZLONG_MASK);
retval = ((mask & *a) != 0);
- *a &= ~mask;
-
- return retval;
-}
-
-/*
- * test_and_change_bit - Change a bit and return its old value
- * @nr: Bit to change
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
-static inline int test_and_change_bit(unsigned long nr,
- volatile unsigned long * addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask, retval;
- __bi_flags;
-
- a += nr >> SZLONG_LOG;
- mask = 1 << (nr & SZLONG_MASK);
- __bi_local_irq_save(flags);
- retval = (mask & *a) != 0;
- *a ^= mask;
- __bi_local_irq_restore(flags);
-
- return retval;
-}
-
-/*
- * __test_and_change_bit - Change a bit and return its old value
- * @nr: Bit to change
- * @addr: Address to count from
- *
- * This operation is non-atomic and can be reordered.
- * If two examples of this operation race, one can appear to succeed
- * but actually fail. You must protect multiple accesses with a lock.
- */
-static inline int __test_and_change_bit(unsigned long nr,
- volatile unsigned long * addr)
-{
- volatile unsigned long *a = addr;
- unsigned long mask;
- int retval;
-
- a += (nr >> SZLONG_LOG);
- mask = 1 << (nr & SZLONG_MASK);
- retval = (mask & *a) != 0;
*a ^= mask;
return retval;
}
#undef __bi_flags
-#undef __bi_cli
-#undef __bi_save_flags
+#undef __bi_local_irq_save
#undef __bi_local_irq_restore
-#endif /* MIPS I */
-
/*
* test_bit - Determine whether a bit is set
* @nr: bit number to test
#define MACH_MOMENCO_OCELOT_G 1
#define MACH_MOMENCO_OCELOT_C 2
#define MACH_MOMENCO_JAGUAR_ATX 3
+#define MACH_MOMENCO_OCELOT_3 4
/*
* Valid machtype for group ITE
#define MACH_XXS1500 6 /* Au1500-based eval board */
#define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */
#define MACH_PB1550 8 /* Au1550-based eval board */
+#define MACH_DB1550 9 /* Au1550-based eval board */
/*
* Valid machtype for group NEC_VR41XX
int len, int sum,
int *err_ptr)
{
+ might_sleep();
sum = csum_partial(src, len, sum);
if (copy_to_user(dst, src, len)) {
static inline void *compat_alloc_user_space(long len)
{
- unsigned long sp = (unsigned long) current_thread_info() +
- THREAD_SIZE - 32;
+ struct pt_regs *regs = (struct pt_regs *)
+ ((unsigned long) current_thread_info() + THREAD_SIZE - 32) - 1;
- return (void *) (sp - len);
+ return (void *) (regs->regs[29] - len);
}
#endif /* _ASM_COMPAT_H */
--- /dev/null
+/*
+ * Copyright (C) 2004 Maciej W. Rozycki
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef _ASM_COMPILER_H
+#define _ASM_COMPILER_H
+
+#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
+#define GCC_REG_ACCUM "$0"
+#else
+#define GCC_REG_ACCUM "accum"
+#endif
+
+#endif /* _ASM_COMPILER_H */
#ifndef __ASM_CPU_FEATURES_H
#define __ASM_CPU_FEATURES_H
+#include <asm/cpu.h>
+#include <asm/cpu-info.h>
#include <cpu-feature-overrides.h>
/*
#define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES)
#endif
#ifndef cpu_has_ic_fills_f_dc
-#define cpu_has_ic_fills_f_dc (cpu_data[0].dcache.flags & MIPS_CACHE_IC_F_DC)
+#define cpu_has_ic_fills_f_dc (cpu_data[0].icache.flags & MIPS_CACHE_IC_F_DC)
+#endif
+
+/*
+ * Certain CPUs may throw bizarre exceptions if not the whole cacheline
+ * contains valid instructions. For these we ensure proper alignment of
+ * signal trampolines and pad them to the size of a full cache lines with
+ * nops. This is also used in structure definitions so can't be a test macro
+ * like the others.
+ */
+#ifndef PLAT_TRAMPOLINE_STUFF_LINE
+#define PLAT_TRAMPOLINE_STUFF_LINE 0UL
#endif
#ifdef CONFIG_MIPS32
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 Waldorf GMBH
+ * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
+ * Copyright (C) 1996 Paul M. Antoine
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef __ASM_CPU_INFO_H
+#define __ASM_CPU_INFO_H
+
+#include <linux/config.h>
+#include <asm/cache.h>
+
+#ifdef CONFIG_SGI_IP27
+#include <asm/sn/types.h>
+#endif
+
+/*
+ * Descriptor for a cache
+ */
+struct cache_desc {
+ unsigned short linesz; /* Size of line in bytes */
+ unsigned short ways; /* Number of ways */
+ unsigned short sets; /* Number of lines per set */
+ unsigned int waysize; /* Bytes per way */
+ unsigned int waybit; /* Bits to select in a cache set */
+ unsigned int flags; /* Flags describing cache properties */
+};
+
+/*
+ * Flag definitions
+ */
+#define MIPS_CACHE_NOT_PRESENT 0x00000001
+#define MIPS_CACHE_VTAG 0x00000002 /* Virtually tagged cache */
+#define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */
+#define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */
+
+struct cpuinfo_mips {
+ unsigned long udelay_val;
+ unsigned long asid_cache;
+#if defined(CONFIG_SGI_IP27)
+// cpuid_t p_cpuid; /* PROM assigned cpuid */
+ cnodeid_t p_nodeid; /* my node ID in compact-id-space */
+ nasid_t p_nasid; /* my node ID in numa-as-id-space */
+ unsigned char p_slice; /* Physical position on node board */
+#endif
+#if 0
+ unsigned long loops_per_sec;
+ unsigned long ipi_count;
+ unsigned long irq_attempt[NR_IRQS];
+ unsigned long smp_local_irq_count;
+ unsigned long prof_multiplier;
+ unsigned long prof_counter;
+#endif
+
+ /*
+ * Capability and feature descriptor structure for MIPS CPU
+ */
+ unsigned long options;
+ unsigned int processor_id;
+ unsigned int fpu_id;
+ unsigned int cputype;
+ int isa_level;
+ int tlbsize;
+ struct cache_desc icache; /* Primary I-cache */
+ struct cache_desc dcache; /* Primary D or combined I/D cache */
+ struct cache_desc scache; /* Secondary cache */
+ struct cache_desc tcache; /* Tertiary/split secondary cache */
+ void *data; /* Additional data */
+} __attribute__((aligned(SMP_CACHE_BYTES)));
+
+extern struct cpuinfo_mips cpu_data[];
+#define current_cpu_data cpu_data[smp_processor_id()]
+
+extern void cpu_probe(void);
+extern void cpu_report(void);
+
+#endif /* __ASM_CPU_INFO_H */
/*
- * Debug macros for run-time debugging. Turned on/off with CONFIG_RUNTIME_DEBUG option.
+ * Debug macros for run-time debugging.
+ * Turned on/off with CONFIG_RUNTIME_DEBUG option.
*
* Copyright (C) 2001 MontaVista Software Inc.
* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
--- /dev/null
+/*
+ * include/asm-mips/dec/serial.h
+ *
+ * Definitions common to all DECstation serial devices.
+ *
+ * Copyright (C) 2004 Maciej W. Rozycki
+ *
+ * Based on bits extracted from drivers/tc/zs.h for which
+ * the following copyrights apply:
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
+ * Copyright (C) Harald Koerfgen
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef __ASM_MIPS_DEC_SERIAL_H
+#define __ASM_MIPS_DEC_SERIAL_H
+
+struct dec_serial_hook {
+ int (*init_channel)(void *handle);
+ void (*init_info)(void *handle);
+ void (*rx_char)(unsigned char ch, unsigned char fl);
+ int (*poll_rx_char)(void *handle);
+ int (*poll_tx_char)(void *handle, unsigned char ch);
+ unsigned int cflags;
+};
+
+extern int register_dec_serial_hook(unsigned int channel,
+ struct dec_serial_hook *hook);
+extern int unregister_dec_serial_hook(unsigned int channel);
+
+#endif /* __ASM_MIPS_DEC_SERIAL_H */
#include <linux/config.h>
#include <linux/param.h>
+#include <asm/compiler.h>
+
extern unsigned long loops_per_jiffy;
static inline void __delay(unsigned long loops)
if (sizeof(long) == 4)
__asm__("multu\t%2, %3"
: "=h" (usecs), "=l" (lo)
- : "r" (usecs),"r" (lpj));
+ : "r" (usecs), "r" (lpj)
+ : GCC_REG_ACCUM);
else if (sizeof(long) == 8)
__asm__("dmultu\t%2, %3"
: "=h" (usecs), "=l" (lo)
- : "r" (usecs),"r" (lpj));
+ : "r" (usecs), "r" (lpj)
+ : GCC_REG_ACCUM);
__delay(usecs);
}
/*
- * Copyright (C) 2000 Maciej W. Rozycki
+ * Copyright (C) 2000, 2004 Maciej W. Rozycki
* Copyright (C) 2003 Ralf Baechle
*
* This file is subject to the terms and conditions of the GNU General Public
#if (_MIPS_SZLONG == 32)
+#include <asm/compiler.h>
+
/*
* No traps on overflows for any of these...
*/
if (__high) \
__asm__("divu $0, %z2, %z3" \
: "=h" (__upper), "=l" (__high) \
- : "Jr" (__high), "Jr" (__base)); \
+ : "Jr" (__high), "Jr" (__base) \
+ : GCC_REG_ACCUM); \
\
__mod = do_div64_32(__low, __upper, __low, __base); \
\
extern void dma_cache_sync(void *vaddr, size_t size,
enum dma_data_direction direction);
+#define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
+
+extern int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
+ dma_addr_t device_addr, size_t size, int flags);
+extern void dma_release_declared_memory(struct device *dev);
+extern void * dma_mark_declared_memory_occupied(struct device *dev,
+ dma_addr_t device_addr, size_t size);
+
#endif /* _ASM_DMA_MAPPING_H */
#define _ASM_FIXMAP_H
#include <linux/config.h>
-#include <linux/kernel.h>
#include <asm/page.h>
#ifdef CONFIG_HIGHMEM
#include <linux/threads.h>
* Prototypes
*/
+extern int kgdb_enabled;
void set_debug_traps(void);
void set_async_breakpoint(unsigned long *epc);
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
-#define HARDIRQ_BITS 8
-
-/*
- * The hardirq mask has to be large enough to have
- * space for potentially all IRQ sources in the system
- * nesting on a single CPU:
- */
-#if (1 << HARDIRQ_BITS) < NR_IRQS
-# error HARDIRQ_BITS is too low!
-#endif
-
-#define irq_enter() (preempt_count() += HARDIRQ_OFFSET)
-#define irq_exit() \
-do { \
- preempt_count() -= IRQ_EXIT_OFFSET; \
- if (!in_interrupt() && softirq_pending(smp_processor_id())) \
- do_softirq(); \
- preempt_enable_no_resched(); \
-} while (0)
+extern void ack_bad_irq(unsigned int irq);
#endif /* _ASM_HARDIRQ_H */
#ifdef __ASSEMBLY__
.macro _ssnop
- sll $0, $2, 1
+ sll $0, $0, 1
.endm
/*
#include <linux/profile.h>
#include <asm/atomic.h>
-extern void mask_irq(unsigned int irq);
-extern void unmask_irq(unsigned int irq);
extern void disable_8259A_irq(unsigned int irq);
extern void enable_8259A_irq(unsigned int irq);
extern int i8259A_irq_pending(unsigned int irq);
* for more details.
*
* This file contains the MIPS architecture specific IDE code.
- *
- * Copyright (C) 1994-1996 Linus Torvalds & authors
*/
-
#ifndef __ASM_IDE_H
#define __ASM_IDE_H
-#ifdef __KERNEL__
-
#include <ide.h>
-#define __ide_mm_insw ide_insw
-#define __ide_mm_insl ide_insl
-#define __ide_mm_outsw ide_outsw
-#define __ide_mm_outsl ide_outsl
-
-#endif /* __KERNEL__ */
-
#endif /* __ASM_IDE_H */
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
+ * Copyright (C) 1996 by Paul M. Antoine
+ * Copyright (C) 1999 Silicon Graphics
+ * Copyright (C) 2000 MIPS Technologies, Inc.
+ */
+#ifndef _ASM_INTERRUPT_H
+#define _ASM_INTERRUPT_H
+
+#include <asm/hazards.h>
+
+__asm__ (
+ ".macro\tlocal_irq_enable\n\t"
+ ".set\tpush\n\t"
+ ".set\treorder\n\t"
+ ".set\tnoat\n\t"
+ "mfc0\t$1,$12\n\t"
+ "ori\t$1,0x1f\n\t"
+ "xori\t$1,0x1e\n\t"
+ "mtc0\t$1,$12\n\t"
+ "irq_enable_hazard\n\t"
+ ".set\tpop\n\t"
+ ".endm");
+
+static inline void local_irq_enable(void)
+{
+ __asm__ __volatile__(
+ "local_irq_enable"
+ : /* no outputs */
+ : /* no inputs */
+ : "memory");
+}
+
+/*
+ * For cli() we have to insert nops to make sure that the new value
+ * has actually arrived in the status register before the end of this
+ * macro.
+ * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
+ * no nops at all.
+ */
+__asm__ (
+ ".macro\tlocal_irq_disable\n\t"
+ ".set\tpush\n\t"
+ ".set\tnoat\n\t"
+ "mfc0\t$1,$12\n\t"
+ "ori\t$1,1\n\t"
+ "xori\t$1,1\n\t"
+ ".set\tnoreorder\n\t"
+ "mtc0\t$1,$12\n\t"
+ "irq_disable_hazard\n\t"
+ ".set\tpop\n\t"
+ ".endm");
+
+static inline void local_irq_disable(void)
+{
+ __asm__ __volatile__(
+ "local_irq_disable"
+ : /* no outputs */
+ : /* no inputs */
+ : "memory");
+}
+
+__asm__ (
+ ".macro\tlocal_save_flags flags\n\t"
+ ".set\tpush\n\t"
+ ".set\treorder\n\t"
+ "mfc0\t\\flags, $12\n\t"
+ ".set\tpop\n\t"
+ ".endm");
+
+#define local_save_flags(x) \
+__asm__ __volatile__( \
+ "local_save_flags %0" \
+ : "=r" (x))
+
+__asm__ (
+ ".macro\tlocal_irq_save result\n\t"
+ ".set\tpush\n\t"
+ ".set\treorder\n\t"
+ ".set\tnoat\n\t"
+ "mfc0\t\\result, $12\n\t"
+ "ori\t$1, \\result, 1\n\t"
+ "xori\t$1, 1\n\t"
+ ".set\tnoreorder\n\t"
+ "mtc0\t$1, $12\n\t"
+ "irq_disable_hazard\n\t"
+ ".set\tpop\n\t"
+ ".endm");
+
+#define local_irq_save(x) \
+__asm__ __volatile__( \
+ "local_irq_save\t%0" \
+ : "=r" (x) \
+ : /* no inputs */ \
+ : "memory")
+
+__asm__ (
+ ".macro\tlocal_irq_restore flags\n\t"
+ ".set\tnoreorder\n\t"
+ ".set\tnoat\n\t"
+ "mfc0\t$1, $12\n\t"
+ "andi\t\\flags, 1\n\t"
+ "ori\t$1, 1\n\t"
+ "xori\t$1, 1\n\t"
+ "or\t\\flags, $1\n\t"
+ "mtc0\t\\flags, $12\n\t"
+ "irq_disable_hazard\n\t"
+ ".set\tat\n\t"
+ ".set\treorder\n\t"
+ ".endm");
+
+#define local_irq_restore(flags) \
+do { \
+ unsigned long __tmp1; \
+ \
+ __asm__ __volatile__( \
+ "local_irq_restore\t%0" \
+ : "=r" (__tmp1) \
+ : "0" (flags) \
+ : "memory"); \
+} while(0)
+
+#define irqs_disabled() \
+({ \
+ unsigned long flags; \
+ local_save_flags(flags); \
+ !(flags & 1); \
+})
+
+#endif /* _ASM_INTERRUPT_H */
#define _ASM_IO_H
#include <linux/config.h>
+#include <linux/compiler.h>
#include <linux/types.h>
#include <asm/addrspace.h>
#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
extern void * __ioremap(phys_t offset, phys_t size, unsigned long flags);
-extern void __iounmap(void *addr);
+extern void __iounmap(volatile void __iomem *addr);
-static inline void * __ioremap_mode(unsigned long offset, unsigned long size,
+static inline void * __ioremap_mode(phys_t offset, unsigned long size,
unsigned long flags)
{
if (cpu_has_64bit_addresses) {
#define ioremap_uncached_accelerated(offset, size) \
__ioremap_mode((offset), (size), _CACHE_UNCACHED_ACCELERATED)
-static inline void iounmap(void *addr)
+static inline void iounmap(volatile void __iomem *addr)
{
if (cpu_has_64bits)
return;
__iounmap(addr);
}
-#define __raw_readb(addr) (*(volatile unsigned char *)(addr))
-#define __raw_readw(addr) (*(volatile unsigned short *)(addr))
-#define __raw_readl(addr) (*(volatile unsigned int *)(addr))
+#define __raw_readb(addr) \
+ (*(volatile unsigned char *) __swizzle_addr_b((unsigned long)(addr)))
+#define __raw_readw(addr) \
+ (*(volatile unsigned short *) __swizzle_addr_w((unsigned long)(addr)))
+#define __raw_readl(addr) \
+ (*(volatile unsigned int *) __swizzle_addr_l((unsigned long)(addr)))
#ifdef CONFIG_MIPS32
#define ____raw_readq(addr) \
({ \
" sll %L0, %L0, 0 \n" \
" .set mips0 \n" \
: "=r" (__res) \
- : "r" (addr)); \
+ : "r" (__swizzle_addr_q((unsigned long)(addr)))); \
__res; \
})
#define __raw_readq(addr) \
})
#endif
#ifdef CONFIG_MIPS64
-#define ____raw_readq(addr) (*(volatile unsigned long *)(addr))
+#define ____raw_readq(addr) \
+ (*(volatile unsigned long *)__swizzle_addr_q((unsigned long)(addr)))
#define __raw_readq(addr) ____raw_readq(addr)
#endif
#define readl_relaxed(addr) readl(addr)
#define readq_relaxed(addr) readq(addr)
-#define __raw_writeb(b,addr) ((*(volatile unsigned char *)(addr)) = (b))
-#define __raw_writew(w,addr) ((*(volatile unsigned short *)(addr)) = (w))
-#define __raw_writel(l,addr) ((*(volatile unsigned int *)(addr)) = (l))
+#define __raw_writeb(b,addr) \
+do { \
+ ((*(volatile unsigned char *)__swizzle_addr_b((unsigned long)(addr))) = (b)); \
+} while (0)
-/* Depends on MIPS III instruction set */
-#define mmiowb() asm volatile ("sync" ::: "memory")
+#define __raw_writew(w,addr) \
+do { \
+ ((*(volatile unsigned short *)__swizzle_addr_w((unsigned long)(addr))) = (w)); \
+} while (0)
+
+#define __raw_writel(l,addr) \
+do { \
+ ((*(volatile unsigned int *)__swizzle_addr_l((unsigned long)(addr))) = (l)); \
+} while (0)
#ifdef CONFIG_MIPS32
-#define ____raw_writeq(val,addr) \
-({ \
+#define ____raw_writeq(val,addr) \
+do { \
u64 __tmp; \
\
__asm__ __volatile__ ( \
" sd %L0, (%2) \n" \
" .set mips0 \n" \
: "=r" (__tmp) \
- : "0" ((unsigned long long)val), "r" (addr)); \
-})
+ : "0" ((unsigned long long)val), \
+ "r" (__swizzle_addr_q((unsigned long)(addr)))); \
+} while (0)
+
#define __raw_writeq(val,addr) \
-({ \
+do { \
unsigned long __flags; \
\
local_irq_save(__flags); \
____raw_writeq(val, addr); \
local_irq_restore(__flags); \
-})
+} while (0)
#endif
#ifdef CONFIG_MIPS64
-#define ____raw_writeq(q,addr) ((*(volatile unsigned long *)(addr)) = (q))
+#define ____raw_writeq(q,addr) \
+do { \
+ *(volatile unsigned long *)__swizzle_addr_q((unsigned long)(addr)) = (q); \
+} while (0)
+
#define __raw_writeq(q,addr) ____raw_writeq(q, addr)
#endif
#define writel(l,addr) __raw_writel(__ioswab32(l),(addr))
#define writeq(q,addr) __raw_writeq(__ioswab64(q),(addr))
+/* Depends on MIPS II instruction set */
+#define mmiowb() asm volatile ("sync" ::: "memory")
+
#define memset_io(a,b,c) memset((void *)(a),(b),(c))
#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
/*
- * Definitions for the SGI O2 Crime chip.
+ * Definitions for the SGI CRIME (CPU, Rendering, Interconnect and Memory
+ * Engine)
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
#ifndef __ASM_CRIME_H__
#define __ASM_CRIME_H__
-#include <asm/addrspace.h>
-#include <asm/io.h>
-
/*
* Address map
*/
#define CRIME_BASE 0x14000000 /* physical */
-extern void *sgi_crime;
-
-static inline uint64_t crime_read(unsigned long offset)
-{
- return readq(sgi_crime + offset);
-}
-static inline void crime_write(uint64_t val, unsigned long offset)
-{
- writeq(val, sgi_crime + offset);
-}
-
#undef BIT
-#define BIT(x) (1UL << (x))
-
-/* All CRIME registers are 64 bits */
-#define CRIME_ID 0x000
-
-#define CRIME_ID_MASK 0xff
-#define CRIME_ID_IDBITS 0xf0
-#define CRIME_ID_IDVALUE 0xa0
-#define CRIME_ID_REV 0x0f
-
-#define CRIME_REV_PETTY 0x00
-#define CRIME_REV_11 0x11
-#define CRIME_REV_13 0x13
-#define CRIME_REV_14 0x14
-
-#define CRIME_CONTROL 0x008
-#define CRIME_CONTROL_MASK 0x3fff
-
-/* CRIME_CONTROL register bits */
+#define BIT(x) (1UL << (x))
+
+struct sgi_crime {
+ volatile unsigned long id;
+#define CRIME_ID_MASK 0xff
+#define CRIME_ID_IDBITS 0xf0
+#define CRIME_ID_IDVALUE 0xa0
+#define CRIME_ID_REV 0x0f
+#define CRIME_REV_PETTY 0x00
+#define CRIME_REV_11 0x11
+#define CRIME_REV_13 0x13
+#define CRIME_REV_14 0x14
+
+ volatile unsigned long control;
+#define CRIME_CONTROL_MASK 0x3fff
#define CRIME_CONTROL_TRITON_SYSADC 0x2000
#define CRIME_CONTROL_CRIME_SYSADC 0x1000
#define CRIME_CONTROL_HARD_RESET 0x0800
#define CRIME_CONTROL_SOFT_RESET 0x0400
#define CRIME_CONTROL_DOG_ENA 0x0200
#define CRIME_CONTROL_ENDIANESS 0x0100
-
#define CRIME_CONTROL_ENDIAN_BIG 0x0100
#define CRIME_CONTROL_ENDIAN_LITTLE 0x0000
-
#define CRIME_CONTROL_CQUEUE_HWM 0x000f
#define CRIME_CONTROL_CQUEUE_SHFT 0
#define CRIME_CONTROL_WBUF_HWM 0x00f0
#define CRIME_CONTROL_WBUF_SHFT 8
-#define CRIME_INT_STAT 0x010
-#define CRIME_INT_MASK 0x018
-#define CRIME_SOFT_INT 0x020
-#define CRIME_HARD_INT 0x028
-
-/* Bits in CRIME_INT_XXX and CRIME_HARD_INT */
-#define MACE_VID_IN1_INT BIT (0)
-#define MACE_VID_IN2_INT BIT (1)
-#define MACE_VID_OUT_INT BIT (2)
-#define MACE_ETHERNET_INT BIT (3)
-#define MACE_SUPERIO_INT BIT (4)
-#define MACE_MISC_INT BIT (5)
-#define MACE_AUDIO_INT BIT (6)
-#define MACE_PCI_BRIDGE_INT BIT (7)
-#define MACEPCI_SCSI0_INT BIT (8)
-#define MACEPCI_SCSI1_INT BIT (9)
-#define MACEPCI_SLOT0_INT BIT (10)
-#define MACEPCI_SLOT1_INT BIT (11)
-#define MACEPCI_SLOT2_INT BIT (12)
-#define MACEPCI_SHARED0_INT BIT (13)
-#define MACEPCI_SHARED1_INT BIT (14)
-#define MACEPCI_SHARED2_INT BIT (15)
-#define CRIME_GBE0_INT BIT (16)
-#define CRIME_GBE1_INT BIT (17)
-#define CRIME_GBE2_INT BIT (18)
-#define CRIME_GBE3_INT BIT (19)
-#define CRIME_CPUERR_INT BIT (20)
-#define CRIME_MEMERR_INT BIT (21)
-#define CRIME_RE_EMPTY_E_INT BIT (22)
-#define CRIME_RE_FULL_E_INT BIT (23)
-#define CRIME_RE_IDLE_E_INT BIT (24)
-#define CRIME_RE_EMPTY_L_INT BIT (25)
-#define CRIME_RE_FULL_L_INT BIT (26)
-#define CRIME_RE_IDLE_L_INT BIT (27)
-#define CRIME_SOFT0_INT BIT (28)
-#define CRIME_SOFT1_INT BIT (29)
-#define CRIME_SOFT2_INT BIT (30)
+ volatile unsigned long istat;
+ volatile unsigned long imask;
+ volatile unsigned long soft_int;
+ volatile unsigned long hard_int;
+#define MACE_VID_IN1_INT BIT(0)
+#define MACE_VID_IN2_INT BIT(1)
+#define MACE_VID_OUT_INT BIT(2)
+#define MACE_ETHERNET_INT BIT(3)
+#define MACE_SUPERIO_INT BIT(4)
+#define MACE_MISC_INT BIT(5)
+#define MACE_AUDIO_INT BIT(6)
+#define MACE_PCI_BRIDGE_INT BIT(7)
+#define MACEPCI_SCSI0_INT BIT(8)
+#define MACEPCI_SCSI1_INT BIT(9)
+#define MACEPCI_SLOT0_INT BIT(10)
+#define MACEPCI_SLOT1_INT BIT(11)
+#define MACEPCI_SLOT2_INT BIT(12)
+#define MACEPCI_SHARED0_INT BIT(13)
+#define MACEPCI_SHARED1_INT BIT(14)
+#define MACEPCI_SHARED2_INT BIT(15)
+#define CRIME_GBE0_INT BIT(16)
+#define CRIME_GBE1_INT BIT(17)
+#define CRIME_GBE2_INT BIT(18)
+#define CRIME_GBE3_INT BIT(19)
+#define CRIME_CPUERR_INT BIT(20)
+#define CRIME_MEMERR_INT BIT(21)
+#define CRIME_RE_EMPTY_E_INT BIT(22)
+#define CRIME_RE_FULL_E_INT BIT(23)
+#define CRIME_RE_IDLE_E_INT BIT(24)
+#define CRIME_RE_EMPTY_L_INT BIT(25)
+#define CRIME_RE_FULL_L_INT BIT(26)
+#define CRIME_RE_IDLE_L_INT BIT(27)
+#define CRIME_SOFT0_INT BIT(28)
+#define CRIME_SOFT1_INT BIT(29)
+#define CRIME_SOFT2_INT BIT(30)
#define CRIME_SYSCORERR_INT CRIME_SOFT2_INT
-#define CRIME_VICE_INT BIT (31)
-
+#define CRIME_VICE_INT BIT(31)
/* Masks for deciding who handles the interrupt */
#define CRIME_MACE_INT_MASK 0x8f
#define CRIME_MACEISA_INT_MASK 0x70
#define CRIME_MACEPCI_INT_MASK 0xff00
#define CRIME_CRIME_INT_MASK 0xffff0000
-#define CRIME_DOG 0x030
-#define CRIME_DOG_MASK 0x001fffff
-
-/* CRIME_DOG register bits */
+ volatile unsigned long watchdog;
#define CRIME_DOG_POWER_ON_RESET 0x00010000
#define CRIME_DOG_WARM_RESET 0x00080000
#define CRIME_DOG_TIMEOUT (CRIME_DOG_POWER_ON_RESET|CRIME_DOG_WARM_RESET)
#define CRIME_DOG_VALUE 0x00007fff
-#define CRIME_TIMER 0x038
-#define CRIME_TIMER_MASK 0x0000ffffffffffff
-
+ volatile unsigned long timer;
#define CRIME_MASTER_FREQ 66666500 /* Crime upcounter frequency */
#define CRIME_NS_PER_TICK 15 /* for delay_calibrate */
-#define CRIME_CPU_ERROR_ADDR 0x040
+ volatile unsigned long cpu_error_addr;
#define CRIME_CPU_ERROR_ADDR_MASK 0x3ffffffff
-#define CRIME_CPU_ERROR_STAT 0x048
-/* REV_PETTY only! */
-#define CRIME_CPU_ERROR_ENA 0x050
-
-/*
- * bit definitions for CRIME/VICE error status and enable registers
- */
-#define CRIME_CPU_ERROR_MASK 0x7 /* cpu error stat is 3 bits */
-#define CRIME_CPU_ERROR_CPU_ILL_ADDR 0x4
-#define CRIME_CPU_ERROR_VICE_WRT_PRTY 0x2
-#define CRIME_CPU_ERROR_CPU_WRT_PRTY 0x1
+ volatile unsigned long cpu_error_stat;
+#define CRIME_CPU_ERROR_MASK 0x7 /* cpu error stat is 3 bits */
+#define CRIME_CPU_ERROR_CPU_ILL_ADDR 0x4
+#define CRIME_CPU_ERROR_VICE_WRT_PRTY 0x2
+#define CRIME_CPU_ERROR_CPU_WRT_PRTY 0x1
-/*
- * these are the definitions for the error status/enable register in
- * petty crime. Note that the enable register does not exist in crime
- * rev 1 and above.
- */
-#define CRIME_CPU_ERROR_MASK_REV0 0x3ff /* cpu error stat is 9 bits */
-#define CRIME_CPU_ERROR_CPU_INV_ADDR_RD 0x200
-#define CRIME_CPU_ERROR_VICE_II 0x100
-#define CRIME_CPU_ERROR_VICE_SYSAD 0x80
-#define CRIME_CPU_ERROR_VICE_SYSCMD 0x40
-#define CRIME_CPU_ERROR_VICE_INV_ADDR 0x20
-#define CRIME_CPU_ERROR_CPU_II 0x10
-#define CRIME_CPU_ERROR_CPU_SYSAD 0x8
-#define CRIME_CPU_ERROR_CPU_SYSCMD 0x4
-#define CRIME_CPU_ERROR_CPU_INV_ADDR_WR 0x2
-#define CRIME_CPU_ERROR_CPU_INV_REG_ADDR 0x1
-
-#define CRIME_VICE_ERROR_ADDR 0x058
-#define CRIME_VICE_ERROR_ADDR_MASK 0x3fffffff
-
-#define CRIME_MEM_CONTROL 0x200
-#define CRIME_MEM_CONTROL_MASK 0x3 /* 25 cent register */
-#define CRIME_MEM_CONTROL_ECC_ENA 0x1
-#define CRIME_MEM_CONTROL_USE_ECC_REPL 0x2
+ unsigned long _pad0[54];
-/*
- * macros for CRIME memory bank control registers.
- */
-#define CRIME_MEM_BANK_CONTROL(__bank) (0x208 + ((__bank) << 3))
-#define CRIME_MEM_BANK_CONTROL_MASK 0x11f /* 9 bits 7:5 reserved */
+ volatile unsigned long mc_ctrl;
+ volatile unsigned long bank_ctrl[8];
+#define CRIME_MEM_BANK_CONTROL_MASK 0x11f /* 9 bits 7:5 reserved */
#define CRIME_MEM_BANK_CONTROL_ADDR 0x01f
#define CRIME_MEM_BANK_CONTROL_SDRAM_SIZE 0x100
#define CRIME_MAXBANKS 8
-#define CRIME_MEM_REFRESH_COUNTER 0x248
-#define CRIME_MEM_REFRESH_COUNTER_MASK 0x7ff
+ volatile unsigned long mem_ref_counter;
+#define CRIME_MEM_REF_COUNTER_MASK 0x3ff /* 10bit */
-/*
- * CRIME Memory error status register bit definitions
- */
-#define CRIME_MEM_ERROR_STAT 0x250
-#define CRIME_MEM_ERROR_STAT_MASK 0x0ff7ffff /* 28-bit register */
+ volatile unsigned long mem_error_stat;
+#define CRIME_MEM_ERROR_STAT_MASK 0x0ff7ffff /* 28-bit register */
#define CRIME_MEM_ERROR_MACE_ID 0x0000007f
#define CRIME_MEM_ERROR_MACE_ACCESS 0x00000080
#define CRIME_MEM_ERROR_RE_ID 0x00007f00
#define CRIME_MEM_ERROR_INV 0x0e000000
#define CRIME_MEM_ERROR_INV_MEM_ADDR_RD 0x02000000
#define CRIME_MEM_ERROR_INV_MEM_ADDR_WR 0x04000000
-#define CRIME_MEM_ERROR_INV_MEM_ADDR_RMW 0x08000000
+#define CRIME_MEM_ERROR_INV_MEM_ADDR_RMW 0x08000000
-#define CRIME_MEM_ERROR_ADDR 0x258
+ volatile unsigned long mem_error_addr;
#define CRIME_MEM_ERROR_ADDR_MASK 0x3fffffff
-#define CRIME_MEM_ERROR_ECC_SYN 0x260
+ volatile unsigned long mem_ecc_syn;
#define CRIME_MEM_ERROR_ECC_SYN_MASK 0xffffffff
-#define CRIME_MEM_ERROR_ECC_CHK 0x268
-#define CRIME_MEM_ERROR_ECC_CHK_MASK 0xffffffff
+ volatile unsigned long mem_ecc_chk;
+#define CRIME_MEM_ERROR_ECC_CHK_MASK 0xffffffff
-#define CRIME_MEM_ERROR_ECC_REPL 0x270
+ volatile unsigned long mem_ecc_repl;
#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff
+};
+
+extern struct sgi_crime *crime;
#endif /* __ASM_CRIME_H__ */
#ifndef __ASM_MACE_H__
#define __ASM_MACE_H__
-#include <linux/config.h>
-#include <asm/io.h>
-
/*
* Address map
*/
#define MACE_BASE 0x1f000000 /* physical */
#undef BIT
-#define BIT(x) (1ULL << (x))
-
-#ifdef CONFIG_MIPS32
-typedef struct {
- volatile unsigned long long reg;
-} mace64_t;
-
-typedef struct {
- unsigned long pad;
- volatile unsigned long reg;
-} mace32_t;
-#endif
-#ifdef CONFIG_MIPS64
-typedef struct {
- volatile unsigned long reg;
-} mace64_t;
-
-typedef struct {
- volatile unsigned long reg;
-} mace32_t;
-#endif
-
-#define mace_read(r) \
- (sizeof(r.reg) == 4 ? readl(&r.reg) : readq(&r.reg))
-#define mace_write(v,r) \
- (sizeof(r.reg) == 4 ? writel(v,&r.reg) : writeq(v,&r.reg))
+#define BIT(x) (1UL << (x))
/*
* PCI interface
* Video interface
*/
struct mace_video {
- mace32_t xxx; /* later... */
+ unsigned long xxx; /* later... */
};
/*
* Ethernet interface
*/
struct mace_ethernet {
- mace32_t mac_ctrl;
- mace32_t int_stat;
- mace32_t dma_ctrl;
- mace32_t timer;
- mace32_t tx_int_al;
- mace32_t rx_int_al;
- mace32_t tx_info;
- mace32_t tx_info_al;
- mace32_t rx_buff;
- mace32_t rx_buff_al1;
- mace32_t rx_buff_al2;
- mace64_t diag;
- mace32_t phy_data;
- mace32_t phy_regs;
- mace32_t phy_trans_go;
- mace32_t backoff_seed;
+ volatile unsigned long mac_ctrl;
+ volatile unsigned long int_stat;
+ volatile unsigned long dma_ctrl;
+ volatile unsigned long timer;
+ volatile unsigned long tx_int_al;
+ volatile unsigned long rx_int_al;
+ volatile unsigned long tx_info;
+ volatile unsigned long tx_info_al;
+ volatile unsigned long rx_buff;
+ volatile unsigned long rx_buff_al1;
+ volatile unsigned long rx_buff_al2;
+ volatile unsigned long diag;
+ volatile unsigned long phy_data;
+ volatile unsigned long phy_regs;
+ volatile unsigned long phy_trans_go;
+ volatile unsigned long backoff_seed;
/*===================================*/
- mace64_t imq_reserved[4];
- mace64_t mac_addr;
- mace64_t mac_addr2;
- mace64_t mcast_filter;
- mace32_t tx_ring_base;
+ volatile unsigned long imq_reserved[4];
+ volatile unsigned long mac_addr;
+ volatile unsigned long mac_addr2;
+ volatile unsigned long mcast_filter;
+ volatile unsigned long tx_ring_base;
/* Following are read-only registers for debugging */
- mace64_t tx_pkt1_hdr;
- mace64_t tx_pkt1_ptr[3];
- mace64_t tx_pkt2_hdr;
- mace64_t tx_pkt2_ptr[3];
+ volatile unsigned long tx_pkt1_hdr;
+ volatile unsigned long tx_pkt1_ptr[3];
+ volatile unsigned long tx_pkt2_hdr;
+ volatile unsigned long tx_pkt2_ptr[3];
/*===================================*/
- mace32_t rx_fifo;
+ volatile unsigned long rx_fifo;
};
-#define mace_eth_read(r) \
- mace_read(mace->eth.r)
-#define mace_eth_write(v,r) \
- mace_write(v,mace->eth.r)
-
/*
* Peripherals
/* Audio registers */
struct mace_audio {
- mace32_t control;
- mace32_t codec_control; /* codec status control */
- mace32_t codec_mask; /* codec status input mask */
- mace32_t codec_read; /* codec status read data */
+ volatile unsigned long control;
+ volatile unsigned long codec_control; /* codec status control */
+ volatile unsigned long codec_mask; /* codec status input mask */
+ volatile unsigned long codec_read; /* codec status read data */
struct {
- mace32_t control; /* channel control */
- mace32_t read_ptr; /* channel read pointer */
- mace32_t write_ptr; /* channel write pointer */
- mace32_t depth; /* channel depth */
- } channel[3];
+ volatile unsigned long control; /* channel control */
+ volatile unsigned long read_ptr; /* channel read pointer */
+ volatile unsigned long write_ptr; /* channel write pointer */
+ volatile unsigned long depth; /* channel depth */
+ } chan[3];
};
-#define mace_perif_audio_read(r) \
- mace_read(mace->perif.audio.r)
-#define mace_perif_audio_write(v,r) \
- mace_write(v,mace->perif.audio.r)
/* ISA Control and DMA registers */
struct mace_isactrl {
- mace32_t ringbase;
+ volatile unsigned long ringbase;
#define MACEISA_RINGBUFFERS_SIZE (8 * 4096)
- mace32_t misc;
+ volatile unsigned long misc;
#define MACEISA_FLASH_WE BIT(0) /* 1=> Enable FLASH writes */
#define MACEISA_PWD_CLEAR BIT(1) /* 1=> PWD CLEAR jumper detected */
#define MACEISA_NIC_DEASSERT BIT(2)
#define MACEISA_LED_GREEN BIT(5) /* 0=> Illuminate green LED */
#define MACEISA_DP_RAM_ENABLE BIT(6)
- mace32_t istat;
- mace32_t imask;
+ volatile unsigned long istat;
+ volatile unsigned long imask;
#define MACEISA_AUDIO_SW_INT BIT(0)
#define MACEISA_AUDIO_SC_INT BIT(1)
#define MACEISA_AUDIO1_DMAT_INT BIT(2)
#define MACEISA_SERIAL2_RDMAT_INT BIT(30)
#define MACEISA_SERIAL2_RDMAOR_INT BIT(31)
- mace64_t _pad[0x2000/8 - 4];
+ volatile unsigned long _pad[0x2000/8 - 4];
- mace64_t dp_ram[0x400];
+ volatile unsigned long dp_ram[0x400];
};
-#define mace_perif_ctrl_read(r) \
- mace_read(mace->perif.ctrl.r)
-#define mace_perif_ctrl_write(v,r) \
- mace_write(v,mace->perif.ctrl.r)
/* Keyboard & Mouse registers
* -> drivers/input/serio/maceps2.c */
struct mace_ps2port {
- mace32_t tx;
- mace32_t rx;
- mace32_t control;
- mace32_t status;
+ volatile unsigned long tx;
+ volatile unsigned long rx;
+ volatile unsigned long control;
+ volatile unsigned long status;
};
struct mace_ps2 {
/* I2C registers
* -> drivers/i2c/algos/i2c-algo-sgi.c */
struct mace_i2c {
- mace32_t config;
+ volatile unsigned long config;
#define MACEI2C_RESET BIT(0)
#define MACEI2C_FAST BIT(1)
#define MACEI2C_DATA_OVERRIDE BIT(2)
#define MACEI2C_CLOCK_OVERRIDE BIT(3)
#define MACEI2C_DATA_STATUS BIT(4)
#define MACEI2C_CLOCK_STATUS BIT(5)
- mace32_t control;
- mace32_t data;
+ volatile unsigned long control;
+ volatile unsigned long data;
};
/* Timer registers */
typedef union {
- mace64_t ust_msc;
+ volatile unsigned long ust_msc;
struct reg {
volatile unsigned int ust;
volatile unsigned int msc;
} timer_reg;
struct mace_timers {
- mace32_t ust;
+ volatile unsigned long ust;
#define MACE_UST_PERIOD_NS 960
- mace32_t compare1;
- mace32_t compare2;
- mace32_t compare3;
+ volatile unsigned long compare1;
+ volatile unsigned long compare2;
+ volatile unsigned long compare3;
timer_reg audio_in;
timer_reg audio_out1;
/* Serial port */
struct mace_serial {
- mace64_t xxx; /* later... */
+ volatile unsigned long xxx; /* later... */
};
struct mace_isa {
#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
#endif
-extern void disable_irq(unsigned int);
-extern void disable_irq_nosync(unsigned int);
-extern void enable_irq(unsigned int);
-
struct pt_regs;
-extern asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs);
-extern void init_generic_irq(void);
+#ifdef CONFIG_PREEMPT
+
+extern asmlinkage unsigned int do_IRQ(unsigned int irq, struct pt_regs *regs);
+
+#else
+
+/*
+ * do_IRQ handles all normal device IRQ's (the special
+ * SMP cross-CPU interrupts have their own specific
+ * handlers).
+ *
+ * Ideally there should be away to get this into kernel/irq/handle.c to
+ * avoid the overhead of a call for just a tiny function ...
+ */
+#define do_IRQ(irq, regs) \
+do { \
+ irq_enter(); \
+ __do_IRQ((irq), (regs)); \
+ irq_exit(); \
+} while (0)
+
+#endif
+
+extern void arch_init_irq(void);
struct irqaction;
int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
unsigned char command;
} jazz_keyboard_hardware;
+#define jazz_kh ((keyboard_hardware *) JAZZ_KEYBOARD_ADDRESS)
+
typedef struct {
unsigned char pad0[3];
unsigned char data;
#define RTC_EXTENT 16
#define RTC_IRQ ATLASINT_RTC
-#if CONFIG_CPU_LITTLE_ENDIAN
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
#define ATLAS_RTC_PORT(x) (RTC_PORT(x) + 0)
#else
#define ATLAS_RTC_PORT(x) (RTC_PORT(x) + 3)
#endif
/* SDRAM Controller */
+#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
#define MEM_SDMODE0 0xB4000000
#define MEM_SDMODE1 0xB4000004
#define MEM_SDMODE2 0xB4000008
#define MEM_SDSLEEP 0xB4000030
#define MEM_SDSMCKE 0xB4000034
+#endif
/* Static Bus Controller */
#define MEM_STCFG0 0xB4001000
#define MEM_STTIME3 0xB4001034
#define MEM_STADDR3 0xB4001038
-#ifdef CONFIG_SOC_AU1550
+#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
#define MEM_STNDCTL 0xB4001100
#define MEM_STSTAT 0xB4001104
#define INTC_INT_HIGH_AND_LOW_LEVEL 0x7
/* Interrupt Numbers */
+/* Au1000 */
+#ifdef CONFIG_SOC_AU1000
#define AU1000_UART0_INT 0
#define AU1000_UART1_INT 1 /* au1000 */
#define AU1000_UART2_INT 2 /* au1000 */
-
-#define AU1000_PCI_INTA 1 /* au1500 */
-#define AU1000_PCI_INTB 2 /* au1500 */
-
#define AU1000_UART3_INT 3
-
#define AU1000_SSI0_INT 4 /* au1000 */
#define AU1000_SSI1_INT 5 /* au1000 */
-
-#define AU1000_PCI_INTC 4 /* au1500 */
-#define AU1000_PCI_INTD 5 /* au1500 */
-
#define AU1000_DMA_INT_BASE 6
#define AU1000_TOY_INT 14
#define AU1000_TOY_MATCH0_INT 15
#define AU1000_ACSYNC_INT 27
#define AU1000_MAC0_DMA_INT 28
#define AU1000_MAC1_DMA_INT 29
-#define AU1000_ETH0_IRQ AU1000_MAC0_DMA_INT
-#define AU1000_ETH1_IRQ AU1000_MAC1_DMA_INT
#define AU1000_I2S_UO_INT 30 /* au1000 */
#define AU1000_AC97C_INT 31
-#define AU1000_LAST_INTC0_INT AU1000_AC97C_INT
#define AU1000_GPIO_0 32
#define AU1000_GPIO_1 33
#define AU1000_GPIO_2 34
#define AU1000_GPIO_13 45
#define AU1000_GPIO_14 46
#define AU1000_GPIO_15 47
-
-/* Au1000 only */
#define AU1000_GPIO_16 48
#define AU1000_GPIO_17 49
#define AU1000_GPIO_18 50
#define AU1000_GPIO_30 62
#define AU1000_GPIO_31 63
-/* Au1500 only */
+#define UART0_ADDR 0xB1100000
+#define UART1_ADDR 0xB1200000
+#define UART2_ADDR 0xB1300000
+#define UART3_ADDR 0xB1400000
+
+#define USB_OHCI_BASE 0x10100000 // phys addr for ioremap
+#define USB_HOST_CONFIG 0xB017fffc
+
+#define AU1000_ETH0_BASE 0xB0500000
+#define AU1000_ETH1_BASE 0xB0510000
+#define AU1000_MAC0_ENABLE 0xB0520000
+#define AU1000_MAC1_ENABLE 0xB0520004
+#define NUM_ETH_INTERFACES 2
+#endif // CONFIG_SOC_AU1000
+
+/* Au1500 */
+#ifdef CONFIG_SOC_AU1500
+#define AU1500_UART0_INT 0
+#define AU1000_PCI_INTA 1 /* au1500 */
+#define AU1000_PCI_INTB 2 /* au1500 */
+#define AU1500_UART3_INT 3
+#define AU1000_PCI_INTC 4 /* au1500 */
+#define AU1000_PCI_INTD 5 /* au1500 */
+#define AU1000_DMA_INT_BASE 6
+#define AU1000_TOY_INT 14
+#define AU1000_TOY_MATCH0_INT 15
+#define AU1000_TOY_MATCH1_INT 16
+#define AU1000_TOY_MATCH2_INT 17
+#define AU1000_RTC_INT 18
+#define AU1000_RTC_MATCH0_INT 19
+#define AU1000_RTC_MATCH1_INT 20
+#define AU1000_RTC_MATCH2_INT 21
+#define AU1500_PCI_ERR_INT 22
+#define AU1000_USB_DEV_REQ_INT 24
+#define AU1000_USB_DEV_SUS_INT 25
+#define AU1000_USB_HOST_INT 26
+#define AU1000_ACSYNC_INT 27
+#define AU1500_MAC0_DMA_INT 28
+#define AU1500_MAC1_DMA_INT 29
+#define AU1000_AC97C_INT 31
+#define AU1000_GPIO_0 32
+#define AU1000_GPIO_1 33
+#define AU1000_GPIO_2 34
+#define AU1000_GPIO_3 35
+#define AU1000_GPIO_4 36
+#define AU1000_GPIO_5 37
+#define AU1000_GPIO_6 38
+#define AU1000_GPIO_7 39
+#define AU1000_GPIO_8 40
+#define AU1000_GPIO_9 41
+#define AU1000_GPIO_10 42
+#define AU1000_GPIO_11 43
+#define AU1000_GPIO_12 44
+#define AU1000_GPIO_13 45
+#define AU1000_GPIO_14 46
+#define AU1000_GPIO_15 47
#define AU1500_GPIO_200 48
#define AU1500_GPIO_201 49
#define AU1500_GPIO_202 50
#define AU1500_GPIO_207 62
#define AU1500_GPIO_208_215 63
-#define AU1000_MAX_INTR 63
+#define UART0_ADDR 0xB1100000
+#define UART3_ADDR 0xB1400000
-#define AU1100_SD 2
+#define USB_OHCI_BASE 0x10100000 // phys addr for ioremap
+#define USB_HOST_CONFIG 0xB017fffc
+
+#define AU1500_ETH0_BASE 0xB1500000
+#define AU1500_ETH1_BASE 0xB1510000
+#define AU1500_MAC0_ENABLE 0xB1520000
+#define AU1500_MAC1_ENABLE 0xB1520004
+#define NUM_ETH_INTERFACES 2
+#endif // CONFIG_SOC_AU1500
+
+/* Au1100 */
+#ifdef CONFIG_SOC_AU1100
+#define AU1100_UART0_INT 0
+#define AU1100_UART1_INT 1
+#define AU1100_SD_INT 2
+#define AU1100_UART3_INT 3
+#define AU1000_SSI0_INT 4
+#define AU1000_SSI1_INT 5
+#define AU1000_DMA_INT_BASE 6
+#define AU1000_TOY_INT 14
+#define AU1000_TOY_MATCH0_INT 15
+#define AU1000_TOY_MATCH1_INT 16
+#define AU1000_TOY_MATCH2_INT 17
+#define AU1000_RTC_INT 18
+#define AU1000_RTC_MATCH0_INT 19
+#define AU1000_RTC_MATCH1_INT 20
+#define AU1000_RTC_MATCH2_INT 21
+#define AU1000_IRDA_TX_INT 22
+#define AU1000_IRDA_RX_INT 23
+#define AU1000_USB_DEV_REQ_INT 24
+#define AU1000_USB_DEV_SUS_INT 25
+#define AU1000_USB_HOST_INT 26
+#define AU1000_ACSYNC_INT 27
+#define AU1100_MAC0_DMA_INT 28
#define AU1100_GPIO_208_215 29
-// Seperate defines for AU1550 SOC
-#define AU1550_UART0_INT AU1000_UART0_INT
-#define AU1550_PCI_INTA AU1000_PCI_INTA
-#define AU1550_PCI_INTB AU1000_PCI_INTB
+#define AU1100_LCD_INT 30
+#define AU1000_AC97C_INT 31
+#define AU1000_GPIO_0 32
+#define AU1000_GPIO_1 33
+#define AU1000_GPIO_2 34
+#define AU1000_GPIO_3 35
+#define AU1000_GPIO_4 36
+#define AU1000_GPIO_5 37
+#define AU1000_GPIO_6 38
+#define AU1000_GPIO_7 39
+#define AU1000_GPIO_8 40
+#define AU1000_GPIO_9 41
+#define AU1000_GPIO_10 42
+#define AU1000_GPIO_11 43
+#define AU1000_GPIO_12 44
+#define AU1000_GPIO_13 45
+#define AU1000_GPIO_14 46
+#define AU1000_GPIO_15 47
+
+#define UART0_ADDR 0xB1100000
+#define UART1_ADDR 0xB1200000
+#define UART3_ADDR 0xB1400000
+
+#define USB_OHCI_BASE 0x10100000 // phys addr for ioremap
+#define USB_HOST_CONFIG 0xB017fffc
+
+#define AU1100_ETH0_BASE 0xB0500000
+#define AU1100_MAC0_ENABLE 0xB0520000
+#define NUM_ETH_INTERFACES 1
+#endif // CONFIG_SOC_AU1100
+
+#ifdef CONFIG_SOC_AU1550
+#define AU1550_UART0_INT 0
+#define AU1550_PCI_INTA 1
+#define AU1550_PCI_INTB 2
#define AU1550_DDMA_INT 3
#define AU1550_CRYPTO_INT 4
#define AU1550_PCI_INTC 5
#define AU1550_USB_DEV_REQ_INT 24
#define AU1550_USB_DEV_SUS_INT 25
#define AU1550_USB_HOST_INT 26
+#define AU1000_USB_DEV_REQ_INT AU1550_USB_DEV_REQ_INT
+#define AU1000_USB_DEV_SUS_INT AU1550_USB_DEV_SUS_INT
+#define AU1000_USB_HOST_INT AU1550_USB_HOST_INT
#define AU1550_MAC0_DMA_INT 27
#define AU1550_MAC1_DMA_INT 28
-#define AU1550_ETH0_IRQ AU1550_MAC0_DMA_INT
-#define AU1550_ETH1_IRQ AU1550_MAC1_DMA_INT
-
+#define AU1000_GPIO_0 32
+#define AU1000_GPIO_1 33
+#define AU1000_GPIO_2 34
+#define AU1000_GPIO_3 35
+#define AU1000_GPIO_4 36
+#define AU1000_GPIO_5 37
+#define AU1000_GPIO_6 38
+#define AU1000_GPIO_7 39
+#define AU1000_GPIO_8 40
+#define AU1000_GPIO_9 41
+#define AU1000_GPIO_10 42
+#define AU1000_GPIO_11 43
+#define AU1000_GPIO_12 44
+#define AU1000_GPIO_13 45
+#define AU1000_GPIO_14 46
+#define AU1000_GPIO_15 47
#define AU1550_GPIO_200 48
#define AU1500_GPIO_201_205 49 // Logical or of GPIO201:205
#define AU1500_GPIO_16 50
#define AU1500_GPIO_207 62
#define AU1500_GPIO_208_218 63 // Logical or of GPIO208:218
-// REDEFINE SECONDARY GPIO BLOCK INTO IC1 CONTROLLER HERE
+#define UART0_ADDR 0xB1100000
+#define UART1_ADDR 0xB1200000
+#define UART3_ADDR 0xB1400000
+
+#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
+#define USB_HOST_CONFIG 0xB4027ffc
+
+#define AU1550_ETH0_BASE 0xB0500000
+#define AU1550_ETH1_BASE 0xB0510000
+#define AU1550_MAC0_ENABLE 0xB0520000
+#define AU1550_MAC1_ENABLE 0xB0520004
+#define NUM_ETH_INTERFACES 2
+#endif // CONFIG_SOC_AU1550
+
+#ifdef CONFIG_SOC_AU1200
+#define AU1200_UART0_INT 0
+#define AU1200_SWT_INT 1
+#define AU1200_SD_INT 2
+#define AU1200_DDMA_INT 3
+#define AU1200_MAE_BE_INT 4
+#define AU1200_GPIO_200 5
+#define AU1200_GPIO_201 6
+#define AU1200_GPIO_202 7
+#define AU1200_UART1_INT 8
+#define AU1200_MAE_FE_INT 9
+#define AU1200_PSC0_INT 10
+#define AU1200_PSC1_INT 11
+#define AU1200_AES_INT 12
+#define AU1200_CAMERA_INT 13
+#define AU1200_TOY_INT 14
+#define AU1200_TOY_MATCH0_INT 15
+#define AU1200_TOY_MATCH1_INT 16
+#define AU1200_TOY_MATCH2_INT 17
+#define AU1200_RTC_INT 18
+#define AU1200_RTC_MATCH0_INT 19
+#define AU1200_RTC_MATCH1_INT 20
+#define AU1200_RTC_MATCH2_INT 21
+#define AU1200_NAND_INT 23
+#define AU1200_GPIO_204 24
+#define AU1200_GPIO_205 25
+#define AU1200_GPIO_206 26
+#define AU1200_GPIO_207 27
+#define AU1200_GPIO_208_215 28 // Logical OR of 208:215
+#define AU1200_USB_INT 29
+#define AU1200_LCD_INT 30
+#define AU1200_MAE_BOTH_INT 31
+#define AU1000_GPIO_0 32
+#define AU1000_GPIO_1 33
+#define AU1000_GPIO_2 34
+#define AU1000_GPIO_3 35
+#define AU1000_GPIO_4 36
+#define AU1000_GPIO_5 37
+#define AU1000_GPIO_6 38
+#define AU1000_GPIO_7 39
+#define AU1000_GPIO_8 40
+#define AU1000_GPIO_9 41
+#define AU1000_GPIO_10 42
+#define AU1000_GPIO_11 43
+#define AU1000_GPIO_12 44
+#define AU1000_GPIO_13 45
+#define AU1000_GPIO_14 46
+#define AU1000_GPIO_15 47
+#define AU1000_GPIO_16 48
+#define AU1000_GPIO_17 49
+#define AU1000_GPIO_18 50
+#define AU1000_GPIO_19 51
+#define AU1000_GPIO_20 52
+#define AU1000_GPIO_21 53
+#define AU1000_GPIO_22 54
+#define AU1000_GPIO_23 55
+#define AU1000_GPIO_24 56
+#define AU1000_GPIO_25 57
+#define AU1000_GPIO_26 58
+#define AU1000_GPIO_27 59
+#define AU1000_GPIO_28 60
+#define AU1000_GPIO_29 61
+#define AU1000_GPIO_30 62
+#define AU1000_GPIO_31 63
+
+#define UART0_ADDR 0xB1100000
+#define UART1_ADDR 0xB1200000
+
+#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
+#define USB_HOST_CONFIG 0xB4027ffc
+
+// these are here for prototyping on au1550 (do not exist on au1200)
+#define AU1200_ETH0_BASE 0xB0500000
+#define AU1200_ETH1_BASE 0xB0510000
+#define AU1200_MAC0_ENABLE 0xB0520000
+#define AU1200_MAC1_ENABLE 0xB0520004
+#define NUM_ETH_INTERFACES 2
+#endif // CONFIG_SOC_AU1200
+
+#define AU1000_LAST_INTC0_INT 31
+#define AU1000_MAX_INTR 63
/* Programmable Counters 0 and 1 */
#define I2S_CONTROL_CE (1<<0)
/* USB Host Controller */
-// We pass USB_OHCI_BASE to ioremap, so it needs to be a physical address
-#if defined( CONFIG_SOC_AU1550 )
-#define USB_OHCI_BASE 0x14020000
-#define USB_OHCI_LEN 0x00100000
-#define USB_HOST_CONFIG 0xB4027ffc
-#else
-#define USB_OHCI_BASE 0x10100000
#define USB_OHCI_LEN 0x00100000
-#define USB_HOST_CONFIG 0xB017fffc
-#endif
/* USB Device Controller */
#define USBD_EP0RD 0xB0200000
#define USBDEV_CE (1<<0)
/* Ethernet Controllers */
-#define AU1000_ETH0_BASE 0xB0500000
-#define AU1000_ETH1_BASE 0xB0510000
-#define AU1500_ETH0_BASE 0xB1500000
-#define AU1500_ETH1_BASE 0xB1510000
-#define AU1100_ETH0_BASE 0xB0500000
-#define AU1550_ETH0_BASE 0xB0500000
-#define AU1550_ETH1_BASE 0xB0510000
/* 4 byte offsets from AU1000_ETH_BASE */
#define MAC_CONTROL 0x0
#define MAC_VLAN2_TAG 0x24
/* Ethernet Controller Enable */
-#define AU1000_MAC0_ENABLE 0xB0520000
-#define AU1000_MAC1_ENABLE 0xB0520004
-#define AU1500_MAC0_ENABLE 0xB1520000
-#define AU1500_MAC1_ENABLE 0xB1520004
-#define AU1100_MAC0_ENABLE 0xB0520000
#define MAC_EN_CLOCK_ENABLE (1<<0)
#define MAC_EN_RESET0 (1<<1)
/* UARTS 0-3 */
-#define UART0_ADDR 0xB1100000
-#define UART1_ADDR 0xB1200000
-#define UART2_ADDR 0xB1300000
-#define UART3_ADDR 0xB1400000
#define UART_BASE UART0_ADDR
#define UART_DEBUG_BASE UART3_ADDR
#define SYS_PF_PSC1_S1 (1 << 1)
#define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2))
-
#define SYS_TRIOUTRD 0xB1900100
#define SYS_TRIOUTCLR 0xB1900100
#define SYS_OUTPUTRD 0xB1900108
* addresses. For PCI IO, it's simpler because we get to do the ioremap
* ourselves and then adjust the device's resources.
*/
-#define Au1500_EXT_CFG 0x600000000
-#define Au1500_EXT_CFG_TYPE1 0x680000000
-#define Au1500_PCI_IO_START 0x500000000
-#define Au1500_PCI_IO_END 0x5000FFFFF
-#define Au1500_PCI_MEM_START 0x440000000
-#define Au1500_PCI_MEM_END 0x44FFFFFFF
+#define Au1500_EXT_CFG 0x600000000ULL
+#define Au1500_EXT_CFG_TYPE1 0x680000000ULL
+#define Au1500_PCI_IO_START 0x500000000ULL
+#define Au1500_PCI_IO_END 0x5000FFFFFULL
+#define Au1500_PCI_MEM_START 0x440000000ULL
+#define Au1500_PCI_MEM_END 0x44FFFFFFFULL
#define PCI_IO_START (Au1500_PCI_IO_START + 0x1000)
#define PCI_IO_END (Au1500_PCI_IO_END)
#define PCI_FIRST_DEVFN (0<<3)
#define PCI_LAST_DEVFN (19<<3)
-#define IOPORT_RESOURCE_START 0x00001000 /* skip the legacy ide probing */
+#define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */
#define IOPORT_RESOURCE_END 0xffffffff
#define IOMEM_RESOURCE_START 0x10000000
#define IOMEM_RESOURCE_END 0xffffffff
#endif
-#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
-#define NUM_ETH_INTERFACES 2
-#elif defined(CONFIG_SOC_AU1100)
-#define NUM_ETH_INTERFACES 1
-#endif
/* Processor information base on prid.
* Copied from PowerPC.
*/
unsigned int prid_value;
char *cpu_name;
- unsigned int cpu_od; /* Set Config[OD] */
- unsigned int cpu_bclk; /* Enable BCLK switching */
+ unsigned char cpu_od; /* Set Config[OD] */
+ unsigned char cpu_bclk; /* Enable BCLK switching */
};
extern struct cpu_spec cpu_specs[];
extern struct cpu_spec *cur_cpu_spec[];
-
#endif
#ifdef CONFIG_MIPS_DB1550
#define BCSR_KSEG1_ADDR 0xAF000000
+#define NAND_PHYS_ADDR 0x20000000
#else
#define BCSR_KSEG1_ADDR 0xAE000000
#endif
#define SET_VCC_VPP(VCC, VPP, SLOT)\
((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
-/* MTD CONFIG OPTIONS */
-#if defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
-#define DB1X00_BOTH_BANKS
-#elif defined(CONFIG_MTD_DB1X00_BOOT) && !defined(CONFIG_MTD_DB1X00_USER)
-#define DB1X00_BOOT_ONLY
-#elif !defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
-#define DB1X00_USER_ONLY
-#endif
-
/* SD controller macros */
/*
* Detect card.
} \
} while (0)
+
+/* NAND defines */
+/* Timing values as described in databook, * ns value stripped of
+ * lower 2 bits.
+ * These defines are here rather than an SOC1550 generic file because
+ * the parts chosen on another board may be different and may require
+ * different timings.
+ */
+#define NAND_T_H (18 >> 2)
+#define NAND_T_PUL (30 >> 2)
+#define NAND_T_SU (30 >> 2)
+#define NAND_T_WH (30 >> 2)
+
+/* Bitfield shift amounts */
+#define NAND_T_H_SHIFT 0
+#define NAND_T_PUL_SHIFT 4
+#define NAND_T_SU_SHIFT 8
+#define NAND_T_WH_SHIFT 12
+
+#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
+ ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
+ ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
+ ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
+
#endif /* __ASM_DB1X00_H */
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/sched.h>
-#include <linux/kernel.h>
#include <linux/linkage.h>
#include <linux/types.h>
#include <linux/mm.h>
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * IDE routines for typical pc-like legacy IDE configurations.
+ * Copyright (C) 1994-1996 Linus Torvalds & authors
*
- * Copyright (C) 1998, 1999, 2001, 2003 by Ralf Baechle
+ * Copied from i386; many of the especially older MIPS or ISA-based platforms
+ * are basically identical. Using this file probably implies i8259 PIC
+ * support in a system but the very least interrupt numbers 0 - 15 need to
+ * be put aside for legacy devices.
*/
#ifndef __ASM_MACH_GENERIC_IDE_H
#define __ASM_MACH_GENERIC_IDE_H
+#ifdef __KERNEL__
+
#include <linux/config.h>
#ifndef MAX_HWIFS
#define IDE_ARCH_OBSOLETE_DEFAULTS
-static inline int ide_default_irq(unsigned long base)
+static __inline__ int ide_default_irq(unsigned long base)
{
switch (base) {
case 0x1f0: return 14;
}
}
-static inline unsigned long ide_default_io_base(int index)
+static __inline__ unsigned long ide_default_io_base(int index)
{
switch (index) {
- case 0: return 0x1f0;
- case 1: return 0x170;
+ case 0: return 0x1f0;
+ case 1: return 0x170;
case 2: return 0x1e8;
case 3: return 0x168;
case 4: return 0x1e0;
#define ide_init_default_irq(base) ide_default_irq(base)
#endif
+#include <asm-generic/ide_iops.h>
+
+#endif /* __KERNEL__ */
+
#endif /* __ASM_MACH_GENERIC_IDE_H */
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2003 Ralf Baechle
+ * Copyright (C) 2003, 2004 Ralf Baechle
*/
#ifndef __ASM_MACH_GENERIC_MANGLE_PORT_H
#define __ASM_MACH_GENERIC_MANGLE_PORT_H
#define __swizzle_addr_b(port) (port)
#define __swizzle_addr_w(port) (port)
#define __swizzle_addr_l(port) (port)
+#define __swizzle_addr_q(port) (port)
#endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */
* Copyright (C) 2000, 2002 Maciej W. Rozycki
* Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
*/
-#ifndef _ASM_MACH_SPACES_H
-#define _ASM_MACH_SPACES_H
+#ifndef _ASM_MACH_GENERIC_SPACES_H
+#define _ASM_MACH_GENERIC_SPACES_H
#include <linux/config.h>
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
+ * Copyright (C) 2000, 2002 Maciej W. Rozycki
+ * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_MACH_IP22_SPACES_H
+#define _ASM_MACH_IP22_SPACES_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_MIPS32
+
+#define CAC_BASE 0x80000000
+#define IO_BASE 0xa0000000
+#define UNCAC_BASE 0xa0000000
+#define MAP_BASE 0xc0000000
+
+/*
+ * This handles the memory map.
+ * We handle pages at KSEG0 for kernels with 32 bit address space.
+ */
+#define PAGE_OFFSET 0x80000000UL
+
+/*
+ * Memory above this physical address will be considered highmem.
+ */
+#ifndef HIGHMEM_START
+#define HIGHMEM_START 0x20000000UL
+#endif
+
+#endif /* CONFIG_MIPS32 */
+
+#ifdef CONFIG_MIPS64
+#define PAGE_OFFSET 0xffffffff80000000UL
+
+#ifndef HIGHMEM_START
+#define HIGHMEM_START (1UL << 59UL)
+#endif
+
+#define CAC_BASE 0xffffffff80000000
+#define IO_BASE 0xffffffffa0000000
+#define UNCAC_BASE 0xffffffffa0000000
+#define MAP_BASE 0xffffffffc0000000
+
+#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
+#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
+#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
+
+#endif /* CONFIG_MIPS64 */
+
+#endif /* __ASM_MACH_IP22_SPACES_H */
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 2003 Ralf Baechle
+ * Copyright (C) 2003, 2004 Ralf Baechle
*/
#ifndef __ASM_MACH_IP27_MANGLE_PORT_H
#define __ASM_MACH_IP27_MANGLE_PORT_H
#define __swizzle_addr_b(port) (port)
#define __swizzle_addr_w(port) ((port) ^ 2)
#define __swizzle_addr_l(port) (port)
+#define __swizzle_addr_q(port) (port)
#endif /* __ASM_MACH_IP27_MANGLE_PORT_H */
#include <asm/sn/addrs.h>
#include <asm/sn/arch.h>
+#include <asm/sn/hub.h>
#define pa_to_nid(addr) NASID_TO_COMPACT_NODEID(NASID_GET(addr))
+#define LEVELS_PER_SLICE 128
+
+struct slice_data {
+ unsigned long irq_alloc_mask[2];
+ unsigned long irq_enable_mask[2];
+ int level_to_irq[LEVELS_PER_SLICE];
+};
+
+struct hub_data {
+ kern_vars_t kern_vars;
+ DECLARE_BITMAP(h_bigwin_used, HUB_NUM_BIG_WINDOW);
+ cpumask_t h_cpus;
+ unsigned long slice_map;
+ struct slice_data slice[2];
+};
+
+struct node_data {
+ struct pglist_data pglist;
+ struct hub_data hub;
+};
+
+extern struct node_data *__node_data[];
+
+#define NODE_DATA(n) (&__node_data[(n)]->pglist)
+#define hub_data(n) (&__node_data[(n)]->hub)
+
#endif /* _ASM_MACH_MMZONE_H */
* Copyright (C) 2000, 2002 Maciej W. Rozycki
* Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
*/
-#ifndef _ASM_MACH_SPACES_H
-#define _ASM_MACH_SPACES_H
+#ifndef _ASM_MACH_IP27_SPACES_H
+#define _ASM_MACH_IP27_SPACES_H
/*
* IP27 uses the R10000's uncached attribute feature. Attribute 3 selects
#define HIGHMEM_START (~0UL)
-#endif /* _ASM_MACH_SPACES_H */
+#endif /* _ASM_MACH_IP27_SPACES_H */
#ifndef _ASM_MACH_TOPOLOGY_H
#define _ASM_MACH_TOPOLOGY_H 1
+#include <asm/sn/arch.h>
#include <asm/sn/hub.h>
+#include <asm/mmzone.h>
#define cpu_to_node(cpu) (cpu_data[(cpu)].p_nodeid)
#define parent_node(node) (node)
-#define node_to_cpumask(node) (HUB_DATA(node)->h_cpus)
+#define node_to_cpumask(node) (hub_data(node)->h_cpus)
#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node)))
#define pcibus_to_cpumask(bus) (cpu_online_map)
-extern int node_distance(nasid_t nasid_a, nasid_t nasid_b);
-#define node_distance(from, to) node_distance(from, to)
+extern unsigned char __node_distances[MAX_COMPACT_NODES][MAX_COMPACT_NODES];
+
+#define node_distance(from, to) (__node_distances[(from)][(to)])
+
+/* sched_domains SD_NODE_INIT for SGI IP27 machines */
+#define SD_NODE_INIT (struct sched_domain) { \
+ .span = CPU_MASK_NONE, \
+ .parent = NULL, \
+ .groups = NULL, \
+ .min_interval = 8, \
+ .max_interval = 32, \
+ .busy_factor = 32, \
+ .imbalance_pct = 125, \
+ .cache_hot_time = (10*1000), \
+ .cache_nice_tries = 1, \
+ .per_cpu_gain = 100, \
+ .flags = SD_LOAD_BALANCE \
+ | SD_BALANCE_EXEC \
+ | SD_WAKE_BALANCE, \
+ .last_balance = jiffies, \
+ .balance_interval = 1, \
+ .nr_balance_failed = 0, \
+}
#endif /* _ASM_MACH_TOPOLOGY_H */
* for more details.
*
* Copyright (C) 2003 Ladislav Michl
+ * Copyright (C) 2004 Ralf Baechle
*/
#ifndef __ASM_MACH_IP32_MANGLE_PORT_H
#define __ASM_MACH_IP32_MANGLE_PORT_H
#define __swizzle_addr_b(port) ((port) ^ 3)
#define __swizzle_addr_w(port) ((port) ^ 2)
#define __swizzle_addr_l(port) (port)
+#define __swizzle_addr_q(port) (port)
#endif /* __ASM_MACH_IP32_MANGLE_PORT_H */
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
+ * Copyright (C) 2000, 2002 Maciej W. Rozycki
+ * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_MACH_IP32_SPACES_H
+#define _ASM_MACH_IP32_SPACES_H
+
+#include <linux/config.h>
+
+/*
+ * This handles the memory map.
+ */
+#define PAGE_OFFSET 0xffffffff80000000
+
+/*
+ * Memory above this physical address will be considered highmem.
+ * Fixme: 59 bits is a fictive number and makes assumptions about processors
+ * in the distant future. Nobody will care for a few years :-)
+ */
+#ifndef HIGHMEM_START
+#define HIGHMEM_START (1UL << 59UL)
+#endif
+
+#ifdef CONFIG_DMA_NONCOHERENT
+#define CAC_BASE 0x9800000000000000
+#else
+#define CAC_BASE 0xa800000000000000
+#endif
+#define IO_BASE 0x9000000000000000
+#define UNCAC_BASE 0x9000000000000000
+#define MAP_BASE 0xc000000000000000
+
+#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK))
+#define TO_CAC(x) (CAC_BASE | ((x) & TO_PHYS_MASK))
+#define TO_UNCAC(x) (UNCAC_BASE | ((x) & TO_PHYS_MASK))
+
+#endif /* __ASM_MACH_IP32_SPACES_H */
#define cpu_icache_line_size() 32
#define cpu_scache_line_size() 32
+/*
+ * On the RM9000 we need to ensure that I-cache lines being fetches only
+ * contain valid instructions are funny things will happen.
+ */
+#define PLAT_TRAMPOLINE_STUFF_LINE 32UL
+
#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003, 2004 Chris Dearman
+ */
+#ifndef __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * CPU feature overrides for MIPS boards
+ */
+#ifdef CONFIG_CPU_MIPS32
+#define cpu_has_tlb 1
+#define cpu_has_4kex 1
+#define cpu_has_4ktlb 1
+/* #define cpu_has_fpu ? */
+/* #define cpu_has_32fpr ? */
+#define cpu_has_counter 1
+/* #define cpu_has_watch ? */
+#define cpu_has_divec 1
+#define cpu_has_vce 0
+/* #define cpu_has_cache_cdex_p ? */
+/* #define cpu_has_cache_cdex_s ? */
+/* #define cpu_has_prefetch ? */
+#define cpu_has_mcheck 1
+/* #define cpu_has_ejtag ? */
+#define cpu_has_llsc 1
+/* #define cpu_has_vtag_icache ? */
+/* #define cpu_has_dc_aliases ? */
+/* #define cpu_has_ic_fills_f_dc ? */
+#define cpu_has_nofpuex 0
+/* #define cpu_has_64bits ? */
+/* #define cpu_has_64bit_zero_reg ? */
+/* #define cpu_has_subset_pcaches ? */
+#endif
+
+#ifdef CONFIG_CPU_MIPS64
+#define cpu_has_tlb 1
+#define cpu_has_4kex 1
+#define cpu_has_4ktlb 1
+/* #define cpu_has_fpu ? */
+/* #define cpu_has_32fpr ? */
+#define cpu_has_counter 1
+/* #define cpu_has_watch ? */
+#define cpu_has_divec 1
+#define cpu_has_vce 0
+/* #define cpu_has_cache_cdex_p ? */
+/* #define cpu_has_cache_cdex_s ? */
+/* #define cpu_has_prefetch ? */
+#define cpu_has_mcheck 1
+/* #define cpu_has_ejtag ? */
+#define cpu_has_llsc 1
+/* #define cpu_has_vtag_icache ? */
+/* #define cpu_has_dc_aliases ? */
+/* #define cpu_has_ic_fills_f_dc ? */
+#define cpu_has_nofpuex 0
+/* #define cpu_has_64bits ? */
+/* #define cpu_has_64bit_zero_reg ? */
+/* #define cpu_has_subset_pcaches ? */
+#endif
+
+#endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ * Copyright (C) 2004 Ralf Baechle
+ */
+#ifndef __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * Momentum Ocelot-3 is based on Rm7900 processor which
+ * is based on the E9000 core.
+ */
+#define cpu_has_watch 1
+#define cpu_has_mips16 0
+#define cpu_has_divec 0
+#define cpu_has_vce 0
+#define cpu_has_cache_cdex_p 0
+#define cpu_has_cache_cdex_s 0
+#define cpu_has_prefetch 1
+#define cpu_has_mcheck 0
+#define cpu_has_ejtag 0
+
+#define cpu_has_llsc 1
+#define cpu_has_vtag_icache 0
+#define cpu_has_dc_aliases 0
+#define cpu_has_ic_fills_f_dc 0
+
+#define cpu_has_nofpuex 0
+#define cpu_has_64bits 1
+
+#define cpu_has_subset_pcaches 0
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+#define cpu_scache_line_size() 32
+
+/*
+ * On the RM9000 we need to ensure that I-cache lines being fetches only
+ * contain valid instructions are funny things will happen.
+ */
+#define PLAT_TRAMPOLINE_STUFF_LINE 32UL
+
+#endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */
--- /dev/null
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ */
+#ifndef __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * Sibyte are MIPS64 processors weired to a specific configuration
+ */
+#define cpu_has_watch 1
+#define cpu_has_mips16 0
+#define cpu_has_divec 1
+#define cpu_has_vce 0
+#define cpu_has_cache_cdex_p 0
+#define cpu_has_cache_cdex_s 0
+#define cpu_has_prefetch 1
+#define cpu_has_mcheck 1
+#define cpu_has_ejtag 1
+
+#define cpu_has_llsc 1
+#define cpu_has_vtag_icache 1
+#define cpu_has_dc_aliases 0
+#define cpu_has_ic_fills_f_dc 0
+
+#define cpu_has_nofpuex 0
+#define cpu_has_64bits 1
+
+#define cpu_has_subset_pcaches 0
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+#define cpu_scache_line_size() 32
+
+#endif /* __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H */
#define cpu_icache_line_size() 32
#define cpu_scache_line_size() 32
+/*
+ * On the RM9000 we need to ensure that I-cache lines being fetches only
+ * contain valid instructions are funny things will happen.
+ */
+#define PLAT_TRAMPOLINE_STUFF_LINE 32UL
+
#endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */
#include <linux/pci.h>
#include <asm/byteorder.h>
-#include <asm/pci_channel.h>
extern unsigned long marvell_base;
#define ST0_DE 0x00010000
#define ST0_CE 0x00020000
+/*
+ * Setting c0_status.co enables Hit_Writeback and Hit_Writeback_Invalidate
+ * cacheops in userspace. This bit exists only on RM7000 and RM9000
+ * processors.
+ */
+#define ST0_CO 0x08000000
+
/*
* Bitfields in the R[23]000 cp0 status register.
*/
* Mark current->active_mm as not "active" anymore.
* We don't want to mislead possible IPI tlb flush routines.
*/
- clear_bit(cpu, &prev->cpu_vm_mask);
- set_bit(cpu, &next->cpu_vm_mask);
+ cpu_clear(cpu, prev->cpu_vm_mask);
+ cpu_set(cpu, next->cpu_vm_mask);
local_irq_restore(flags);
}
TLBMISS_HANDLER_SETUP_PGD(next->pgd);
/* mark mmu ownership change */
- clear_bit(cpu, &prev->cpu_vm_mask);
- set_bit(cpu, &next->cpu_vm_mask);
+ cpu_clear(cpu, prev->cpu_vm_mask);
+ cpu_set(cpu, next->cpu_vm_mask);
local_irq_restore(flags);
}
local_irq_save(flags);
- if (test_bit(cpu, &mm->cpu_vm_mask)) {
+ if (cpu_isset(cpu, mm->cpu_vm_mask)) {
get_new_mmu_context(mm, cpu);
write_c0_entryhi(cpu_asid(cpu, mm));
} else {
#include <asm/page.h>
#include <mmzone.h>
-extern struct pglist_data *node_data[];
-
-#define NODE_DATA(n) (node_data[(n)])
#define kvaddr_to_nid(kvaddr) pa_to_nid(__pa(kvaddr))
#define pfn_to_nid(pfn) pa_to_nid((pfn) << PAGE_SHIFT)
--- /dev/null
+/*
+ * PCI Register definitions for the MIPS System Controller.
+ *
+ * Copyright (C) 2004 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __ASM_MIPS_BOARDS_MSC01_IC_H
+#define __ASM_MIPS_BOARDS_MSC01_IC_H
+
+/*****************************************************************************
+ * Register offset addresses
+ *****************************************************************************/
+
+#define MSC01_IC_RST_OFS 0x00008 /* Software reset */
+#define MSC01_IC_ENAL_OFS 0x00100 /* Int_in enable mask 31:0 */
+#define MSC01_IC_ENAH_OFS 0x00108 /* Int_in enable mask 63:32 */
+#define MSC01_IC_DISL_OFS 0x00120 /* Int_in disable mask 31:0 */
+#define MSC01_IC_DISH_OFS 0x00128 /* Int_in disable mask 63:32 */
+#define MSC01_IC_ISBL_OFS 0x00140 /* Raw int_in 31:0 */
+#define MSC01_IC_ISBH_OFS 0x00148 /* Raw int_in 63:32 */
+#define MSC01_IC_ISAL_OFS 0x00160 /* Masked int_in 31:0 */
+#define MSC01_IC_ISAH_OFS 0x00168 /* Masked int_in 63:32 */
+#define MSC01_IC_LVL_OFS 0x00180 /* Disable priority int_out */
+#define MSC01_IC_RAMW_OFS 0x00180 /* Shadow set RAM (EI) */
+#define MSC01_IC_OSB_OFS 0x00188 /* Raw int_out */
+#define MSC01_IC_OSA_OFS 0x00190 /* Masked int_out */
+#define MSC01_IC_GENA_OFS 0x00198 /* Global HW int enable */
+#define MSC01_IC_BASE_OFS 0x001a0 /* Base address of IC_VEC */
+#define MSC01_IC_VEC_OFS 0x001b0 /* Active int's vector address */
+#define MSC01_IC_EOI_OFS 0x001c0 /* Enable lower level ints */
+#define MSC01_IC_CFG_OFS 0x001c8 /* Configuration register */
+#define MSC01_IC_TRLD_OFS 0x001d0 /* Interval timer reload val */
+#define MSC01_IC_TVAL_OFS 0x001e0 /* Interval timer current val */
+#define MSC01_IC_TCFG_OFS 0x001f0 /* Interval timer config */
+#define MSC01_IC_SUP_OFS 0x00200 /* Set up int_in line 0 */
+#define MSC01_IC_ENA_OFS 0x00800 /* Int_in enable mask 63:0 */
+#define MSC01_IC_DIS_OFS 0x00820 /* Int_in disable mask 63:0 */
+#define MSC01_IC_ISB_OFS 0x00840 /* Raw int_in 63:0 */
+#define MSC01_IC_ISA_OFS 0x00860 /* Masked int_in 63:0 */
+
+/*****************************************************************************
+ * Register field encodings
+ *****************************************************************************/
+
+#define MSC01_IC_RST_RST_SHF 0
+#define MSC01_IC_RST_RST_MSK 0x00000001
+#define MSC01_IC_RST_RST_BIT MSC01_IC_RST_RST_MSK
+#define MSC01_IC_LVL_LVL_SHF 0
+#define MSC01_IC_LVL_LVL_MSK 0x000000ff
+#define MSC01_IC_LVL_SPUR_SHF 16
+#define MSC01_IC_LVL_SPUR_MSK 0x00010000
+#define MSC01_IC_LVL_SPUR_BIT MSC01_IC_LVL_SPUR_MSK
+#define MSC01_IC_RAMW_RIPL_SHF 0
+#define MSC01_IC_RAMW_RIPL_MSK 0x0000003f
+#define MSC01_IC_RAMW_DATA_SHF 6
+#define MSC01_IC_RAMW_DATA_MSK 0x00000fc0
+#define MSC01_IC_RAMW_ADDR_SHF 25
+#define MSC01_IC_RAMW_ADDR_MSK 0x7e000000
+#define MSC01_IC_RAMW_READ_SHF 31
+#define MSC01_IC_RAMW_READ_MSK 0x80000000
+#define MSC01_IC_RAMW_READ_BIT MSC01_IC_RAMW_READ_MSK
+#define MSC01_IC_OSB_OSB_SHF 0
+#define MSC01_IC_OSB_OSB_MSK 0x000000ff
+#define MSC01_IC_OSA_OSA_SHF 0
+#define MSC01_IC_OSA_OSA_MSK 0x000000ff
+#define MSC01_IC_GENA_GENA_SHF 0
+#define MSC01_IC_GENA_GENA_MSK 0x00000001
+#define MSC01_IC_GENA_GENA_BIT MSC01_IC_GENA_GENA_MSK
+#define MSC01_IC_CFG_DIS_SHF 0
+#define MSC01_IC_CFG_DIS_MSK 0x00000001
+#define MSC01_IC_CFG_DIS_BIT MSC01_IC_CFG_DIS_MSK
+#define MSC01_IC_CFG_SHFT_SHF 8
+#define MSC01_IC_CFG_SHFT_MSK 0x00000f00
+#define MSC01_IC_TCFG_ENA_SHF 0
+#define MSC01_IC_TCFG_ENA_MSK 0x00000001
+#define MSC01_IC_TCFG_ENA_BIT MSC01_IC_TCFG_ENA_MSK
+#define MSC01_IC_TCFG_INT_SHF 8
+#define MSC01_IC_TCFG_INT_MSK 0x00000100
+#define MSC01_IC_TCFG_INT_BIT MSC01_IC_TCFG_INT_MSK
+#define MSC01_IC_TCFG_EDGE_SHF 16
+#define MSC01_IC_TCFG_EDGE_MSK 0x00010000
+#define MSC01_IC_TCFG_EDGE_BIT MSC01_IC_TCFG_EDGE_MSK
+#define MSC01_IC_SUP_PRI_SHF 0
+#define MSC01_IC_SUP_PRI_MSK 0x00000007
+#define MSC01_IC_SUP_EDGE_SHF 8
+#define MSC01_IC_SUP_EDGE_MSK 0x00000100
+#define MSC01_IC_SUP_EDGE_BIT MSC01_IC_SUP_EDGE_MSK
+#define MSC01_IC_SUP_STEP 8
+
+/*
+ * MIPS System controller interrupt register base.
+ *
+ * FIXME - are these macros specific to Malta and co or to the MSC? If the
+ * latter, they should be moved elsewhere.
+ */
+#define MIPS_MSC01_IC_REG_BASE 0x1bc40000
+
+/*****************************************************************************
+ * Absolute register addresses
+ *****************************************************************************/
+
+#define MSC01_IC_RST (MSC01_IC_REG_BASE + MSC01_IC_RST_OFS)
+#define MSC01_IC_ENAL (MSC01_IC_REG_BASE + MSC01_IC_ENAL_OFS)
+#define MSC01_IC_ENAH (MSC01_IC_REG_BASE + MSC01_IC_ENAH_OFS)
+#define MSC01_IC_DISL (MSC01_IC_REG_BASE + MSC01_IC_DISL_OFS)
+#define MSC01_IC_DISH (MSC01_IC_REG_BASE + MSC01_IC_DISH_OFS)
+#define MSC01_IC_ISBL (MSC01_IC_REG_BASE + MSC01_IC_ISBL_OFS)
+#define MSC01_IC_ISBH (MSC01_IC_REG_BASE + MSC01_IC_ISBH_OFS)
+#define MSC01_IC_ISAL (MSC01_IC_REG_BASE + MSC01_IC_ISAL_OFS)
+#define MSC01_IC_ISAH (MSC01_IC_REG_BASE + MSC01_IC_ISAH_OFS)
+#define MSC01_IC_LVL (MSC01_IC_REG_BASE + MSC01_IC_LVL_OFS)
+#define MSC01_IC_RAMW (MSC01_IC_REG_BASE + MSC01_IC_RAMW_OFS)
+#define MSC01_IC_OSB (MSC01_IC_REG_BASE + MSC01_IC_OSB_OFS)
+#define MSC01_IC_OSA (MSC01_IC_REG_BASE + MSC01_IC_OSA_OFS)
+#define MSC01_IC_GENA (MSC01_IC_REG_BASE + MSC01_IC_GENA_OFS)
+#define MSC01_IC_BASE (MSC01_IC_REG_BASE + MSC01_IC_BASE_OFS)
+#define MSC01_IC_VEC (MSC01_IC_REG_BASE + MSC01_IC_VEC_OFS)
+#define MSC01_IC_EOI (MSC01_IC_REG_BASE + MSC01_IC_EOI_OFS)
+#define MSC01_IC_CFG (MSC01_IC_REG_BASE + MSC01_IC_CFG_OFS)
+#define MSC01_IC_TRLD (MSC01_IC_REG_BASE + MSC01_IC_TRLD_OFS)
+#define MSC01_IC_TVAL (MSC01_IC_REG_BASE + MSC01_IC_TVAL_OFS)
+#define MSC01_IC_TCFG (MSC01_IC_REG_BASE + MSC01_IC_TCFG_OFS)
+#define MSC01_IC_SUP (MSC01_IC_REG_BASE + MSC01_IC_SUP_OFS)
+#define MSC01_IC_ENA (MSC01_IC_REG_BASE + MSC01_IC_ENA_OFS)
+#define MSC01_IC_DIS (MSC01_IC_REG_BASE + MSC01_IC_DIS_OFS)
+#define MSC01_IC_ISB (MSC01_IC_REG_BASE + MSC01_IC_ISB_OFS)
+#define MSC01_IC_ISA (MSC01_IC_REG_BASE + MSC01_IC_ISA_OFS)
+
+/*
+ * Soc-it interrupts are configurable.
+ * Every board describes its IRQ mapping with this table.
+ */
+typedef struct msc_irqmap {
+ int im_irq;
+ int im_type;
+ int im_lvl;
+} msc_irqmap_t;
+
+/* im_type */
+#define MSC01_IRQ_LEVEL 0
+#define MSC01_IRQ_EDGE 1
+
+extern void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq);
+extern void ll_msc_irq(struct pt_regs *regs);
+
+#endif /* __ASM_MIPS_BOARDS_MSC01_IC_H */
+
#define _ASM_MAX_NUMNODES_H
/* Max 128 Nodes */
-#define NODES_SHIFT 7
+#define NODES_SHIFT 6
#endif /* _ASM_MAX_NUMNODES_H */
#include <spaces.h>
+#endif
+
/*
* PAGE_SHIFT determines the page size
*/
#define PAGE_SHIFT 16
#endif
#define PAGE_SIZE (1UL << PAGE_SHIFT)
-#define PAGE_MASK (~(PAGE_SIZE-1))
+#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1))
+
+#ifdef __KERNEL__
#ifndef __ASSEMBLY__
extern void clear_page(void * page);
* These are used to make use of C type-checking..
*/
#ifdef CONFIG_64BIT_PHYS_ADDR
-typedef struct { unsigned long long pte; } pte_t;
+ #ifdef CONFIG_CPU_MIPS32
+ typedef struct { unsigned long pte_low, pte_high; } pte_t;
+ #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
+ #else
+ typedef struct { unsigned long long pte; } pte_t;
+ #define pte_val(x) ((x).pte)
+ #endif
#else
typedef struct { unsigned long pte; } pte_t;
+#define pte_val(x) ((x).pte)
#endif
+
typedef struct { unsigned long pmd; } pmd_t;
typedef struct { unsigned long pgd; } pgd_t;
typedef struct { unsigned long pgprot; } pgprot_t;
-#define pte_val(x) ((x).pte)
#define pmd_val(x) ((x).pmd)
#define pgd_val(x) ((x).pgd)
#define pgprot_val(x) ((x).pgprot)
#ifdef __KERNEL__
+/*
+ * This file essentially defines the interface between board
+ * specific PCI code and MIPS common PCI code. Should potentially put
+ * into include/asm/pci.h file.
+ */
+
+#include <linux/ioport.h>
+
+/*
+ * Each pci channel is a top-level PCI bus seem by CPU. A machine with
+ * multiple PCI channels may have multiple PCI host controllers or a
+ * single controller supporting multiple channels.
+ */
+struct pci_controller {
+ struct pci_controller *next;
+ struct pci_bus *bus;
+
+ struct pci_ops *pci_ops;
+ struct resource *mem_resource;
+ unsigned long mem_offset;
+ struct resource *io_resource;
+ unsigned long io_offset;
+
+ unsigned int index;
+ /* For compatibility with current (as of July 2003) pciutils
+ and XFree86. Eventually will be removed. */
+ unsigned int need_domain_info;
+
+ int iommu;
+};
+
+/*
+ * Used by boards to register their PCI busses before the actual scanning.
+ */
+extern struct pci_controller * alloc_pci_controller(void);
+extern void register_pci_controller(struct pci_controller *hose);
+
+/*
+ * board supplied pci irq fixup routine
+ */
+extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
+
+
/* Can be used to override the logic in pci_scan_bus for skipping
already-configured bus numbers - to be used for buggy BIOSes
or architectures with incomplete PCI setup by the loader */
extern void pcibios_resource_to_bus(struct pci_dev *dev,
struct pci_bus_region *region, struct resource *res);
+#ifdef CONFIG_PCI_DOMAINS
+
+#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
+
+static inline int
+pci_name_bus(char *name, struct pci_bus *bus)
+{
+ struct pci_controller *hose = bus->sysdata;
+
+ if (likely(hose->need_domain_info == 0)) {
+ sprintf(name, "%02x", bus->number);
+ } else {
+ sprintf(name, "%04x:%02x", hose->index, bus->number);
+ }
+ return 0;
+}
+
+#endif /* CONFIG_PCI_DOMAINS */
+
#endif /* __KERNEL__ */
/* implement the pci_ DMA API in terms of the generic device dma_ one */
{
}
+/* Do platform specific device initialization at pci_enable_device() time */
+extern int pcibios_plat_dev_init(struct pci_dev *dev);
+
#endif /* _ASM_PCI_H */
#define _ASM_PCI_BRIDGE_H
#include <linux/types.h>
-#include <asm/pci_channel.h>
+#include <linux/pci.h>
#include <asm/xtalk/xwidget.h> /* generic widget header */
/* I/O page size */
#define BRIDGE_INTERNAL_ATES 128
-
struct bridge_controller {
struct pci_controller pc;
struct resource mem;
unsigned int widget_id;
unsigned int irq_cpu;
dma64_addr_t baddr;
+ unsigned int pci_int[8];
};
#define BRIDGE_CONTROLLER(bus) \
((struct bridge_controller *)((bus)->sysdata))
+extern void register_bridge_irq(unsigned int irq);
+extern int request_bridge_irq(struct bridge_controller *bc);
+
#endif /* _ASM_PCI_BRIDGE_H */
+++ /dev/null
-#ifndef __ASM_PCI_CHANNEL_H
-#define __ASM_PCI_CHANNEL_H
-
-/*
- * This file essentially defines the interface between board
- * specific PCI code and MIPS common PCI code. Should potentially put
- * into include/asm/pci.h file.
- */
-
-#include <linux/ioport.h>
-#include <linux/pci.h>
-
-/*
- * Each pci channel is a top-level PCI bus seem by CPU. A machine with
- * multiple PCI channels may have multiple PCI host controllers or a
- * single controller supporting multiple channels.
- */
-struct pci_controller {
- struct pci_controller *next;
- struct pci_bus *bus;
-
- struct pci_ops *pci_ops;
- struct resource *mem_resource;
- unsigned long mem_offset;
- struct resource *io_resource;
- unsigned long io_offset;
-
- /* For compatibility with current (as of July 2003) pciutils
- and XFree86. Eventually will be removed. */
- unsigned int need_domain_info;
-
- int iommu;
-};
-
-/*
- * Used by boards to register their PCI interfaces before the actual scanning.
- */
-extern struct pci_controller * alloc_pci_controller(void);
-extern void register_pci_controller(struct pci_controller *hose);
-
-/*
- * board supplied pci irq fixup routine
- */
-extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
-
-#endif /* __ASM_PCI_CHANNEL_H */
static inline int pgd_present(pgd_t pgd) { return 1; }
static inline void pgd_clear(pgd_t *pgdp) { }
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
#define pte_page(x) pfn_to_page(pte_pfn(x))
+#define pte_pfn(x) ((unsigned long)((x).pte_high >> 6))
+static inline pte_t
+pfn_pte(unsigned long pfn, pgprot_t prot)
+{
+ pte_t pte;
+ pte.pte_high = (pfn << 6) | (pgprot_val(prot) & 0x3f);
+ pte.pte_low = pgprot_val(prot);
+ return pte;
+}
+#else
+
+#define pte_page(x) pfn_to_page(pte_pfn(x))
#ifdef CONFIG_CPU_VR41XX
#define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
#define pte_pfn(x) ((unsigned long)((x).pte >> PAGE_SHIFT))
#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
#endif
+#endif /* defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) */
#define __pgd_offset(address) pgd_index(address)
#define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
*/
#define PTE_FILE_MAX_BITS 27
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+ /* fixme */
+#define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f))
+#define pgoff_to_pte(off) \
+ ((pte_t){(((off) & 0x3f) + ((off) << 6) + _PAGE_FILE)})
+
+#else
#define pte_to_pgoff(_pte) \
((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
#define pgoff_to_pte(off) \
((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
+#endif
#endif
* that the failure is recognized later on. Linux does not seem to
* handle these failures very well though. The empty_bad_page_table has
* invalid pte entries in it, to force page faults.
- * Vmalloc handling: vmalloc uses swapper_pg_dir[0] (returned by
- * pgd_offset_k), which is initalized to point to kpmdtbl. kpmdtbl is
- * the only single page pmd in the system. kpmdtbl entries point into
- * kptbl[] array. We reserve 1 << PGD_ORDER pages to hold the
- * vmalloc range translations, which the fault handler looks at.
+ *
+ * Kernel mappings: kernel mappings are held in the swapper_pg_table.
+ * The layout is identical to userspace except it's indexed with the
+ * fault address - VMALLOC_START.
*/
/* PMD_SHIFT determines the size of the area a second-level page table can map */
*/
#ifdef CONFIG_PAGE_SIZE_4KB
#define PGD_ORDER 1
-#define PMD_ORDER 1
+#define PMD_ORDER 0
#define PTE_ORDER 0
#endif
#ifdef CONFIG_PAGE_SIZE_8KB
#define VMALLOC_START XKSEG
#define VMALLOC_END \
- (VMALLOC_START + ((1 << PGD_ORDER) * PTRS_PER_PTE * PAGE_SIZE))
+ (VMALLOC_START + PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE)
#define pte_ERROR(e) \
printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
#define pgoff_to_pte(off) \
((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
-/*
- * Used for the b0rked handling of kernel pagetables on the 64-bit kernel.
- */
-extern pte_t kptbl[(PAGE_SIZE << PGD_ORDER)/sizeof(pte_t)];
-extern pmd_t kpmdtbl[PTRS_PER_PMD];
-
#endif /* _ASM_PGTABLE_64_H */
* unpredictable things. The code (when it is written) to deal with
* this problem will be in the update_mmu_cache() code for the r4k.
*/
+#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR)
+
+#define _PAGE_PRESENT (1<<6) /* implemented in software */
+#define _PAGE_READ (1<<7) /* implemented in software */
+#define _PAGE_WRITE (1<<8) /* implemented in software */
+#define _PAGE_ACCESSED (1<<9) /* implemented in software */
+#define _PAGE_MODIFIED (1<<10) /* implemented in software */
+#define _PAGE_FILE (1<<10) /* set:pagecache unset:swap */
+
+#define _PAGE_R4KBUG (1<<0) /* workaround for r4k bug */
+#define _PAGE_GLOBAL (1<<0)
+#define _PAGE_VALID (1<<1)
+#define _PAGE_SILENT_READ (1<<1) /* synonym */
+#define _PAGE_DIRTY (1<<2) /* The MIPS dirty bit */
+#define _PAGE_SILENT_WRITE (1<<2)
+#define _CACHE_MASK (7<<3)
+
+/* MIPS32 defines only values 2 and 3. The rest are implementation
+ * dependent.
+ */
+#define _CACHE_UNCACHED (2<<3)
+#define _CACHE_CACHABLE_NONCOHERENT (3<<3)
+#define _CACHE_CACHABLE_COW (3<<3) /* Au1x */
+
+#else
+
#define _PAGE_PRESENT (1<<0) /* implemented in software */
#define _PAGE_READ (1<<1) /* implemented in software */
#define _PAGE_WRITE (1<<2) /* implemented in software */
#endif
#endif
+#endif /* defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR) */
#define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED)
#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
#elif defined(CONFIG_DMA_NONCOHERENT)
#define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_NONCOHERENT
#elif defined(CONFIG_CPU_RM9000)
-#define PAGE_CACHABLE_DEFAULT _CACHE_CWBEA
+#define PAGE_CACHABLE_DEFAULT _CACHE_CWB
#else
#define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW
#endif
+#if defined(CONFIG_CPU_MIPS32) && defined(CONFIG_64BIT_PHYS_ADDR)
+#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 3)
+#else
#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT >> 9)
+#endif
#endif /* _ASM_PGTABLE_BITS_H */
#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+static inline void set_pte(pte_t *ptep, pte_t pte)
+{
+ ptep->pte_high = pte.pte_high;
+ smp_wmb();
+ ptep->pte_low = pte.pte_low;
+ //printk("pte_high %x pte_low %x\n", ptep->pte_high, ptep->pte_low);
+
+ if (pte_val(pte) & _PAGE_GLOBAL) {
+ pte_t *buddy = ptep_buddy(ptep);
+ /*
+ * Make sure the buddy is global too (if it's !none,
+ * it better already be global)
+ */
+ if (pte_none(*buddy))
+ buddy->pte_low |= _PAGE_GLOBAL;
+ }
+}
+
+static inline void pte_clear(pte_t *ptep)
+{
+ /* Preserve global status for the pair */
+ if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
+ set_pte(ptep, __pte(_PAGE_GLOBAL));
+ else
+ set_pte(ptep, __pte(0));
+}
+#else
/*
* Certain architectures need to do special things when pte's
* within a page table are directly modified. Thus, the following
#endif
set_pte(ptep, __pte(0));
}
+#endif
/*
* (pmds are folded into pgds so this doesn't get actually called,
* Undefined behaviour if not..
*/
static inline int pte_user(pte_t pte) { BUG(); return 0; }
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; }
+static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; }
+static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; }
+static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
+static inline int pte_file(pte_t pte) { return (pte).pte_low & _PAGE_FILE; }
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+ (pte).pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
+ (pte).pte_high &= ~_PAGE_SILENT_WRITE;
+ return pte;
+}
+
+static inline pte_t pte_rdprotect(pte_t pte)
+{
+ (pte).pte_low &= ~(_PAGE_READ | _PAGE_SILENT_READ);
+ (pte).pte_high &= ~_PAGE_SILENT_READ;
+ return pte;
+}
+
+static inline pte_t pte_mkclean(pte_t pte)
+{
+ (pte).pte_low &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE);
+ (pte).pte_high &= ~_PAGE_SILENT_WRITE;
+ return pte;
+}
+
+static inline pte_t pte_mkold(pte_t pte)
+{
+ (pte).pte_low &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
+ (pte).pte_high &= ~_PAGE_SILENT_READ;
+ return pte;
+}
+
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+ (pte).pte_low |= _PAGE_WRITE;
+ if ((pte).pte_low & _PAGE_MODIFIED) {
+ (pte).pte_low |= _PAGE_SILENT_WRITE;
+ (pte).pte_high |= _PAGE_SILENT_WRITE;
+ }
+ return pte;
+}
+
+static inline pte_t pte_mkread(pte_t pte)
+{
+ (pte).pte_low |= _PAGE_READ;
+ if ((pte).pte_low & _PAGE_ACCESSED) {
+ (pte).pte_low |= _PAGE_SILENT_READ;
+ (pte).pte_high |= _PAGE_SILENT_READ;
+ }
+ return pte;
+}
+
+static inline pte_t pte_mkdirty(pte_t pte)
+{
+ (pte).pte_low |= _PAGE_MODIFIED;
+ if ((pte).pte_low & _PAGE_WRITE) {
+ (pte).pte_low |= _PAGE_SILENT_WRITE;
+ (pte).pte_high |= _PAGE_SILENT_WRITE;
+ }
+ return pte;
+}
+
+static inline pte_t pte_mkyoung(pte_t pte)
+{
+ (pte).pte_low |= _PAGE_ACCESSED;
+ if ((pte).pte_low & _PAGE_READ)
+ (pte).pte_low |= _PAGE_SILENT_READ;
+ (pte).pte_high |= _PAGE_SILENT_READ;
+ return pte;
+}
+#else
static inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; }
static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
pte_val(pte) |= _PAGE_SILENT_READ;
return pte;
}
+#endif
/*
* Macro to make mark a page protection value as "uncacheable". Note
*/
#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
+#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+ pte.pte_low &= _PAGE_CHG_MASK;
+ pte.pte_low |= pgprot_val(newprot);
+ pte.pte_high |= pgprot_val(newprot) & 0x3f;
+ return pte;
+}
+#else
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
}
+#endif
extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
#define kern_addr_valid(addr) (1)
#endif
+#ifdef CONFIG_64BIT_PHYS_ADDR
+extern phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size);
+extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
+
+static inline int io_remap_page_range(struct vm_area_struct *vma,
+ unsigned long vaddr,
+ unsigned long paddr,
+ unsigned long size,
+ pgprot_t prot)
+{
+ phys_t phys_addr_high = fixup_bigphys_addr(paddr, size);
+ return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
+}
+#else
+#define io_remap_page_range(vma, vaddr, paddr, size, prot) \
+ remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
+#endif
+
#include <asm-generic/pgtable.h>
/*
*/
#define HAVE_ARCH_UNMAPPED_AREA
-#define io_remap_page_range(vma, vaddr, paddr, size, prot) \
- remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
-
/*
* No page table caches to initialise
*/
typedef long __kernel_off_t;
typedef int __kernel_pid_t;
typedef int __kernel_ipc_pid_t;
-typedef int __kernel_uid_t;
-typedef int __kernel_gid_t;
+typedef unsigned int __kernel_uid_t;
+typedef unsigned int __kernel_gid_t;
#if (_MIPS_SZLONG == 32)
typedef unsigned int __kernel_size_t;
typedef int __kernel_ssize_t;
typedef unsigned short __kernel_uid16_t;
typedef unsigned short __kernel_gid16_t;
-typedef int __kernel_uid32_t;
-typedef int __kernel_gid32_t;
+typedef unsigned int __kernel_uid32_t;
+typedef unsigned int __kernel_gid32_t;
typedef __kernel_uid_t __kernel_old_uid_t;
typedef __kernel_gid_t __kernel_old_gid_t;
typedef unsigned int __kernel_old_dev_t;
#define _ASM_PROCESSOR_H
#include <linux/config.h>
-#include <linux/cache.h>
#include <linux/threads.h>
#include <asm/cachectl.h>
#include <asm/cpu.h>
+#include <asm/cpu-info.h>
#include <asm/mipsregs.h>
#include <asm/prefetch.h>
#include <asm/system.h>
-#ifdef CONFIG_SGI_IP27
-#include <asm/sn/types.h>
-#endif
-
-/*
- * Descriptor for a cache
- */
-struct cache_desc {
- unsigned short linesz; /* Size of line in bytes */
- unsigned short ways; /* Number of ways */
- unsigned short sets; /* Number of lines per set */
- unsigned int waysize; /* Bytes per way */
- unsigned int waybit; /* Bits to select in a cache set */
- unsigned int flags; /* Flags describing cache properties */
-};
-
-/*
- * Flag definitions
- */
-#define MIPS_CACHE_NOT_PRESENT 0x00000001
-#define MIPS_CACHE_VTAG 0x00000002 /* Virtually tagged cache */
-#define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */
-#define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */
-
-struct cpuinfo_mips {
- unsigned long udelay_val;
- unsigned long asid_cache;
-#if defined(CONFIG_SGI_IP27)
-// cpuid_t p_cpuid; /* PROM assigned cpuid */
- cnodeid_t p_nodeid; /* my node ID in compact-id-space */
- nasid_t p_nasid; /* my node ID in numa-as-id-space */
- unsigned char p_slice; /* Physical position on node board */
-#endif
-#if 0
- unsigned long loops_per_sec;
- unsigned long ipi_count;
- unsigned long irq_attempt[NR_IRQS];
- unsigned long smp_local_irq_count;
- unsigned long prof_multiplier;
- unsigned long prof_counter;
-#endif
-
- /*
- * Capability and feature descriptor structure for MIPS CPU
- */
- unsigned long options;
- unsigned int processor_id;
- unsigned int fpu_id;
- unsigned int cputype;
- int isa_level;
- int tlbsize;
- struct cache_desc icache; /* Primary I-cache */
- struct cache_desc dcache; /* Primary D or combined I/D cache */
- struct cache_desc scache; /* Secondary cache */
- struct cache_desc tcache; /* Tertiary/split secondary cache */
- void *data; /* Additional data */
-} __attribute__((aligned(SMP_CACHE_BYTES)));
-
-extern struct cpuinfo_mips cpu_data[];
-#define current_cpu_data cpu_data[smp_processor_id()]
-
-extern void cpu_probe(void);
-extern void cpu_report(void);
-
/*
* Return current * instruction pointer ("program counter").
*/
#define NUM_FPU_REGS 32
-typedef u64 fpureg_t;
+typedef __u64 fpureg_t;
struct mips_fpu_hard_struct {
fpureg_t fpr[NUM_FPU_REGS];
MF_FIXADE, 0, 0 \
}
-#ifdef __KERNEL__
-
struct task_struct;
/* Free all resources held by a thread. */
#define cpu_relax() barrier()
-#endif /* __KERNEL__ */
-
/*
* Return_address is a replacement for __builtin_return_address(count)
* which on certain architectures cannot reasonably be implemented in GCC
#ifdef __KERNEL__
+#include <linux/linkage.h>
+
/*
* Does the process account for user or for system time?
*/
* - We need a properly sign extended address for 64-bit code. To get away
* without ifdefs we let the compiler do it by a type cast.
*/
-#define INDEX_BASE ((int) KSEG0)
+#define INDEX_BASE CKSEG0
#define cache_op(op,addr) \
__asm__ __volatile__( \
#define C_P(card,port) (((card)<<6|(port)<<3) + 1)
-#ifdef CONFIG_MIPS_JAZZ
+#ifdef CONFIG_MACH_JAZZ
#include <asm/jazz.h>
#ifndef CONFIG_OLIVETTI_M700
#ifdef CONFIG_SERIAL_AU1X00
#include <asm/mach-au1x00/au1000.h>
-#define AU1000_SERIAL_PORT_DEFNS \
- { .baud_base = 0, .port = UART0_ADDR, .irq = AU1000_UART0_INT, \
- .flags = STD_COM_FLAGS, .type = 1 }, \
- { .baud_base = 0, .port = UART1_ADDR, .irq = AU1000_UART1_INT, \
- .flags = STD_COM_FLAGS, .type = 1 }, \
- { .baud_base = 0, .port = UART2_ADDR, .irq = AU1000_UART2_INT, \
- .flags = STD_COM_FLAGS, .type = 1 }, \
- { .baud_base = 0, .port = UART3_ADDR, .irq = AU1000_UART3_INT, \
- .flags = STD_COM_FLAGS, .type = 1 },
+#ifdef CONFIG_SOC_AU1000
+#define AU1000_SERIAL_PORT_DEFNS \
+ { .baud_base = 0, .port = UART0_ADDR, \
+ .iomem_base = (unsigned char *)UART0_ADDR, \
+ .irq = AU1000_UART0_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 }, \
+ { .baud_base = 0, .port = UART1_ADDR, \
+ .iomem_base = (unsigned char *)UART1_ADDR, \
+ .irq = AU1000_UART1_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 }, \
+ { .baud_base = 0, .port = UART2_ADDR, \
+ .iomem_base = (unsigned char *)UART2_ADDR, \
+ .irq = AU1000_UART2_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 }, \
+ { .baud_base = 0, .port = UART3_ADDR, \
+ .iomem_base = (unsigned char *)UART3_ADDR, \
+ .irq = AU1000_UART3_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 },
+#endif
+
+#ifdef CONFIG_SOC_AU1500
+#define AU1000_SERIAL_PORT_DEFNS \
+ { .baud_base = 0, .port = UART0_ADDR, \
+ .iomem_base = (unsigned char *)UART0_ADDR, \
+ .irq = AU1500_UART0_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 }, \
+ { .baud_base = 0, .port = UART3_ADDR, \
+ .iomem_base = (unsigned char *)UART3_ADDR, \
+ .irq = AU1500_UART3_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 },
+#endif
+
+#ifdef CONFIG_SOC_AU1100
+#define AU1000_SERIAL_PORT_DEFNS \
+ { .baud_base = 0, .port = UART0_ADDR, \
+ .iomem_base = (unsigned char *)UART0_ADDR, \
+ .irq = AU1100_UART0_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 }, \
+ { .baud_base = 0, .port = UART1_ADDR, \
+ .iomem_base = (unsigned char *)UART1_ADDR, \
+ .irq = AU1100_UART1_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 }, \
+ { .baud_base = 0, .port = UART3_ADDR, \
+ .iomem_base = (unsigned char *)UART3_ADDR, \
+ .irq = AU1100_UART3_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 },
+#endif
+
+#ifdef CONFIG_SOC_AU1550
+#define AU1000_SERIAL_PORT_DEFNS \
+ { .baud_base = 0, .port = UART0_ADDR, \
+ .iomem_base = (unsigned char *)UART0_ADDR, \
+ .irq = AU1550_UART0_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 }, \
+ { .baud_base = 0, .port = UART1_ADDR, \
+ .iomem_base = (unsigned char *)UART1_ADDR, \
+ .irq = AU1550_UART1_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 }, \
+ { .baud_base = 0, .port = UART3_ADDR, \
+ .iomem_base = (unsigned char *)UART3_ADDR, \
+ .irq = AU1550_UART3_INT, .flags = STD_COM_FLAGS,\
+ .iomem_reg_shift = 2 },
+#endif
+
+#ifdef CONFIG_SOC_AU1200
+#define AU1000_SERIAL_PORT_DEFNS \
+ { .baud_base = 0, .port = UART0_ADDR, \
+ .iomem_base = (unsigned char *)UART0_ADDR, \
+ .irq = AU1200_UART0_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 }, \
+ { .baud_base = 0, .port = UART1_ADDR, \
+ .iomem_base = (unsigned char *)UART1_ADDR, \
+ .irq = AU1200_UART1_INT, .flags = STD_COM_FLAGS, \
+ .iomem_reg_shift = 2 },
+#endif
+
#else
#define AU1000_SERIAL_PORT_DEFNS
#endif
#define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS
#endif
+#ifdef CONFIG_MOMENCO_OCELOT_3
+#define OCELOT_3_BASE_BAUD ( 20000000 / 16 )
+#define OCELOT_3_SERIAL_IRQ 6
+#define OCELOT_3_SERIAL_BASE (signed)0xfd000020
+
+#define _OCELOT_3_SERIAL_INIT(int, base) \
+ { baud_base: OCELOT_3_BASE_BAUD, irq: int, \
+ flags: STD_COM_FLAGS, \
+ iomem_base: (u8 *) base, iomem_reg_shift: 2, \
+ io_type: SERIAL_IO_MEM }
+
+#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
+ _OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE)
+#else
+#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
+#endif
+
#ifdef CONFIG_MOMENCO_OCELOT
/* Ordinary NS16552 duart with a 20MHz crystal. */
#define OCELOT_BASE_BAUD ( 20000000 / 16 )
MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
+ MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
TXX927_SERIAL_PORT_DEFNS \
AU1000_SERIAL_PORT_DEFNS
struct sgioc_regs {
struct pi1_regs pport;
u32 _unused0[2];
- struct sgioc_uart_regs serport;
+ struct sgioc_uart_regs uart;
struct sgioc_keyb_regs kbdmouse;
u8 _gcsel[3];
volatile u8 gcsel;
#define __arc_clobbers \
"$2","$3" /* ... */, "$8","$9","$10","$11", \
- "$12","$13","$14","$15","$16","$24","25","$31"
+ "$12","$13","$14","$15","$16","$24","$25","$31"
#define ARC_CALL0(dest) \
({ long __res; \
long __vec = (long) romvec->dest; \
__asm__ __volatile__( \
"dsubu\t$29, 32\n\t" \
- "sw\t%6, 16($29)\n\t" \
+ "sw\t%7, 16($29)\n\t" \
"jalr\t%1\n\t" \
"daddu\t$29, 32\n\t" \
"move\t%0, $2" \
#define SIGEV_HEAD_SIZE (sizeof(long) + 2*sizeof(int))
#define SIGEV_PAD_SIZE ((SIGEV_MAX_SIZE-SIGEV_HEAD_SIZE) / sizeof(int))
-#define SI_PAD_SIZE ((SI_MAX_SIZE/sizeof(int)) - 4)
+#undef __ARCH_SI_TRAPNO /* exception code needs to fill this ... */
#define HAVE_ARCH_SIGINFO_T
#define HAVE_ARCH_COPY_SIGINFO
struct siginfo;
-#include <asm-generic/siginfo.h>
+/*
+ * Careful to keep union _sifields from shifting ...
+ */
+#ifdef CONFIG_MIPS32
+#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int))
+#endif
+#ifdef CONFIG_MIPS64
+#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
+#endif
-/* This structure matches the 32/n32 ABIs for source compatibility but
- has Linux extensions. */
+#include <asm-generic/siginfo.h>
typedef struct siginfo {
int si_signo;
int si_code;
int si_errno;
+ int __pad0[SI_MAX_SIZE / sizeof(int) - SI_PAD_SIZE - 3];
union {
int _pad[SI_PAD_SIZE];
/* kill() */
struct {
pid_t _pid; /* sender's pid */
- uid_t _uid; /* sender's uid */
+ __ARCH_SI_UID_T _uid; /* sender's uid */
} _kill;
- /* SIGCHLD */
- struct {
- pid_t _pid; /* which child */
- uid_t _uid; /* sender's uid */
- int _status; /* exit code */
- clock_t _utime;
- clock_t _stime;
- } _sigchld;
-
- /* IRIX SIGCHLD */
- struct {
- pid_t _pid; /* which child */
- clock_t _utime;
- int _status; /* exit code */
- clock_t _stime;
- } _irix_sigchld;
-
- /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
- struct {
- void *_addr; /* faulting insn/memory ref. */
- } _sigfault;
-
- /* SIGPOLL, SIGXFSZ (To do ...) */
- struct {
-#ifdef CONFIG_MIPS32
- int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
-#endif
-#ifdef CONFIG_MIPS64
- long _band; /* POLL_IN, POLL_OUT, POLL_MSG */
-#endif
- int _fd;
- } _sigpoll;
-
/* POSIX.1b timers */
struct {
timer_t _tid; /* timer id */
int _overrun; /* overrun count */
char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
sigval_t _sigval; /* same as below */
- int _sys_private; /* not to be passed to user */
+ int _sys_private; /* not to be passed to user */
} _timer;
/* POSIX.1b signals */
struct {
pid_t _pid; /* sender's pid */
- uid_t _uid; /* sender's uid */
+ __ARCH_SI_UID_T _uid; /* sender's uid */
sigval_t _sigval;
} _rt;
- } _sifields;
-} siginfo_t;
-
-#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
-
-#include <linux/compat.h>
-
-#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3)
-
-typedef union sigval32 {
- int sival_int;
- s32 sival_ptr;
-} sigval_t32;
-
-typedef struct siginfo32 {
- int si_signo;
- int si_code;
- int si_errno;
-
- union {
- int _pad[SI_PAD_SIZE32];
-
- /* kill() */
- struct {
- compat_pid_t _pid; /* sender's pid */
- compat_uid_t _uid; /* sender's uid */
- } _kill;
-
/* SIGCHLD */
struct {
- compat_pid_t _pid; /* which child */
- compat_uid_t _uid; /* sender's uid */
- compat_clock_t _utime;
+ pid_t _pid; /* which child */
+ __ARCH_SI_UID_T _uid; /* sender's uid */
int _status; /* exit code */
- compat_clock_t _stime;
+ clock_t _utime;
+ clock_t _stime;
} _sigchld;
/* IRIX SIGCHLD */
struct {
- compat_pid_t _pid; /* which child */
- compat_clock_t _utime;
+ pid_t _pid; /* which child */
+ clock_t _utime;
int _status; /* exit code */
- compat_clock_t _stime;
+ clock_t _stime;
} _irix_sigchld;
/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
struct {
- s32 _addr; /* faulting insn/memory ref. */
+ void __user *_addr; /* faulting insn/memory ref. */
+#ifdef __ARCH_SI_TRAPNO
+ int _trapno; /* TRAP # which caused the signal */
+#endif
} _sigfault;
/* SIGPOLL, SIGXFSZ (To do ...) */
struct {
- int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
+ __ARCH_SI_BAND_T _band; /* POLL_IN, POLL_OUT, POLL_MSG */
int _fd;
} _sigpoll;
-
- /* POSIX.1b timers */
- struct {
- unsigned int _timer1;
- unsigned int _timer2;
- } _timer;
-
- /* POSIX.1b signals */
- struct {
- compat_pid_t _pid; /* sender's pid */
- compat_uid_t _uid; /* sender's uid */
- sigval_t32 _sigval;
- } _rt;
-
} _sifields;
-} siginfo_t32;
-
-#endif /* defined(__KERNEL__) && defined(CONFIG_COMPAT) */
+} siginfo_t;
/*
* si_code values
#include <asm/offset.h>
-/* Used in declaration of save_static functions. */
-#define static_unused static __attribute__((unused))
-
#define __str2(x) #x
#define __str(x) __str2(x)
"sw\t$22,"__str(PT_R22)"($29)\n\t" \
"sw\t$23,"__str(PT_R23)"($29)\n\t" \
"sw\t$30,"__str(PT_R30)"($29)\n\t" \
+ "j\t_" #symbol "\n\t" \
".end\t" #symbol "\n\t" \
".size\t" #symbol",. - " #symbol)
"sd\t$22,"__str(PT_R22)"($29)\n\t" \
"sd\t$23,"__str(PT_R23)"($29)\n\t" \
"sd\t$30,"__str(PT_R30)"($29)\n\t" \
+ "j\t_" #symbol "\n\t" \
".end\t" #symbol "\n\t" \
".size\t" #symbol",. - " #symbol)
*/
extern void core_send_ipi(int cpu, unsigned int action);
-/*
- * Detect available CPUs, populate phys_cpu_present_map
- */
-extern void prom_build_cpu_map(void);
-
/*
* Firmware CPU startup hook
*/
extern void prom_init_secondary(void);
/*
- * Callout to firmware before smp_init
+ * Detect available CPUs, populate phys_cpu_present_map before smp_init
*/
extern void prom_prepare_cpus(unsigned int max_cpus);
#include <asm/sn/klkernvars.h>
#include <asm/xtalk/xtalk.h>
-#define LEVELS_PER_SLICE 128
-
-struct slice_data {
- unsigned long irq_alloc_mask[2];
- unsigned long irq_enable_mask[2];
- int level_to_irq[LEVELS_PER_SLICE];
-};
-
-struct hub_data {
- kern_vars_t kern_vars;
- DECLARE_BITMAP (h_bigwin_used, HUB_NUM_BIG_WINDOW);
- cpumask_t h_cpus;
- unsigned long slice_map;
- struct slice_data slice[2];
-};
-
-extern struct hub_data *hub_data[];
-#define HUB_DATA(n) (hub_data[(n)])
-
/* ip27-hubio.c */
extern unsigned long hub_pio_map(cnodeid_t cnode, xwidgetnum_t widget,
unsigned long xtalk_addr, size_t size);
extern void hub_rtc_init(cnodeid_t);
extern void cpu_time_init(void);
extern void per_cpu_init(void);
-extern void per_hub_init(cnodeid_t cnode);
extern void install_cpu_nmi_handler(int slice);
extern void install_ipi(void);
extern void setup_replication_mask(int);
extern void replicate_kernel_text(int);
extern pfn_t node_getfirstfree(cnodeid_t);
-extern void mlreset(void);
#endif /* __ASM_SN_SN_PRIVATE_H */
#define SO_PEERSEC 30
+#ifdef __KERNEL__
+
/** sock_type - Socket types
*
* Please notice that for binary compat reasons MIPS has to
#define SOCK_MAX (SOCK_PACKET + 1)
-#define ARCH_HAS_SOCKET_TYPES
+#define ARCH_HAS_SOCKET_TYPES 1
+
+#endif /* __KERNEL__ */
#endif /* _ASM_SOCKET_H */
#ifndef _ASM_SPINLOCK_H
#define _ASM_SPINLOCK_H
+#include <asm/war.h>
+
/*
* Your basic SMP spinlocks, allowing only a single CPU anywhere
*/
{
unsigned int tmp;
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# _raw_spin_lock\n"
- "1:\tll\t%1, %2\n\t"
- "bnez\t%1, 1b\n\t"
- " li\t%1, 1\n\t"
- "sc\t%1, %0\n\t"
- "beqz\t%1, 1b\n\t"
- " sync\n\t"
- ".set\treorder"
- : "=m" (lock->lock), "=&r" (tmp)
- : "m" (lock->lock)
- : "memory");
+ if (R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_spin_lock \n"
+ "1: ll %1, %2 \n"
+ " bnez %1, 1b \n"
+ " li %1, 1 \n"
+ " sc %1, %0 \n"
+ " beqzl %1, 1b \n"
+ " nop \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=m" (lock->lock), "=&r" (tmp)
+ : "m" (lock->lock)
+ : "memory");
+ } else {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_spin_lock \n"
+ "1: ll %1, %2 \n"
+ " bnez %1, 1b \n"
+ " li %1, 1 \n"
+ " sc %1, %0 \n"
+ " beqz %1, 1b \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=m" (lock->lock), "=&r" (tmp)
+ : "m" (lock->lock)
+ : "memory");
+ }
}
static inline void _raw_spin_unlock(spinlock_t *lock)
{
__asm__ __volatile__(
- ".set\tnoreorder\t\t\t# _raw_spin_unlock\n\t"
- "sync\n\t"
- "sw\t$0, %0\n\t"
- ".set\treorder"
+ " .set noreorder # _raw_spin_unlock \n"
+ " sync \n"
+ " sw $0, %0 \n"
+ " .set\treorder \n"
: "=m" (lock->lock)
: "m" (lock->lock)
: "memory");
{
unsigned int temp, res;
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# _raw_spin_trylock\n\t"
- "1:\tll\t%0, %3\n\t"
- "ori\t%2, %0, 1\n\t"
- "sc\t%2, %1\n\t"
- "beqz\t%2, 1b\n\t"
- " andi\t%2, %0, 1\n\t"
- ".set\treorder"
- : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
- : "m" (lock->lock)
- : "memory");
+ if (R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_spin_trylock \n"
+ "1: ll %0, %3 \n"
+ " ori %2, %0, 1 \n"
+ " sc %2, %1 \n"
+ " beqzl %2, 1b \n"
+ " nop \n"
+ " andi %2, %0, 1 \n"
+ " sync \n"
+ " .set reorder"
+ : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
+ : "m" (lock->lock)
+ : "memory");
+ } else {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_spin_trylock \n"
+ "1: ll %0, %3 \n"
+ " ori %2, %0, 1 \n"
+ " sc %2, %1 \n"
+ " beqz %2, 1b \n"
+ " andi %2, %0, 1 \n"
+ " sync \n"
+ " .set reorder"
+ : "=&r" (temp), "=m" (lock->lock), "=&r" (res)
+ : "m" (lock->lock)
+ : "memory");
+ }
return res == 0;
}
{
unsigned int tmp;
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# _raw_read_lock\n"
- "1:\tll\t%1, %2\n\t"
- "bltz\t%1, 1b\n\t"
- " addu\t%1, 1\n\t"
- "sc\t%1, %0\n\t"
- "beqz\t%1, 1b\n\t"
- " sync\n\t"
- ".set\treorder"
- : "=m" (rw->lock), "=&r" (tmp)
- : "m" (rw->lock)
- : "memory");
+ if (R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_read_lock \n"
+ "1: ll %1, %2 \n"
+ " bltz %1, 1b \n"
+ " addu %1, 1 \n"
+ " sc %1, %0 \n"
+ " beqzl %1, 1b \n"
+ " nop \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=m" (rw->lock), "=&r" (tmp)
+ : "m" (rw->lock)
+ : "memory");
+ } else {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_read_lock \n"
+ "1: ll %1, %2 \n"
+ " bltz %1, 1b \n"
+ " addu %1, 1 \n"
+ " sc %1, %0 \n"
+ " beqz %1, 1b \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=m" (rw->lock), "=&r" (tmp)
+ : "m" (rw->lock)
+ : "memory");
+ }
}
/* Note the use of sub, not subu which will make the kernel die with an
{
unsigned int tmp;
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# _raw_read_unlock\n"
- "1:\tll\t%1, %2\n\t"
- "sub\t%1, 1\n\t"
- "sc\t%1, %0\n\t"
- "beqz\t%1, 1b\n\t"
- " sync\n\t"
- ".set\treorder"
- : "=m" (rw->lock), "=&r" (tmp)
- : "m" (rw->lock)
- : "memory");
+ if (R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ "1: ll %1, %2 # _raw_read_unlock \n"
+ " sub %1, 1 \n"
+ " sc %1, %0 \n"
+ " beqzl %1, 1b \n"
+ " sync \n"
+ : "=m" (rw->lock), "=&r" (tmp)
+ : "m" (rw->lock)
+ : "memory");
+ } else {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_read_unlock \n"
+ "1: ll %1, %2 \n"
+ " sub %1, 1 \n"
+ " sc %1, %0 \n"
+ " beqz %1, 1b \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=m" (rw->lock), "=&r" (tmp)
+ : "m" (rw->lock)
+ : "memory");
+ }
}
static inline void _raw_write_lock(rwlock_t *rw)
{
unsigned int tmp;
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# _raw_write_lock\n"
- "1:\tll\t%1, %2\n\t"
- "bnez\t%1, 1b\n\t"
- " lui\t%1, 0x8000\n\t"
- "sc\t%1, %0\n\t"
- "beqz\t%1, 1b\n\t"
- " sync\n\t"
- ".set\treorder"
- : "=m" (rw->lock), "=&r" (tmp)
- : "m" (rw->lock)
- : "memory");
+ if (R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_write_lock \n"
+ "1: ll %1, %2 \n"
+ " bnez %1, 1b \n"
+ " lui %1, 0x8000 \n"
+ " sc %1, %0 \n"
+ " beqzl %1, 1b \n"
+ " nop \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=m" (rw->lock), "=&r" (tmp)
+ : "m" (rw->lock)
+ : "memory");
+ } else {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_write_lock \n"
+ "1: ll %1, %2 \n"
+ " bnez %1, 1b \n"
+ " lui %1, 0x8000 \n"
+ " sc %1, %0 \n"
+ " beqz %1, 1b \n"
+ " nop \n"
+ " sync \n"
+ " .set reorder \n"
+ : "=m" (rw->lock), "=&r" (tmp)
+ : "m" (rw->lock)
+ : "memory");
+ }
}
static inline void _raw_write_unlock(rwlock_t *rw)
{
__asm__ __volatile__(
- ".set\tnoreorder\t\t\t# _raw_write_unlock\n\t"
- "sync\n\t"
- "sw\t$0, %0\n\t"
- ".set\treorder"
+ " sync # _raw_write_unlock \n"
+ " sw $0, %0 \n"
: "=m" (rw->lock)
: "m" (rw->lock)
: "memory");
unsigned int tmp;
int ret;
- __asm__ __volatile__(
- ".set\tnoreorder\t\t\t# _raw_write_trylock\n"
- "li\t%2, 0\n\t"
- "1:\tll\t%1, %3\n\t"
- "bnez\t%1, 2f\n\t"
- "lui\t%1, 0x8000\n\t"
- "sc\t%1, %0\n\t"
- "beqz\t%1, 1b\n\t"
- "sync\n\t"
- "li\t%2, 1\n\t"
- ".set\treorder\n"
- "2:"
- : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret)
- : "m" (rw->lock)
- : "memory");
+ if (R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_write_trylock \n"
+ " li %2, 0 \n"
+ "1: ll %1, %3 \n"
+ " bnez %1, 2f \n"
+ " lui %1, 0x8000 \n"
+ " sc %1, %0 \n"
+ " beqzl %1, 1b \n"
+ " nop \n"
+ " sync \n"
+ " li %2, 1 \n"
+ " .set reorder \n"
+ "2: \n"
+ : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret)
+ : "m" (rw->lock)
+ : "memory");
+ } else {
+ __asm__ __volatile__(
+ " .set noreorder # _raw_write_trylock \n"
+ " li %2, 0 \n"
+ "1: ll %1, %3 \n"
+ " bnez %1, 2f \n"
+ " lui %1, 0x8000 \n"
+ " sc %1, %0 \n"
+ " beqz %1, 1b \n"
+ " sync \n"
+ " li %2, 1 \n"
+ " .set reorder \n"
+ "2: \n"
+ : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret)
+ : "m" (rw->lock)
+ : "memory");
+ }
return ret;
}
MFC0 k1, CP0_CONTEXT
dsra k1, 23
lui k0, %hi(pgd_current)
- daddiu k0, %lo(pgd_current)
+ addiu k0, %lo(pgd_current)
dsubu k1, k0
lui k0, %hi(kernelsp)
daddu k1, k0
long f_bfree;
long f_files;
long f_ffree;
+ long f_bavail;
/* Linux specials */
- long f_bavail;
__kernel_fsid_t f_fsid;
long f_namelen;
long f_spare[6];
struct statfs64 {
__u32 f_type;
__u32 f_bsize;
+ __u32 f_frsize; /* Fragment size - unsupported */
+ __u32 __pad;
__u64 f_blocks;
__u64 f_bfree;
- __u64 f_bavail;
__u64 f_files;
__u64 f_ffree;
+ __u64 f_bavail;
__kernel_fsid_t f_fsid;
__u32 f_namelen;
- __u32 f_frsize;
- __u32 f_spare[5];
+ __u32 f_spare[6];
};
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
long f_bfree;
long f_files;
long f_ffree;
+ long f_bavail;
/* Linux specials */
- long f_bavail;
__kernel_fsid_t f_fsid;
long f_namelen;
long f_spare[6];
};
struct compat_statfs64 {
- __u32 f_type;
- __u32 f_bsize;
- __u64 f_blocks;
- __u64 f_bfree;
- __u64 f_bavail;
- __u64 f_files;
- __u64 f_ffree;
+ __u32 f_type;
+ __u32 f_bsize;
+ __u32 f_frsize; /* Fragment size - unsupported */
+ __u32 __pad;
+ __u64 f_blocks;
+ __u64 f_bfree;
+ __u64 f_files;
+ __u64 f_ffree;
+ __u64 f_bavail;
__kernel_fsid_t f_fsid;
- __u32 f_namelen;
- __u32 f_frsize;
- __u32 f_spare[5];
+ __u32 f_namelen;
+ __u32 f_spare[6];
};
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
#define _ASM_SYSTEM_H
#include <linux/config.h>
-#include <asm/sgidefs.h>
-
-#include <linux/kernel.h>
+#include <linux/types.h>
#include <asm/addrspace.h>
+#include <asm/cpu-features.h>
#include <asm/ptrace.h>
-#include <asm/hazards.h>
-
-__asm__ (
- ".macro\tlocal_irq_enable\n\t"
- ".set\tpush\n\t"
- ".set\treorder\n\t"
- ".set\tnoat\n\t"
- "mfc0\t$1,$12\n\t"
- "ori\t$1,0x1f\n\t"
- "xori\t$1,0x1e\n\t"
- "mtc0\t$1,$12\n\t"
- "irq_enable_hazard\n\t"
- ".set\tpop\n\t"
- ".endm");
-
-static inline void local_irq_enable(void)
-{
- __asm__ __volatile__(
- "local_irq_enable"
- : /* no outputs */
- : /* no inputs */
- : "memory");
-}
-
-/*
- * For cli() we have to insert nops to make sure that the new value
- * has actually arrived in the status register before the end of this
- * macro.
- * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
- * no nops at all.
- */
-__asm__ (
- ".macro\tlocal_irq_disable\n\t"
- ".set\tpush\n\t"
- ".set\tnoat\n\t"
- "mfc0\t$1,$12\n\t"
- "ori\t$1,1\n\t"
- "xori\t$1,1\n\t"
- ".set\tnoreorder\n\t"
- "mtc0\t$1,$12\n\t"
- "irq_disable_hazard\n\t"
- ".set\tpop\n\t"
- ".endm");
-
-static inline void local_irq_disable(void)
-{
- __asm__ __volatile__(
- "local_irq_disable"
- : /* no outputs */
- : /* no inputs */
- : "memory");
-}
-
-__asm__ (
- ".macro\tlocal_save_flags flags\n\t"
- ".set\tpush\n\t"
- ".set\treorder\n\t"
- "mfc0\t\\flags, $12\n\t"
- ".set\tpop\n\t"
- ".endm");
-
-#define local_save_flags(x) \
-__asm__ __volatile__( \
- "local_save_flags %0" \
- : "=r" (x))
-
-__asm__ (
- ".macro\tlocal_irq_save result\n\t"
- ".set\tpush\n\t"
- ".set\treorder\n\t"
- ".set\tnoat\n\t"
- "mfc0\t\\result, $12\n\t"
- "ori\t$1, \\result, 1\n\t"
- "xori\t$1, 1\n\t"
- ".set\tnoreorder\n\t"
- "mtc0\t$1, $12\n\t"
- "irq_disable_hazard\n\t"
- ".set\tpop\n\t"
- ".endm");
-
-#define local_irq_save(x) \
-__asm__ __volatile__( \
- "local_irq_save\t%0" \
- : "=r" (x) \
- : /* no inputs */ \
- : "memory")
-
-__asm__ (
- ".macro\tlocal_irq_restore flags\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "mfc0\t$1, $12\n\t"
- "andi\t\\flags, 1\n\t"
- "ori\t$1, 1\n\t"
- "xori\t$1, 1\n\t"
- "or\t\\flags, $1\n\t"
- "mtc0\t\\flags, $12\n\t"
- "irq_disable_hazard\n\t"
- ".set\tat\n\t"
- ".set\treorder\n\t"
- ".endm");
-
-#define local_irq_restore(flags) \
-do { \
- unsigned long __tmp1; \
- \
- __asm__ __volatile__( \
- "local_irq_restore\t%0" \
- : "=r" (__tmp1) \
- : "0" (flags) \
- : "memory"); \
-} while(0)
-
-#define irqs_disabled() \
-({ \
- unsigned long flags; \
- local_save_flags(flags); \
- !(flags & 1); \
-})
+#include <asm/war.h>
+#include <asm/interrupt.h>
/*
* read_barrier_depends - Flush all pending reads that subsequents reads
(last) = resume(prev, next, next->thread_info); \
} while(0)
+#define ROT_IN_PIECES \
+ " .set noreorder \n" \
+ " .set reorder \n"
+
static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
{
__u32 retval;
-#ifdef CONFIG_CPU_HAS_LLSC
- unsigned long dummy;
-
- __asm__ __volatile__(
- ".set\tpush\t\t\t\t# xchg_u32\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnomacro\n\t"
- "ll\t%0, %3\n"
- "1:\tmove\t%2, %z4\n\t"
- "sc\t%2, %1\n\t"
- "beqzl\t%2, 1b\n\t"
- " ll\t%0, %3\n\t"
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long dummy;
+
+ __asm__ __volatile__(
+ "1: ll %0, %3 # xchg_u32 \n"
+ " move %2, %z4 \n"
+ " sc %2, %1 \n"
+ " beqzl %2, 1b \n"
+ ROT_IN_PIECES
#ifdef CONFIG_SMP
- "sync\n\t"
+ " sync \n"
#endif
- ".set\tpop"
: "=&r" (retval), "=m" (*m), "=&r" (dummy)
: "R" (*m), "Jr" (val)
: "memory");
-#else
- unsigned long flags;
-
- local_irq_save(flags);
- retval = *m;
- *m = val;
- local_irq_restore(flags); /* implies memory barrier */
+ } else if (cpu_has_llsc) {
+ unsigned long dummy;
+
+ __asm__ __volatile__(
+ "1: ll %0, %3 # xchg_u32 \n"
+ " move %2, %z4 \n"
+ " sc %2, %1 \n"
+ " beqz %2, 1b \n"
+#ifdef CONFIG_SMP
+ " sync \n"
#endif
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
+ } else {
+ unsigned long flags;
+
+ local_irq_save(flags);
+ retval = *m;
+ *m = val;
+ local_irq_restore(flags); /* implies memory barrier */
+ }
return retval;
}
{
__u64 retval;
-#ifdef CONFIG_CPU_HAS_LLDSCD
- unsigned long dummy;
-
- __asm__ __volatile__(
- ".set\tpush\t\t\t\t# xchg_u64\n\t"
- ".set\tnoreorder\n\t"
- ".set\tnomacro\n\t"
- "lld\t%0, %3\n"
- "1:\tmove\t%2, %z4\n\t"
- "scd\t%2, %1\n\t"
- "beqzl\t%2, 1b\n\t"
- " lld\t%0, %3\n\t"
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ unsigned long dummy;
+
+ __asm__ __volatile__(
+ "1: lld %0, %3 # xchg_u64 \n"
+ " move %2, %z4 \n"
+ " scd %2, %1 \n"
+ " beqzl %2, 1b \n"
+ ROT_IN_PIECES
#ifdef CONFIG_SMP
- "sync\n\t"
+ " sync \n"
#endif
- ".set\tpop"
: "=&r" (retval), "=m" (*m), "=&r" (dummy)
: "R" (*m), "Jr" (val)
: "memory");
-#else
- unsigned long flags;
-
- local_irq_save(flags);
- retval = *m;
- *m = val;
- local_irq_restore(flags); /* implies memory barrier */
+ } else if (cpu_has_llsc) {
+ unsigned long dummy;
+
+ __asm__ __volatile__(
+ "1: lld %0, %3 # xchg_u64 \n"
+ " move %2, %z4 \n"
+ " scd %2, %1 \n"
+ " beqz %2, 1b \n"
+#ifdef CONFIG_SMP
+ " sync \n"
#endif
+ : "=&r" (retval), "=m" (*m), "=&r" (dummy)
+ : "R" (*m), "Jr" (val)
+ : "memory");
+ } else {
+ unsigned long flags;
+
+ local_irq_save(flags);
+ retval = *m;
+ *m = val;
+ local_irq_restore(flags); /* implies memory barrier */
+ }
return retval;
}
{
__u32 retval;
-#ifdef CONFIG_CPU_HAS_LLSC
- __asm__ __volatile__(
- " .set noat \n"
- "1: ll %0, %2 # __cmpxchg_u32 \n"
- " bne %0, %z3, 2f \n"
- " move $1, %z4 \n"
- " sc $1, %1 \n"
- " beqz $1, 1b \n"
+ if (cpu_has_llsc && R10000_LLSC_WAR) {
+ __asm__ __volatile__(
+ " .set noat \n"
+ "1: ll %0, %2 # __cmpxchg_u32 \n"
+ " bne %0, %z3, 2f \n"
+ " move $1, %z4 \n"
+ " sc $1, %1 \n"
+ " beqzl $1, 1b \n"
+ ROT_IN_PIECES
#ifdef CONFIG_SMP
- " sync \n"
+ " sync \n"
#endif
- "2: \n"
- " .set at \n"
- : "=&r" (retval), "=m" (*m)
- : "R" (*m), "Jr" (old), "Jr" (new)
- : "memory");
-#else
- unsigned long flags;
-
- local_irq_save(flags);
- retval = *m;
- if (retval == old)
- *m = new;
- local_irq_restore(flags); /* implies memory barrier */
+ "2: \n"
+ " .set at \n"
+ : "=&r" (retval), "=m" (*m)
+ : "R" (*m), "Jr" (old), "Jr" (new)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
+ " .set noat \n"
+ "1: ll %0, %2 # __cmpxchg_u32 \n"
+ " bne %0, %z3, 2f \n"
+ " move $1, %z4 \n"
+ " sc $1, %1 \n"
+ " beqz $1, 1b \n"
+#ifdef CONFIG_SMP
+ " sync \n"
#endif
+ "2: \n"
+ " .set at \n"
+ : "=&r" (retval), "=m" (*m)
+ : "R" (*m), "Jr" (old), "Jr" (new)
+ : "memory");
+ } else {
+ unsigned long flags;
+
+ local_irq_save(flags);
+ retval = *m;
+ if (retval == old)
+ *m = new;
+ local_irq_restore(flags); /* implies memory barrier */
+ }
return retval;
}
{
__u64 retval;
-#ifdef CONFIG_CPU_HAS_LLDSCD
- __asm__ __volatile__(
- " .set noat \n"
- "1: lld %0, %2 # __cmpxchg_u64 \n"
- " bne %0, %z3, 2f \n"
- " move $1, %z4 \n"
- " scd $1, %1 \n"
- " beqz $1, 1b \n"
+ if (cpu_has_llsc) {
+ __asm__ __volatile__(
+ " .set noat \n"
+ "1: lld %0, %2 # __cmpxchg_u64 \n"
+ " bne %0, %z3, 2f \n"
+ " move $1, %z4 \n"
+ " scd $1, %1 \n"
+ " beqzl $1, 1b \n"
+ ROT_IN_PIECES
#ifdef CONFIG_SMP
- " sync \n"
+ " sync \n"
#endif
- "2: \n"
- " .set at \n"
- : "=&r" (retval), "=m" (*m)
- : "R" (*m), "Jr" (old), "Jr" (new)
- : "memory");
-#else
- unsigned long flags;
-
- local_irq_save(flags);
- retval = *m;
- if (retval == old)
- *m = new;
- local_irq_restore(flags); /* implies memory barrier */
+ "2: \n"
+ " .set at \n"
+ : "=&r" (retval), "=m" (*m)
+ : "R" (*m), "Jr" (old), "Jr" (new)
+ : "memory");
+ } else if (cpu_has_llsc) {
+ __asm__ __volatile__(
+ " .set noat \n"
+ "1: lld %0, %2 # __cmpxchg_u64 \n"
+ " bne %0, %z3, 2f \n"
+ " move $1, %z4 \n"
+ " scd $1, %1 \n"
+ " beqz $1, 1b \n"
+#ifdef CONFIG_SMP
+ " sync \n"
#endif
+ "2: \n"
+ " .set at \n"
+ : "=&r" (retval), "=m" (*m)
+ : "R" (*m), "Jr" (old), "Jr" (new)
+ : "memory");
+ } else {
+ unsigned long flags;
+
+ local_irq_save(flags);
+ retval = *m;
+ if (retval == old)
+ *m = new;
+ local_irq_restore(flags); /* implies memory barrier */
+ }
return retval;
}
#define die_if_kernel(msg, regs) \
__die_if_kernel(msg, regs, __FILE__ ":", __FUNCTION__, __LINE__)
-extern int serial_console;
extern int stop_a_enabled;
-static __inline__ int con_is_present(void)
-{
- return serial_console ? 0 : 1;
-}
-
/*
* Taken from include/asm-ia64/system.h; prevents deadlock on SMP
* systems.
#endif /* !__ASSEMBLY__ */
-#define PREEMPT_ACTIVE 0x4000000
+#define PREEMPT_ACTIVE 0x10000000
/*
* thread information flags
#include <asm/addrspace.h> /* for KSEG1ADDR() */
#include <asm/byteorder.h> /* for cpu_to_le32() */
-/* PCI */
-#define TITAN_PCI_BASE 0xbb000000
-
-#define TITAN_WRITE(ofs, data) \
- *(volatile u32 *)(TITAN_PCI_BASE+(ofs)) = cpu_to_le32(data)
-#define TITAN_READ(ofs, data) \
- *(data) = le32_to_cpu(*(volatile u32 *)(TITAN_PCI_BASE+(ofs)))
-#define TITAN_READ_DATA(ofs) \
- le32_to_cpu(*(volatile u32 *)(TITAN_PCI_BASE+(ofs)))
-
-#define TITAN_WRITE_16(ofs, data) \
- *(volatile u16 *)(TITAN_PCI_BASE+(ofs)) = cpu_to_le16(data)
-#define TITAN_READ_16(ofs, data) \
- *(data) = le16_to_cpu(*(volatile u16 *)(TITAN_PCI_BASE+(ofs)))
-
-#define TITAN_WRITE_8(ofs, data) \
- *(volatile u8 *)(TITAN_PCI_BASE+(ofs)) = data
-#define TITAN_READ_8(ofs, data) \
- *(data) = *(volatile u8 *)(TITAN_PCI_BASE+(ofs))
+#define TITAN_READ(ofs) \
+ (*(volatile u32 *)(ocd_base+(ofs)))
+#define TITAN_READ_16(ofs) \
+ (*(volatile u16 *)(ocd_base+(ofs)))
+#define TITAN_READ_8(ofs) \
+ (*(volatile u8 *)(ocd_base+(ofs)))
+
+#define TITAN_WRITE(ofs, data) \
+ do { *(volatile u32 *)(ocd_base+(ofs)) = (data); } while (0)
+#define TITAN_WRITE_16(ofs, data) \
+ do { *(volatile u16 *)(ocd_base+(ofs)) = (data); } while (0)
+#define TITAN_WRITE_8(ofs, data) \
+ do { *(volatile u8 *)(ocd_base+(ofs)) = (data); } while (0)
/*
* PCI specific defines
/*
* HT specific defines
*/
-#define RM9000x2_HTLINK_REG 0xbb000644
-#define RM9000x2_BASE_ADDR 0xbb000000
+#define RM9000x2_HTLINK_REG 0xbb000644
+#define RM9000x2_BASE_ADDR 0xbb000000
-#define OCD_BASE 0xfb000000UL
-#define OCD_SIZE 0x3000UL
+#define OCD_BASE 0xfb000000UL
+#define OCD_SIZE 0x3000UL
extern unsigned long ocd_base;
--- /dev/null
+/*
+ * linux/include/asm-mips/tx4927/smsc_fdc37m81x.h
+ *
+ * Interface for smsc fdc48m81x Super IO chip
+ *
+ * Author: MontaVista Software, Inc. source@mvista.com
+ *
+ * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Manish Lachwani, mlachwani@mvista.com
+ */
+
+#ifndef _SMSC_FDC37M81X_H_
+#define _SMSC_FDC37M81X_H_
+
+/* Common Registers */
+#define SMSC_FDC37M81X_CONFIG_INDEX 0x00
+#define SMSC_FDC37M81X_CONFIG_DATA 0x01
+#define SMSC_FDC37M81X_CONF 0x02
+#define SMSC_FDC37M81X_INDEX 0x03
+#define SMSC_FDC37M81X_DNUM 0x07
+#define SMSC_FDC37M81X_DID 0x20
+#define SMSC_FDC37M81X_DREV 0x21
+#define SMSC_FDC37M81X_PCNT 0x22
+#define SMSC_FDC37M81X_PMGT 0x23
+#define SMSC_FDC37M81X_OSC 0x24
+#define SMSC_FDC37M81X_CONFPA0 0x26
+#define SMSC_FDC37M81X_CONFPA1 0x27
+#define SMSC_FDC37M81X_TEST4 0x2B
+#define SMSC_FDC37M81X_TEST5 0x2C
+#define SMSC_FDC37M81X_TEST1 0x2D
+#define SMSC_FDC37M81X_TEST2 0x2E
+#define SMSC_FDC37M81X_TEST3 0x2F
+
+/* Logical device numbers */
+#define SMSC_FDC37M81X_FDD 0x00
+#define SMSC_FDC37M81X_PARALLEL 0x03
+#define SMSC_FDC37M81X_SERIAL1 0x04
+#define SMSC_FDC37M81X_SERIAL2 0x05
+#define SMSC_FDC37M81X_KBD 0x07
+#define SMSC_FDC37M81X_AUXIO 0x08
+#define SMSC_FDC37M81X_NONE 0xff
+
+/* Logical device Config Registers */
+#define SMSC_FDC37M81X_ACTIVE 0x30
+#define SMSC_FDC37M81X_BASEADDR0 0x60
+#define SMSC_FDC37M81X_BASEADDR1 0x61
+#define SMSC_FDC37M81X_INT 0x70
+#define SMSC_FDC37M81X_INT2 0x72
+#define SMSC_FDC37M81X_LDCR_F0 0xF0
+
+/* Chip Config Values */
+#define SMSC_FDC37M81X_CONFIG_ENTER 0x55
+#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
+#define SMSC_FDC37M81X_CHIP_ID 0x4d
+
+unsigned long __init smsc_fdc37m81x_init(unsigned long port);
+
+void smsc_fdc37m81x_config_beg(void);
+
+void smsc_fdc37m81x_config_end(void);
+
+void smsc_fdc37m81x_config_set(u8 reg, u8 val);
+
+#endif
/* TX4927 Configuration registers (64-bit registers) */
-#define TX4927_CONFIG_BASE 0xe300
-#define TX4927_CONFIG_CCFG 0xe300
+#define TX4927_CONFIG_BASE 0xe000
+#define TX4927_CONFIG_CCFG 0xe000
#define TX4927_CONFIG_CCFG_RESERVED_42_63 BM_63_42
#define TX4927_CONFIG_CCFG_WDRST BM_41_41
#define TX4927_CONFIG_CCFG_WDREXEN BM_40_40
#define TX4927_CONFIG_CCFG_ENDIAN BM_02_02
#define TX4927_CONFIG_CCFG_ARMODE BM_01_01
#define TX4927_CONFIG_CCFG_ACEHOLD BM_00_00
-#define TX4927_CONFIG_REVID 0xe308
+#define TX4927_CONFIG_REVID 0xe008
#define TX4927_CONFIG_REVID_RESERVED_32_63 BM_32_63
#define TX4927_CONFIG_REVID_PCODE BM_16_31
#define TX4927_CONFIG_REVID_MJERREV BM_12_15
#define TX4927_CONFIG_REVID_MINEREV BM_08_11
#define TX4927_CONFIG_REVID_MJREV BM_04_07
#define TX4927_CONFIG_REVID_MINREV BM_00_03
-#define TX4927_CONFIG_PCFG 0xe310
+#define TX4927_CONFIG_PCFG 0xe010
#define TX4927_CONFIG_PCFG_RESERVED_57_63 BM_57_63
#define TX4927_CONFIG_PCFG_DRVDATA BM_56_56
#define TX4927_CONFIG_PCFG_DRVCB BM_55_55
#define TX4927_CONFIG_PCFG_DMASEL0_SIO1 BM_00_00
#define TX4927_CONFIG_PCFG_DMASEL0_ACLC0 BM_01_01
#define TX4927_CONFIG_PCFG_DMASEL0_ACLC2 BM_00_01
-#define TX4927_CONFIG_TOEA 0xe318
+#define TX4927_CONFIG_TOEA 0xe018
#define TX4927_CONFIG_TOEA_RESERVED_36_63 BM_36_63
#define TX4927_CONFIG_TOEA_TOEA BM_00_35
-#define TX4927_CONFIG_CLKCTR 0xe320
+#define TX4927_CONFIG_CLKCTR 0xe020
#define TX4927_CONFIG_CLKCTR_RESERVED_26_63 BM_26_63
#define TX4927_CONFIG_CLKCTR_ACLCKD BM_25_25
#define TX4927_CONFIG_CLKCTR_PIOCKD BM_24_24
#define TX4927_CONFIG_CLKCTR_TM2RST BM_02_02
#define TX4927_CONFIG_CLKCTR_SIO0RST BM_01_01
#define TX4927_CONFIG_CLKCTR_SIO1RST BM_00_00
-#define TX4927_CONFIG_GARBC 0xe330
+#define TX4927_CONFIG_GARBC 0xe030
#define TX4927_CONFIG_GARBC_RESERVED_10_63 BM_10_63
#define TX4927_CONFIG_GARBC_SET_09 BM_09_09
#define TX4927_CONFIG_GARBC_ARBMD BM_08_08
#define TX4927_CONFIG_GARBC_PRIORITY_H3_PDMAC BM_00_00
#define TX4927_CONFIG_GARBC_PRIORITY_H3_DMAC BM_01_01
#define TX4927_CONFIG_GARBC_PRIORITY_H3_BAD_VALUE BM_00_01
-#define TX4927_CONFIG_RAMP 0xe348
+#define TX4927_CONFIG_RAMP 0xe048
#define TX4927_CONFIG_RAMP_RESERVED_20_63 BM_20_63
#define TX4927_CONFIG_RAMP_RAMP BM_00_19
#define TX4927_CONFIG_LIMIT 0xefff
#define TX4927_ACLC_ACINTSTS 0xf710
#define TX4927_ACLC_ACINTMSTS 0xf714
#define TX4927_ACLC_ACINTEN 0xf718
-#define TX4927_ACLC_ACINTDIS 0xfR71c
+#define TX4927_ACLC_ACINTDIS 0xf71c
#define TX4927_ACLC_ACSEMAPH 0xf720
#define TX4927_ACLC_ACGPIDAT 0xf740
#define TX4927_ACLC_ACGPODAT 0xf744
#define _ASM_UACCESS_H
#include <linux/config.h>
-#include <linux/compiler.h>
+#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/thread_info.h>
#include <asm-generic/uaccess.h>
* for 32 bit mode and old iron.
*/
#ifdef __mips64
-#define __GET_USER_DW __get_user_asm("ld")
+#define __GET_USER_DW(__gu_err) __get_user_asm("ld", __gu_err)
#else
-#define __GET_USER_DW __get_user_asm_ll32
+#define __GET_USER_DW(__gu_err) __get_user_asm_ll32(__gu_err)
#endif
-#define __get_user_nocheck(x,ptr,size) \
-({ \
- long __gu_err; \
- __typeof(*(ptr)) __gu_val; \
- long __gu_addr; \
- might_sleep(); \
- __asm__("":"=r" (__gu_val)); \
- __gu_addr = (long) (ptr); \
- __asm__("":"=r" (__gu_err)); \
- switch (size) { \
- case 1: __get_user_asm("lb"); break; \
- case 2: __get_user_asm("lh"); break; \
- case 4: __get_user_asm("lw"); break; \
- case 8: __GET_USER_DW; break; \
- default: __get_user_unknown(); break; \
- } x = (__typeof__(*(ptr))) __gu_val; __gu_err; \
+#define __get_user_nocheck(x,ptr,size) \
+({ \
+ long __gu_err = 0; \
+ __typeof(*(ptr)) __gu_val = 0; \
+ long __gu_addr; \
+ might_sleep(); \
+ __gu_addr = (long) (ptr); \
+ switch (size) { \
+ case 1: __get_user_asm("lb", __gu_err); break; \
+ case 2: __get_user_asm("lh", __gu_err); break; \
+ case 4: __get_user_asm("lw", __gu_err); break; \
+ case 8: __GET_USER_DW(__gu_err); break; \
+ default: __get_user_unknown(); break; \
+ } \
+ x = (__typeof__(*(ptr))) __gu_val; \
+ __gu_err; \
})
#define __get_user_check(x,ptr,size) \
({ \
+ __typeof__(*(ptr)) __gu_val = 0; \
+ long __gu_addr = (long) (ptr); \
long __gu_err; \
- __typeof__(*(ptr)) __gu_val; \
- long __gu_addr; \
+ \
might_sleep(); \
- __asm__("":"=r" (__gu_val)); \
- __gu_addr = (long) (ptr); \
- __asm__("":"=r" (__gu_err)); \
- if (access_ok(VERIFY_READ,__gu_addr,size)) { \
+ __gu_err = verify_area(VERIFY_READ, (void *) __gu_addr, size); \
+ \
+ if (likely(!__gu_err)) { \
switch (size) { \
- case 1: __get_user_asm("lb"); break; \
- case 2: __get_user_asm("lh"); break; \
- case 4: __get_user_asm("lw"); break; \
- case 8: __GET_USER_DW; break; \
+ case 1: __get_user_asm("lb", __gu_err); break; \
+ case 2: __get_user_asm("lh", __gu_err); break; \
+ case 4: __get_user_asm("lw", __gu_err); break; \
+ case 8: __GET_USER_DW(__gu_err); break; \
default: __get_user_unknown(); break; \
} \
- } x = (__typeof__(*(ptr))) __gu_val; __gu_err; \
+ } \
+ x = (__typeof__(*(ptr))) __gu_val; \
+ __gu_err; \
})
-#define __get_user_asm(insn) \
+#define __get_user_asm(insn,__gu_err) \
({ \
__asm__ __volatile__( \
- "1:\t" insn "\t%1,%2\n\t" \
- "move\t%0,$0\n" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "move\t%1,$0\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- __UA_ADDR "\t1b,3b\n\t" \
- ".previous" \
- :"=r" (__gu_err), "=r" (__gu_val) \
- :"o" (__m(__gu_addr)), "i" (-EFAULT)); \
+ "1: " insn " %1, %3 \n" \
+ "2: \n" \
+ " .section .fixup,\"ax\" \n" \
+ "3: li %0, %4 \n" \
+ " j 2b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " "__UA_ADDR "\t1b, 3b \n" \
+ " .previous \n" \
+ : "=r" (__gu_err), "=r" (__gu_val) \
+ : "0" (__gu_err), "o" (__m(__gu_addr)), "i" (-EFAULT)); \
})
/*
* Get a long long 64 using 32 bit registers.
*/
-#define __get_user_asm_ll32 \
+#define __get_user_asm_ll32(__gu_err) \
({ \
__asm__ __volatile__( \
- "1:\tlw\t%1,%2\n" \
- "2:\tlw\t%D1,%3\n\t" \
- "move\t%0,$0\n" \
- "3:\t.section\t.fixup,\"ax\"\n" \
- "4:\tli\t%0,%4\n\t" \
- "move\t%1,$0\n\t" \
- "move\t%D1,$0\n\t" \
- "j\t3b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- __UA_ADDR "\t1b,4b\n\t" \
- __UA_ADDR "\t2b,4b\n\t" \
- ".previous" \
- :"=r" (__gu_err), "=&r" (__gu_val) \
- :"o" (__m(__gu_addr)), "o" (__m(__gu_addr + 4)), \
- "i" (-EFAULT)); \
+ "1: lw %1, %3 \n" \
+ "2: lw %D1, %4 \n" \
+ " move %0, $0 \n" \
+ "3: .section .fixup,\"ax\" \n" \
+ "4: li %0, %5 \n" \
+ " move %1, $0 \n" \
+ " move %D1, $0 \n" \
+ " j 3b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " " __UA_ADDR " 1b, 4b \n" \
+ " " __UA_ADDR " 2b, 4b \n" \
+ " .previous \n" \
+ : "=r" (__gu_err), "=&r" (__gu_val) \
+ : "0" (__gu_err), "o" (__m(__gu_addr)), \
+ "o" (__m(__gu_addr + 4)), "i" (-EFAULT)); \
})
extern void __get_user_unknown(void);
* for 32 bit mode and old iron.
*/
#ifdef __mips64
-#define __PUT_USER_DW __put_user_asm("sd")
+#define __PUT_USER_DW(__pu_val) __put_user_asm("sd", __pu_val)
#else
-#define __PUT_USER_DW __put_user_asm_ll32
+#define __PUT_USER_DW(__pu_val) __put_user_asm_ll32(__pu_val)
#endif
#define __put_user_nocheck(x,ptr,size) \
({ \
- long __pu_err; \
+ long __pu_err = 0; \
__typeof__(*(ptr)) __pu_val; \
long __pu_addr; \
might_sleep(); \
__pu_val = (x); \
__pu_addr = (long) (ptr); \
- __asm__("":"=r" (__pu_err)); \
switch (size) { \
- case 1: __put_user_asm("sb"); break; \
- case 2: __put_user_asm("sh"); break; \
- case 4: __put_user_asm("sw"); break; \
- case 8: __PUT_USER_DW; break; \
+ case 1: __put_user_asm("sb", __pu_val); break; \
+ case 2: __put_user_asm("sh", __pu_val); break; \
+ case 4: __put_user_asm("sw", __pu_val); break; \
+ case 8: __PUT_USER_DW(__pu_val); break; \
default: __put_user_unknown(); break; \
} \
__pu_err; \
#define __put_user_check(x,ptr,size) \
({ \
+ __typeof__(*(ptr)) __pu_val = (x); \
+ long __pu_addr = (long) (ptr); \
long __pu_err; \
- __typeof__(*(ptr)) __pu_val; \
- long __pu_addr; \
+ \
might_sleep(); \
- __pu_val = (x); \
- __pu_addr = (long) (ptr); \
- __asm__("":"=r" (__pu_err)); \
- if (access_ok(VERIFY_WRITE, __pu_addr, size)) { \
+ __pu_err = verify_area(VERIFY_WRITE, (void *) __pu_addr, size); \
+ \
+ if (likely(!__pu_err)) { \
switch (size) { \
- case 1: __put_user_asm("sb"); break; \
- case 2: __put_user_asm("sh"); break; \
- case 4: __put_user_asm("sw"); break; \
- case 8: __PUT_USER_DW; break; \
+ case 1: __put_user_asm("sb", __pu_val); break; \
+ case 2: __put_user_asm("sh", __pu_val); break; \
+ case 4: __put_user_asm("sw", __pu_val); break; \
+ case 8: __PUT_USER_DW(__pu_val); break; \
default: __put_user_unknown(); break; \
} \
} \
__pu_err; \
})
-#define __put_user_asm(insn) \
+#define __put_user_asm(insn, __pu_val) \
({ \
__asm__ __volatile__( \
- "1:\t" insn "\t%z1, %2\t\t\t# __put_user_asm\n\t" \
- "move\t%0, $0\n" \
- "2:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "3:\tli\t%0,%3\n\t" \
- "j\t2b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- __UA_ADDR "\t1b,3b\n\t" \
- ".previous" \
- :"=r" (__pu_err) \
- :"Jr" (__pu_val), "o" (__m(__pu_addr)), "i" (-EFAULT)); \
+ "1: " insn " %z2, %3 # __put_user_asm\n" \
+ "2: \n" \
+ " .section .fixup,\"ax\" \n" \
+ "3: li %0, %4 \n" \
+ " j 2b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " " __UA_ADDR " 1b, 3b \n" \
+ " .previous \n" \
+ : "=r" (__pu_err) \
+ : "0" (__pu_err), "Jr" (__pu_val), "o" (__m(__pu_addr)), \
+ "i" (-EFAULT)); \
})
-#define __put_user_asm_ll32 \
+#define __put_user_asm_ll32(__pu_val) \
({ \
__asm__ __volatile__( \
- "1:\tsw\t%1, %2\t\t\t# __put_user_asm_ll32\n\t" \
- "2:\tsw\t%D1, %3\n" \
- "move\t%0, $0\n" \
- "3:\n\t" \
- ".section\t.fixup,\"ax\"\n" \
- "4:\tli\t%0,%4\n\t" \
- "j\t3b\n\t" \
- ".previous\n\t" \
- ".section\t__ex_table,\"a\"\n\t" \
- __UA_ADDR "\t1b,4b\n\t" \
- __UA_ADDR "\t2b,4b\n\t" \
- ".previous" \
- :"=r" (__pu_err) \
- :"r" (__pu_val), "o" (__m(__pu_addr)), \
- "o" (__m(__pu_addr + 4)), "i" (-EFAULT)); \
+ "1: sw %2, %3 # __put_user_asm_ll32 \n" \
+ "2: sw %D2, %4 \n" \
+ "3: \n" \
+ " .section .fixup,\"ax\" \n" \
+ "4: li %0, %5 \n" \
+ " j 3b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " " __UA_ADDR " 1b, 4b \n" \
+ " " __UA_ADDR " 2b, 4b \n" \
+ " .previous" \
+ : "=r" (__pu_err) \
+ : "0" (__pu_err), "r" (__pu_val), "o" (__m(__pu_addr)), \
+ "o" (__m(__pu_addr + 4)), "i" (-EFAULT)); \
})
extern void __put_user_unknown(void);
".set\tnoat\n\t" \
__UA_ADDU "\t$1, %1, %2\n\t" \
".set\tat\n\t" \
- ".set\treorder\n\t" \
- "move\t%0, $6" /* XXX */ \
+ ".set\treorder" \
: "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) \
: \
: "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", \
#define __NR_mq_notify (__NR_Linux + 275)
#define __NR_mq_getsetattr (__NR_Linux + 276)
#define __NR_vserver (__NR_Linux + 277)
+#define __NR_waitid (__NR_Linux + 278)
+/* #define __NR_sys_setaltroot (__NR_Linux + 279) */
+#define __NR_add_key (__NR_Linux + 280)
+#define __NR_request_key (__NR_Linux + 281)
+#define __NR_keyctl (__NR_Linux + 282)
/*
* Offset of the last Linux o32 flavoured syscall
*/
-#define __NR_Linux_syscalls 277
+#define __NR_Linux_syscalls 282
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
#define __NR_O32_Linux 4000
-#define __NR_O32_Linux_syscalls 277
+#define __NR_O32_Linux_syscalls 282
#if _MIPS_SIM == _MIPS_SIM_ABI64
#define __NR_mq_notify (__NR_Linux + 234)
#define __NR_mq_getsetattr (__NR_Linux + 235)
#define __NR_vserver (__NR_Linux + 236)
+#define __NR_waitid (__NR_Linux + 237)
+/* #define __NR_sys_setaltroot (__NR_Linux + 238) */
+#define __NR_add_key (__NR_Linux + 239)
+#define __NR_request_key (__NR_Linux + 240)
+#define __NR_keyctl (__NR_Linux + 241)
/*
- * Offset of the last Linux flavoured syscall
+ * Offset of the last Linux 64-bit flavoured syscall
*/
-#define __NR_Linux_syscalls 236
+#define __NR_Linux_syscalls 241
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
#define __NR_64_Linux 5000
-#define __NR_64_Linux_syscalls 236
+#define __NR_64_Linux_syscalls 241
#if _MIPS_SIM == _MIPS_SIM_NABI32
#define __NR_mq_notify (__NR_Linux + 238)
#define __NR_mq_getsetattr (__NR_Linux + 239)
#define __NR_vserver (__NR_Linux + 240)
+#define __NR_waitid (__NR_Linux + 241)
+/* #define __NR_sys_setaltroot (__NR_Linux + 242) */
+#define __NR_add_key (__NR_Linux + 243)
+#define __NR_request_key (__NR_Linux + 244)
+#define __NR_keyctl (__NR_Linux + 245)
/*
* Offset of the last N32 flavoured syscall
*/
-#define __NR_Linux_syscalls 240
+#define __NR_Linux_syscalls 245
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
#define __NR_N32_Linux 6000
-#define __NR_N32_Linux_syscalls 240
+#define __NR_N32_Linux_syscalls 245
#ifndef __ASSEMBLY__
".set\treorder" \
: "=&r" (__v0), "=r" (__a3) \
: "i" (__NR_##name) \
- : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
\
if (__a3 == 0) \
return (type) __v0; \
errno = __v0; \
- return -1; \
+ return (type) -1; \
}
/*
".set\treorder" \
: "=&r" (__v0), "=r" (__a3) \
: "r" (__a0), "i" (__NR_##name) \
- : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
\
if (__a3 == 0) \
return (type) __v0; \
errno = __v0; \
- return -1; \
+ return (type) -1; \
}
#define _syscall2(type,name,atype,a,btype,b) \
".set\treorder" \
: "=&r" (__v0), "=r" (__a3) \
: "r" (__a0), "r" (__a1), "i" (__NR_##name) \
- : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
\
if (__a3 == 0) \
return (type) __v0; \
errno = __v0; \
- return -1; \
+ return (type) -1; \
}
#define _syscall3(type,name,atype,a,btype,b,ctype,c) \
".set\treorder" \
: "=&r" (__v0), "=r" (__a3) \
: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
- : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
\
if (__a3 == 0) \
return (type) __v0; \
errno = __v0; \
- return -1; \
+ return (type) -1; \
}
#define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
".set\treorder" \
: "=&r" (__v0), "+r" (__a3) \
: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
- : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
\
if (__a3 == 0) \
return (type) __v0; \
errno = __v0; \
- return -1; \
+ return (type) -1; \
}
#if (_MIPS_SIM == _MIPS_SIM_ABI32)
: "=&r" (__v0), "+r" (__a3) \
: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
"m" ((unsigned long)e) \
- : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
\
if (__a3 == 0) \
return (type) __v0; \
errno = __v0; \
- return -1; \
+ return (type) -1; \
}
#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
: "=&r" (__v0), "+r" (__a3) \
: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
"m" ((unsigned long)e), "m" ((unsigned long)f) \
- : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
\
if (__a3 == 0) \
return (type) __v0; \
errno = __v0; \
- return -1; \
+ return (type) -1; \
}
#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
"syscall\n\t" \
"move\t%0, $2\n\t" \
".set\treorder" \
- : "=&r" (__v0), "+r" (__a3), "+r" (__a4) \
- : "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
- : "$2","$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "=&r" (__v0), "+r" (__a3) \
+ : "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##name) \
+ : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
\
if (__a3 == 0) \
return (type) __v0; \
errno = __v0; \
- return -1; \
+ return (type) -1; \
}
#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
: "=&r" (__v0), "+r" (__a3) \
: "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "r" (__a5), \
"i" (__NR_##name) \
- : "$2","$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24"); \
+ : "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
+ "memory"); \
\
if (__a3 == 0) \
return (type) __v0; \
errno = __v0; \
- return -1; \
+ return (type) -1; \
}
#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
* won't be any messing with the stack from main(), but we define
* some others too.
*/
-static inline _syscall0(pid_t,setsid)
-static inline _syscall3(int,write,int,fd,const char *,buf,off_t,count)
-static inline _syscall3(int,read,int,fd,char *,buf,off_t,count)
-static inline _syscall3(off_t,lseek,int,fd,off_t,offset,int,count)
-static inline _syscall1(int,dup,int,fd)
static inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp)
-static inline _syscall3(int,open,const char *,file,int,flag,int,mode)
-static inline _syscall1(int,close,int,fd)
-struct rusage;
-static inline _syscall4(pid_t,wait4,pid_t,pid,int *,stat_addr,int,options,struct rusage *,ru)
-
-static inline pid_t waitpid(int pid, int * wait_stat, int flags)
-{
- return wait4(pid, wait_stat, flags, NULL);
-}
asmlinkage unsigned long sys_mmap(
unsigned long addr, size_t len,
#define RM9000_CDEX_SMP_WAR 1
#endif
+/*
+ * ON the R10000 upto version 2.6 (not sure about 2.7) there is a bug that
+ * may cause ll / sc and lld / scd sequences to execute non-atomically.
+ */
+#ifdef CONFIG_SGI_IP27
+#define R10000_LLSC_WAR 1
+#endif
+
/*
* Workarounds default to off
*/
#ifndef RM9000_CDEX_SMP_WAR
#define RM9000_CDEX_SMP_WAR 0
#endif
+#ifndef R10000_LLSC_WAR
+#define R10000_LLSC_WAR 0
+#endif
#endif /* _ASM_WAR_H */
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