#define HP_CCSR_LENGTH 0x21
#define HP_CCSR_TYPE 0x2
-#define HP_CCSR_GUID \
- ((efi_guid_t) { 0x69e9adf9, 0x924f, 0xab5f, { 0xf6, 0x4a, 0x24, 0xd2, 0x01, 0x37, 0x0e, 0xad }})
+#define HP_CCSR_GUID EFI_GUID(0x69e9adf9, 0x924f, 0xab5f, \
+ 0xf6, 0x4a, 0x24, 0xd2, 0x01, 0x37, 0x0e, 0xad)
extern acpi_status acpi_get_crs(acpi_handle, acpi_buffer *);
extern acpi_resource *acpi_get_crs_next(acpi_buffer *, int *);
* Drivers should ioremap what they need, but we have to do
* it here, too, so PCI config accesses work.
*/
- dev->mapped_csrs = ioremap(dev->csr_base, dev->csr_size);
+ dev->mapped_csrs = (unsigned long) ioremap(dev->csr_base, dev->csr_size);
return dev;
}
* dedicated ITR for the PAL code.
*/
if ((vaddr & mask) == (KERNEL_START & mask)) {
- printk(__FUNCTION__ ": no need to install ITR for PAL code\n");
+ printk("%s: no need to install ITR for PAL code\n", __FUNCTION__);
continue;
}
printk("No I/O port range found in EFI memory map, falling back to AR.KR0\n");
printk("I/O port base = 0x%lx\n", phys_iobase);
}
- ia64_iobase = ioremap(phys_iobase);
+ ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
#ifdef CONFIG_SMP
cpu_physical_id(0) = hard_smp_processor_id();