S: Germany
N: Joerg Reuter
-E: jreuter@poboxes.com
-W: http://poboxes.com/jreuter/
-W: http://qsl.net/dl1bke/
-D: Generic Z8530 driver, AX.25 DAMA slave implementation
+E: jreuter@yaina.de
+W: http://yaina.de/jreuter
+W: http://www.qsl.net/dl1bke/
+D: Generic Z8530 driver for AX.25, AX.25 DAMA slave implementation
D: Several AX.25 hacks
N: Francois-Rene Rideau
Internet:
=========
-1. ftp://ftp.ccac.rwth-aachen.de/pub/jr/z8530drv-utils-3.0-1.tar.gz
+1. ftp://ftp.ccac.rwth-aachen.de/pub/jr/z8530drv-utils_3.0-3.tar.gz
-2. ftp://ftp.pspt.fi/pub/ham/linux/ax25/z8530drv-utils-3.0-1.tar.gz
-
-3. ftp://ftp.ucsd.edu/hamradio/packet/tcpip/incoming/z8530drv-utils-3.0.tar.gz
- If you can't find it there, try .../tcpip/linux/z8530drv-utils-3.0.tar.gz
+2. ftp://ftp.pspt.fi/pub/ham/linux/ax25/z8530drv-utils_3.0-3.tar.gz
Please note that the information in this document may be hopelessly outdated.
A new version of the documentation, along with links to other important
Linux Kernel AX.25 documentation and programs, is available on
-http://www.rat.de/jr
+http://yaina.de/jreuter
-----------------------------------------------------------------------------
********************************************************************
- (c) 1993,1998 by Joerg Reuter DL1BKE <jreuter@poboxes.com>
+ (c) 1993,2000 by Joerg Reuter DL1BKE <jreuter@yaina.de>
portions (c) 1993 Guido ten Dolle PE1NNZ
Mysteriously this board seems not to work with the driver. Anyone
got it up-and-running?
-
Many thanks to Linus Torvalds and Alan Cox for including the driver
in the Linux standard distribution and their support.
Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org
- AX-25 : DL1BKE @ DB0ACH.#NRW.DEU.EU
- Internet: jreuter@poboxes.com
- WWW : http://www.rat.de/jr/
+ AX-25 : DL1BKE @ DB0ABH.#BAY.DEU.EU
+ Internet: jreuter@yaina.de
+ WWW : http://yaina.de/jreuter
DAMA SLAVE for AX.25
P: Joerg Reuter
-M: jreuter@poboxes.com
-W: http://poboxes.com/jreuter/
-W: http://qsl.net/dl1bke/
+M: jreuter@yaina.de
+W: http://yaina.de/jreuter
+W: http://www.qsl.net/dl1bke/
L: linux-hams@vger.kernel.org
S: Maintained
W: http://suburbia.net/~billm/floating-point/emulator/
S: Maintained
+FRAME DIVERTER
+P: Benoit Locher
+M: Benoit.Locher@skf.com
+W: http://perso.wanadoo.fr/magpie/EtherDivert.html
+S: Maintained
+
FRAME RELAY DLCI/FRAD (Sangoma drivers too)
P: Mike McLagan
M: mike.mclagan@linux.org
Z8530 DRIVER FOR AX.25
P: Joerg Reuter
-M: jreuter@poboxes.com
-W: http://poboxes.com/jreuter/
-W: http://qsl.net/dl1bke/
+M: jreuter@yaina.de
+W: http://yaina.de/jreuter
+W: http://www.qsl.net/dl1bke/
L: linux-hams@vger.kernel.org
S: Maintained
VERSION = 2
PATCHLEVEL = 2
SUBLEVEL = 18
-EXTRAVERSION = pre16
+EXTRAVERSION = pre17
ARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
return 0;
}
-#ifdef MODULE
static void cpuid_exit(void)
{
}
-int init_module (void)
-{
- return cpuid_init();
-}
-void cleanup_module (void)
-{
- cpuid_exit();
-}
-#endif
+module_init(cpuid_init);
+module_exit(cpuid_exit);
EXPORT_NO_SYMBOLS;
return 0;
}
-#ifdef MODULE
static void msr_exit(void)
{
}
-int init_module(void)
-{
- return msr_init();
-}
-void cleanup_module(void)
-{
- msr_exit();
-}
-#endif
+module_init(msr_init);
+module_exit(msr_exit);
MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
MODULE_DESCRIPTION("x86 generic MSR driver");
-/* $Id: sys_sparc32.c,v 1.107.2.13 2000/09/14 10:39:24 davem Exp $
+/* $Id: sys_sparc32.c,v 1.107.2.14 2000/10/10 04:50:50 davem Exp $
* sys_sparc32.c: Conversion between 32bit and 64bit native syscalls.
*
* Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
/*
* count32() counts the number of arguments/envelopes
*/
-static int count32(u32 * argv)
+static int count32(u32 * argv, int max)
{
int i = 0;
u32 p; int error;
error = get_user(p,argv);
- if (error) return error;
- if (!p) break;
- argv++; i++;
+ if (error)
+ return error;
+ if (!p)
+ break;
+ argv++;
+ if (++i > max)
+ return -E2BIG;
}
}
return i;
{
u32 str;
- if (!p) return 0; /* bullet-proofing */
+ if ((long)p <= 0)
+ return p; /* bullet-proofing */
while (argc-- > 0) {
int len;
unsigned long pos;
get_user(str, argv+argc);
- if (!str) panic("VFS: argc is wrong");
- len = strlen_user((char *)A(str)); /* includes the '\0' */
- if (p < len) /* this shouldn't happen - 128kB */
- return 0;
- p -= len; pos = p;
- while (len) {
+ if (!str)
+ return -EFAULT;
+
+ len = strnlen_user((char *)A(str), p); /* includes the '\0' */
+ if (!len)
+ return -EFAULT;
+ if (len > p)
+ return -E2BIG;
+ p -= len;
+ pos = p;
+ while (len > 0) {
char *pag;
int offset, bytes_to_copy;
bprm.java = 0;
bprm.loader = 0;
bprm.exec = 0;
- if ((bprm.argc = count32(argv)) < 0) {
+ if ((bprm.argc = count32(argv, bprm.p / sizeof(u32))) < 0) {
dput(dentry);
return bprm.argc;
}
- if ((bprm.envc = count32(envp)) < 0) {
+ if ((bprm.envc = count32(envp, bprm.p / sizeof(u32))) < 0) {
dput(dentry);
return bprm.envc;
}
bprm.exec = bprm.p;
bprm.p = copy_strings32(bprm.envc,envp,bprm.page,bprm.p);
bprm.p = copy_strings32(bprm.argc,argv,bprm.page,bprm.p);
- if (!bprm.p)
- retval = -E2BIG;
+ if ((long)bprm.p < 0)
+ retval = (int) bprm.p;
}
- if(retval>=0)
+ if (retval >= 0)
retval = search_binary_handler(&bprm,regs);
if(retval>=0)
/* execve success */
output.queue_ID = elevator->queue_ID;
output.read_latency = elevator->read_latency;
output.write_latency = elevator->write_latency;
- output.max_bomb_segments = elevator->max_bomb_segments;
+ output.max_bomb_segments = 0;
ret = -EFAULT;
if (copy_to_user(arg, &output, sizeof(blkelv_ioctl_arg_t)))
goto out;
if (input.write_latency < 0)
goto out;
- if (input.max_bomb_segments <= 0)
- goto out;
elevator->read_latency = input.read_latency;
elevator->write_latency = input.write_latency;
- elevator->max_bomb_segments = input.max_bomb_segments;
ret = 0;
out:
return -EINVAL;
}
-static inline int seek_to_not_starving_chunk(struct request ** req, int * lat)
+static inline struct request * seek_to_not_starving_chunk(struct request * req)
{
- struct request * tmp = *req;
- int found = 0, pos = 0;
- int last_pos = 0, __lat = *lat;
+ struct request * tmp = req;
- do {
- if (tmp->elevator_latency <= 0)
- {
- *req = tmp;
- found = 1;
- last_pos = pos;
- if (last_pos >= __lat)
- break;
- }
- pos += tmp->nr_segments;
- } while ((tmp = tmp->next));
- *lat -= last_pos;
+ while ((tmp = tmp->next))
+ if ((tmp->cmd != READ && tmp->cmd != WRITE) || !tmp->elevator_latency)
+ req = tmp;
- return found;
+ return req;
}
#define CASE_COALESCE_BUT_FIRST_REQUEST_MAYBE_BUSY \
#define elevator_starve_rest_of_queue(req) \
do { \
struct request * tmp = (req); \
- for ((tmp) = (tmp)->next; (tmp); (tmp) = (tmp)->next) \
- (tmp)->elevator_latency--; \
+ for ((tmp) = (tmp)->next; (tmp); (tmp) = (tmp)->next) { \
+ if ((tmp)->cmd != READ && (tmp)->cmd != WRITE) \
+ continue; \
+ if (--(tmp)->elevator_latency < 0) \
+ panic("elevator_starve_rest_of_queue"); \
+ } \
} while (0)
static inline void elevator_queue(struct request * req,
- struct request * tmp,
- int latency,
- struct blk_dev_struct * dev,
- struct request ** queue_head)
+ struct request * tmp)
{
- struct request * __tmp;
- int starving, __latency;
-
- starving = seek_to_not_starving_chunk(&tmp, &latency);
- __tmp = tmp;
- __latency = latency;
-
- for (;; tmp = tmp->next)
- {
- if ((latency -= tmp->nr_segments) <= 0)
- {
- tmp = __tmp;
- latency = __latency - tmp->nr_segments;
-
- if (starving)
- break;
-
- switch (MAJOR(req->rq_dev))
- {
- CASE_COALESCE_BUT_FIRST_REQUEST_MAYBE_BUSY
- if (tmp == dev->current_request)
- default:
- goto link;
- CASE_COALESCE_ALSO_FIRST_REQUEST
- }
-
- latency += tmp->nr_segments;
- req->next = tmp;
- *queue_head = req;
- goto after_link;
- }
-
- if (!tmp->next)
- break;
-
+ for (tmp = seek_to_not_starving_chunk(tmp); tmp->next; tmp = tmp->next) {
{
const int after_current = IN_ORDER(tmp,req);
const int before_next = IN_ORDER(req,tmp->next);
}
}
- link:
req->next = tmp->next;
tmp->next = req;
- after_link:
- req->elevator_latency = latency;
-
elevator_starve_rest_of_queue(req);
}
short disk_index;
unsigned long flags;
int queue_new_request = 0;
- int latency;
switch (major) {
case DAC960_MAJOR+0:
if (disk_index >= 0 && disk_index < 4)
drive_stat_acct(req->cmd, req->nr_sectors, disk_index);
- latency = get_request_latency(&dev->elevator, req->cmd);
+ req->elevator_latency = get_request_latency(&dev->elevator, req->cmd);
/*
* We use the goto to reduce locking complexity
mark_buffer_clean(req->bh);
if (!(tmp = *current_request)) {
req->next = NULL;
- req->elevator_latency = latency;
*current_request = req;
if (dev->current_request != &dev->plug)
queue_new_request = 1;
goto out;
}
- elevator_queue(req, tmp, latency, dev, current_request);
+ elevator_queue(req, tmp);
/* for SCSI devices, call request_fn unconditionally */
if (scsi_blk_major(major) ||
wake_up (&wait_for_request);
}
-#define read_pendings(req) \
-({ \
- int __ret = 0; \
- struct request * tmp = (req); \
- do { \
- if (tmp->cmd == READ) \
- { \
- __ret = 1; \
- break; \
- } \
- tmp = tmp->next; \
- } while (tmp); \
- __ret; \
-})
-
void make_request(int major, int rw, struct buffer_head * bh)
{
unsigned int sector, count;
struct request * req, * prev;
int rw_ahead, max_req, max_sectors, max_segments;
unsigned long flags;
- int latency, starving;
+ int back, front;
count = bh->b_size >> 9;
sector = bh->b_rsector;
max_sectors = get_max_sectors(bh->b_rdev);
max_segments = get_max_segments(bh->b_rdev);
- latency = get_request_latency(&blk_dev[major].elevator, rw);
-
/*
* Now we acquire the request spinlock, we have to be mega careful
* not to schedule or do something nonatomic
* entry may be busy being processed and we thus can't change it.
*/
if (req == blk_dev[major].current_request)
- {
if (!(req = req->next))
break;
- latency -= req->nr_segments;
- }
/* fall through */
CASE_COALESCE_ALSO_FIRST_REQUEST
- /* avoid write-bombs to not hurt iteractiveness of reads */
- if (rw != READ && read_pendings(req))
- max_segments = blk_dev[major].elevator.max_bomb_segments;
-
- starving = seek_to_not_starving_chunk(&req, &latency);
+ req = seek_to_not_starving_chunk(req);
prev = NULL;
+ back = front = 0;
do {
- if (req->sem)
- continue;
if (req->cmd != rw)
continue;
+ if (req->rq_dev != bh->b_rdev)
+ continue;
+ if (req->sector + req->nr_sectors == sector)
+ back = 1;
+ else if (req->sector - count == sector)
+ front = 1;
+
if (req->nr_sectors + count > max_sectors)
continue;
- if (req->rq_dev != bh->b_rdev)
+ if (req->sem)
continue;
+
/* Can we add it to the end of this request? */
- if (req->sector + req->nr_sectors == sector) {
- if (latency - req->nr_segments < 0)
- break;
+ if (back) {
if (req->bhtail->b_data + req->bhtail->b_size
!= bh->b_data) {
if (req->nr_segments < max_segments)
req->bhtail = bh;
req->nr_sectors += count;
- /* latency stuff */
- if ((latency -= req->nr_segments) < req->elevator_latency)
- req->elevator_latency = latency;
elevator_starve_rest_of_queue(req);
/* Can we now merge this req with the next? */
attempt_merge(req, max_sectors, max_segments);
/* or to the beginning? */
- } else if (req->sector - count == sector) {
- if (!prev && starving)
+ } else if (front) {
+ /*
+ * Check that we didn't seek on a starving request,
+ * that could happen only at the first pass, thus
+ * do that only if prev is NULL.
+ */
+ if (!prev && ((req->cmd != READ && req->cmd != WRITE) || !req->elevator_latency))
break;
if (bh->b_data + bh->b_size
!= req->bh->b_data) {
req->nr_sectors += count;
/* latency stuff */
- if (latency < --req->elevator_latency)
- req->elevator_latency = latency;
+ --req->elevator_latency;
+
elevator_starve_rest_of_queue(req);
if (prev)
return;
} while (prev = req,
- (latency -= req->nr_segments) >= 0 && (req = req->next) != NULL);
+ !front && !back && (req = req->next) != NULL);
}
/* find an unused request. */
#ifndef _AGP_BACKEND_PRIV_H
#define _AGP_BACKEND_PRIV_H 1
+#include <asm/io.h>
+
enum aper_size_type {
U8_APER_SIZE,
U16_APER_SIZE,
void (*free_by_type) (agp_memory *);
};
-#define OUTREG32(mmap, addr, val) *(volatile u32 *)(mmap + (addr)) = (val)
-#define OUTREG16(mmap, addr, val) *(volatile u16 *)(mmap + (addr)) = (val)
-#define OUTREG8 (mmap, addr, val) *(volatile u8 *) (mmap + (addr)) = (val)
+#define OUTREG32(mmap, addr, val) writel((val),(mmap + (addr)))
+#define OUTREG16(mmap, addr, val) writew((val),(mmap + (addr)))
+#define OUTREG8 (mmap, addr, val) writeb((val),(mmap + (addr)))
-#define INREG32(mmap, addr) *(volatile u32 *)(mmap + (addr))
-#define INREG16(mmap, addr) *(volatile u16 *)(mmap + (addr))
-#define INREG8 (mmap, addr) *(volatile u8 *) (mmap + (addr))
+#define INREG32(mmap, addr) readl(mmap + (addr))
+#define INREG16(mmap, addr) readw(mmap + (addr))
+#define INREG8 (mmap, addr) readb(mmap + (addr))
#define CACHE_FLUSH agp_bridge.cache_flush
#define A_SIZE_8(x) ((aper_size_info_8 *) x)
# File: drivers/hamradio/Makefile
#
# Makefile for the Linux AX.25 and HFMODEM device drivers.
-#
-# 19971130 Moved the amateur radio related network drivers from
-# drivers/net/ to drivers/hamradio for easier maintainance.
-# Joerg Reuter DL1BKE <jreuter@poboxes.com>
SUB_DIRS :=
#ifdef MODULE
EXPORT_NO_SYMBOLS;
-MODULE_AUTHOR("Joerg Reuter DL1BKE <jreuter@lykos.oche.de>");
+MODULE_AUTHOR("Joerg Reuter DL1BKE <jreuter@yaina.de>");
MODULE_DESCRIPTION("Transmit and receive AX.25 packets over Ethernet");
int init_module(void)
********************************************************************
- Copyright (c) 1993, 1998 Joerg Reuter DL1BKE
+ Copyright (c) 1993, 2000 Joerg Reuter DL1BKE
portions (c) 1993 Guido ten Dolle PE1NNZ
vy 73,
Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org
- AX-25 : DL1BKE @ DB0ACH.#NRW.DEU.EU
- Internet: jreuter@poboxes.com
- www : http://poboxes.com/jreuter/
+ AX-25 : DL1BKE @ DB0ABH.#BAY.DEU.EU
+ Internet: jreuter@yaina.de
+ www : http://yaina.de/jreuter/
*/
/* ----------------------------------------------------------------------- */
static int Nchips = 0;
static io_port Vector_Latch = 0;
-MODULE_AUTHOR("Joerg Reuter <jreuter@poboxes.com>");
+MODULE_AUTHOR("Joerg Reuter <jreuter@yaina.de>");
MODULE_DESCRIPTION("Network Device Driver for Z8530 based HDLC cards for Amateur Packet Radio");
MODULE_SUPPORTED_DEVICE("scc");
result = scc_init();
if (result == 0)
- printk(KERN_INFO "Copyright 1993,1998 Joerg Reuter DL1BKE (jreuter@poboxes.com)\n");
+ printk(KERN_INFO "Copyright 1993,2000 Joerg Reuter DL1BKE (jreuter@yaina.de)\n");
return result;
}
unsigned int pBA0phys, pBA1phys;
char *pBA0, *pBA1;
unsigned int irq;
- int endofbuffer;
// mixer registers
struct {
static void cs4281_update_ptr(struct cs4281_state *s)
{
int diff;
- unsigned hwptr, va, temp1;
+ unsigned hwptr, va;
// update ADC pointer
if (s->ena & FMODE_READ) {
// check for end of buffer, means that we are going to wait for another interrupt
// to allow silence to fill the fifos on the part, to keep pops down to a minimum.
//
- if ( (s->ena & FMODE_WRITE) && (!s->endofbuffer) )
+ if (s->ena & FMODE_WRITE)
{
hwptr = readl(s->pBA0+BA0_DCA0); // Read play DMA address.
va = virt_to_bus(s->dma_dac.rawbuf);
} else {
s->dma_dac.count -= diff;
if (s->dma_dac.count <= 0) {
- s->ena &= ~FMODE_WRITE;
- temp1 = readl(s->pBA0+BA0_DCR0);
//
- // fill with silence, and wait on turning off the DAC until interrupt routine.
- // wait on "Poke(pBA0+BA0_DCR0, temp1 | DCRn_MSK); // Stop Play DMA"
+ // fill with silence, and do not shut down the DAC.
+ // Continue to play silence until the _release.
//
memset(s->dma_dac.rawbuf, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0x80 : 0,
s->dma_dac.dmasize);
- s->endofbuffer = 1;
} else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize
&& !s->dma_dac.endcleared) {
clear_advance(s->dma_dac.rawbuf,
s->rate = 8000;
s->clkdiv = 96 | 0x80;
s->ena = 0;
- s->endofbuffer = 0;
s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
writel(HICR_IEV| HICR_CHGM, s->pBA0+BA0_HICR); // Local EOI
spin_lock(&s->lock);
- //
- // ok, at this point we assume that the fifos have been filled
- // with silence and so we now turn off the DMA engine.
- // if FMODE_WRITE is set that means that some thread
- // attempted to start_dac, which probably means that an open
- // occurred, so do not stop the dac in this case.
- //
- if(s->endofbuffer && !(s->ena & FMODE_WRITE))
- {
- writel(temp1|DCRn_MSK, s->pBA0+BA0_DCR0); // Stop Play DMA
- s->endofbuffer = 0;
- }
- else
- {
- cs4281_update_ptr(s);
- }
+ cs4281_update_ptr(s);
cs4281_handle_midi(s);
spin_unlock(&s->lock);
}
mask = 0;
printk(KERN_ERR "usbin_completed: panic: unknown URB\n");
}
+ urb->dev = as->state->usbdev;
spin_lock_irqsave(&as->lock, flags);
if (!usbin_retire_desc(u, urb) &&
u->flags & FLG_RUNNING &&
mask = 0;
printk(KERN_ERR "usbin_sync_completed: panic: unknown URB\n");
}
+ urb->dev = as->state->usbdev;
spin_lock_irqsave(&as->lock, flags);
if (!usbin_sync_retire_desc(u, urb) &&
u->flags & FLG_RUNNING &&
mask = 0;
printk(KERN_ERR "usbout_completed: panic: unknown URB\n");
}
+ urb->dev = as->state->usbdev;
spin_lock_irqsave(&as->lock, flags);
if (!usbout_retire_desc(u, urb) &&
u->flags & FLG_RUNNING &&
mask = 0;
printk(KERN_ERR "usbout_sync_completed: panic: unknown URB\n");
}
+ urb->dev = as->state->usbdev;
spin_lock_irqsave(&as->lock, flags);
if (!usbout_sync_retire_desc(u, urb) &&
u->flags & FLG_RUNNING &&
init_waitqueue_head(&as->usbin.dma.wait);
init_waitqueue_head(&as->usbout.dma.wait);
spin_lock_init(&as->lock);
+ spin_lock_init(&as->usbin.durb[0].urb.lock);
+ spin_lock_init(&as->usbin.durb[1].urb.lock);
+ spin_lock_init(&as->usbin.surb[0].urb.lock);
+ spin_lock_init(&as->usbin.surb[1].urb.lock);
+ spin_lock_init(&as->usbout.durb[0].urb.lock);
+ spin_lock_init(&as->usbout.durb[1].urb.lock);
+ spin_lock_init(&as->usbout.surb[0].urb.lock);
+ spin_lock_init(&as->usbout.surb[1].urb.lock);
as->state = s;
as->usbin.interface = asifin;
as->usbout.interface = asifout;
#endif
{ "udp", ~NFS_MOUNT_TCP, 0 },
{ "tcp", ~NFS_MOUNT_TCP, NFS_MOUNT_TCP },
+ { "broken_suid",~NFS_MOUNT_BROKEN_SUID, NFS_MOUNT_BROKEN_SUID },
{ NULL, 0, 0 }
};
if (error < 0)
goto failure;
-#if 0 /* Don't even pretend that TCP works. It doesn't. */
error = svc_makesock(serv, IPPROTO_TCP, port);
if (error < 0)
goto failure;
-#endif
nfsd_racache_init(); /* Readahead param cache */
while ((err = svc_recv(serv, rqstp,
MAX_SCHEDULE_TIMEOUT)) == -EAGAIN)
;
- if (err < 0)
- break;
+
+ if (err < 0)
+ break;
+
/* Lock the export hash tables for reading. */
exp_readlock();
+++ /dev/null
-/*
- * ADB through the IOP
- * Written by Joshua M. Thompson
- */
-
-/* IOP number and channel number for ADB */
-
-#define ADB_IOP IOP_NUM_ISM
-#define ADB_CHAN 2
-
-/* From the A/UX headers...maybe important, maybe not */
-
-#define ADB_IOP_LISTEN 0x01
-#define ADB_IOP_TALK 0x02
-#define ADB_IOP_EXISTS 0x04
-#define ADB_IOP_FLUSH 0x08
-#define ADB_IOP_RESET 0x10
-#define ADB_IOP_INT 0x20
-#define ADB_IOP_POLL 0x40
-#define ADB_IOP_UNINT 0x80
-
-#define AIF_RESET 0x00
-#define AIF_FLUSH 0x01
-#define AIF_LISTEN 0x08
-#define AIF_TALK 0x0C
-
-/* Flag bits in struct adb_iopmsg */
-
-#define ADB_IOP_EXPLICIT 0x80 /* nonzero if explicit command */
-#define ADB_IOP_AUTOPOLL 0x40 /* auto/SRQ polling enabled */
-#define ADB_IOP_SRQ 0x04 /* SRQ detected */
-#define ADB_IOP_TIMEOUT 0x02 /* nonzero if timeout */
-
-#ifndef __ASSEMBLY__
-
-struct adb_iopmsg {
- __u8 flags; /* ADB flags */
- __u8 count; /* no. of data bytes */
- __u8 cmd; /* ADB command */
- __u8 data[8]; /* ADB data */
- __u8 spare[21]; /* spare */
-};
-
-#endif /* __ASSEMBLY__ */
+++ /dev/null
-/*
- * include/linux/m68kserial.h
- *
- * Copyright (C) 1992 by Theodore Ts'o.
- *
- * Redistribution of this file is permitted under the terms of the GNU
- * Public License (GPL)
- *
- * 2/28/99 RZ: renamed to allow coexistence with serial.c driver
- */
-
-
-#ifndef _M68K_SERIAL_H
-#define _M68K_SERIAL_H
-
-
-/* m68k serial port types are numbered from 100 to avoid interference
- * with the PC types (1..4)
- */
-#define PORT_UNKNOWN 0
-#define PORT_8250 1
-#define PORT_16450 2
-#define PORT_16550 3
-#define PORT_16550A 4
-#define PORT_CIRRUS 5
-#define PORT_16650V2 7
-#define PORT_16750 8
-
-#define SER_SCC_NORM 100 /* standard SCC channel */
-#define SER_SCC_DMA 101 /* SCC channel with DMA support */
-#define SER_MFP_CTRL 102 /* standard MFP port with modem control signals */
-#define SER_MFP_BARE 103 /* MFP port without modem controls */
-#define SER_MIDI 104 /* Atari MIDI */
-#define SER_AMIGA 105 /* Amiga built-in serial port */
-#define SER_IOEXT 106 /* Amiga GVP IO-Extender (16c552) */
-#define SER_MFC_III 107 /* Amiga BSC Multiface Card III (MC68681) */
-#define SER_WHIPPET 108 /* Amiga Hisoft Whippet PCMCIA (16c550B) */
-#define SER_SCC_MVME 109 /* MVME162/MVME172 ports */
-#define SER_SCC_MAC 110 /* Macintosh SCC channel */
-#define SER_HPDCA 111 /* HP DCA serial */
-#define SER_SCC_BVME 112 /* BVME6000 ports */
-
-struct serial_struct {
- int type;
- int line;
- int port;
- int irq;
- int flags;
- int xmit_fifo_size;
- int custom_divisor;
- int baud_base;
- unsigned short close_delay;
- char reserved_char[2];
- int hub6;
- unsigned short closing_wait; /* time to wait before closing */
- unsigned short closing_wait2; /* no longer used... */
- int reserved[4];
-};
-
-/*
- * For the close wait times, 0 means wait forever for serial port to
- * flush its output. 65535 means don't wait at all.
- */
-#define ASYNC_CLOSING_WAIT_INF 0
-#define ASYNC_CLOSING_WAIT_NONE 65535
-
-/* This function tables does the abstraction from the underlying
- * hardware:
- *
- * init(): Initialize the port as necessary, set RTS and DTR and
- * enable interrupts. It does not need to set the speed and other
- * parameters, because change_speed() is called, too.
- * deinit(): Stop and shutdown the port (e.g. disable interrupts, ...)
- * enab_tx_int(): Enable or disable the Tx Buffer Empty interrupt
- * independently from other interrupt sources. If the int is
- * enabled, the transmitter should also be restarted, i.e. if there
- * are any chars to be sent, they should be put into the Tx
- * register. The real en/disabling of the interrupt may be a no-op
- * if there is no way to do this or it is too complex. This Tx ints
- * are just disabled to save some interrupts if the transmitter is
- * stopped anyway. But the restarting must be implemented!
- * check_custom_divisor(): Check the given custom divisor for legality
- * and return 0 if OK, non-zero otherwise.
- * change_speed(): Set port speed, character size, number of stop
- * bits and parity from the termios structure. If the user wants
- * to set the speed with a custom divisor, he is required to
- * check the baud_base first!
- * throttle(): Set or clear the RTS line according to 'status'.
- * set_break(): Set or clear the 'Send a Break' flag.
- * get_serial_info(): Fill in the baud_base and custom_divisor
- * fields of a serial_struct. It may also modify other fields, if
- * needed.
- * get_modem_info(): Return the status of RTS, DTR, DCD, RI, DSR and CTS.
- * set_modem_info(): Set the status of RTS and DTR according to
- * 'new_dtr' and 'new_rts', resp. 0 = clear, 1 = set, -1 = don't change
- * ioctl(): Process any port-specific ioctl's. This pointer may be
- * NULL, if the port has no own ioctl's.
- * stop_receive(): Turn off the Rx part of the port, so no more characters
- * will be received. This is called before shutting the port down.
- * trans_empty(): Return !=0 if there are no more characters still to be
- * sent out (Tx buffer register and FIFOs empty)
- * check_open(): Is called before the port is opened. The driver can check
- * if that's ok and return an error code, or keep track of the opening
- * even before init() is called. Use deinit() for matching closing of the
- * port.
- *
- */
-
-struct m68k_async_struct;
-
-typedef struct {
- void (*init)( struct m68k_async_struct *info );
- void (*deinit)( struct m68k_async_struct *info, int leave_dtr );
- void (*enab_tx_int)( struct m68k_async_struct *info, int enab_flag );
- int (*check_custom_divisor)( struct m68k_async_struct *info, int baud_base,
- int divisor );
- void (*change_speed)( struct m68k_async_struct *info );
- void (*throttle)( struct m68k_async_struct *info, int status );
- void (*set_break)( struct m68k_async_struct *info, int break_flag );
- void (*get_serial_info)( struct m68k_async_struct *info,
- struct serial_struct *retinfo );
- unsigned int (*get_modem_info)( struct m68k_async_struct *info );
- int (*set_modem_info)( struct m68k_async_struct *info, int new_dtr,
- int new_rts );
- int (*ioctl)( struct tty_struct *tty, struct file *file,
- struct m68k_async_struct *info, unsigned int cmd,
- unsigned long arg );
- void (*stop_receive)( struct m68k_async_struct *info );
- int (*trans_empty)( struct m68k_async_struct *info );
- int (*check_open)( struct m68k_async_struct *info, struct tty_struct *tty,
- struct file *file );
-} SERIALSWITCH;
-
-/*
- * Definitions for m68k_async_struct (and serial_struct) flags field
- */
-#define ASYNC_HUP_NOTIFY 0x0001 /* Notify getty on hangups and closes
- on the callout port */
-#define ASYNC_FOURPORT 0x0002 /* Set OU1, OUT2 per AST Fourport settings */
-#define ASYNC_SAK 0x0004 /* Secure Attention Key (Orange book) */
-#define ASYNC_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
-
-#define ASYNC_SPD_MASK 0x1030
-#define ASYNC_SPD_HI 0x0010 /* Use 56000 instead of 38400 bps */
-
-#define ASYNC_SPD_VHI 0x0020 /* Use 115200 instead of 38400 bps */
-#define ASYNC_SPD_CUST 0x0030 /* Use user-specified divisor */
-
-#define ASYNC_SKIP_TEST 0x0040 /* Skip UART test during autoconfiguration */
-#define ASYNC_AUTO_IRQ 0x0080 /* Do automatic IRQ during autoconfiguration */
-#define ASYNC_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
-#define ASYNC_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */
-#define ASYNC_CALLOUT_NOHUP 0x0400 /* Don't do hangups for cua device */
-
-#define ASYNC_HARDPPS_CD 0x0800 /* Call hardpps when CD goes high */
-
-#define ASYNC_SPD_SHI 0x1000 /* Use 230400 instead of 38400 bps */
-#define ASYNC_SPD_WARP 0x1010 /* Use 460800 instead of 38400 bps */
-
-#define ASYNC_FLAGS 0x1FFF /* Possible legal async flags */
-#define ASYNC_USR_MASK 0x1430 /* Legal flags that non-privileged
- * users can set or reset */
-
-/* Internal flags used only by drivers/char/m68kserial.c */
-#define ASYNC_INITIALIZED 0x80000000 /* Serial port was initialized */
-#define ASYNC_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
-#define ASYNC_NORMAL_ACTIVE 0x20000000 /* Normal device is active */
-#define ASYNC_BOOT_AUTOCONF 0x10000000 /* Autoconfigure port on bootup */
-#define ASYNC_CLOSING 0x08000000 /* Serial port is closing */
-#define ASYNC_CTS_FLOW 0x04000000 /* Do CTS flow control */
-#define ASYNC_CHECK_CD 0x02000000 /* i.e., CLOCAL */
-
-#define ASYNC_INTERNAL_FLAGS 0xFF000000 /* Internal flags */
-
-/*
- * Serial input interrupt line counters -- external structure
- * Four lines can interrupt: CTS, DSR, RI, DCD
- */
-struct serial_icounter_struct {
- int cts, dsr, rng, dcd;
- int rx, tx;
- int frame, overrun, parity, brk;
- int buf_overrun;
- int reserved[9];
-};
-
-
-#ifdef __KERNEL__
-/*
- * This is our internal structure for each serial port's state.
- *
- * Many fields are paralleled by the structure used by the serial_struct
- * structure.
- *
- * For definitions of the flags field, see tty.h
- */
-
-#include <linux/termios.h>
-#include <linux/tqueue.h>
-
-#include <linux/config.h> /* for Mac SCC extensions */
-
-#ifdef CONFIG_MAC
-#define NUM_ZSREGS 16
-struct mac_zschannel {
- volatile unsigned char *control;
- volatile unsigned char *data;
-};
-struct m68k_async_private;
-#endif
-
-struct m68k_async_struct {
- int magic;
- int baud_base;
- int port;
- int irq;
- int flags; /* defined in tty.h */
- int hub6; /* HUB6 plus one */
- int type;
- struct tty_struct *tty;
- int read_status_mask;
- int ignore_status_mask;
- int timeout;
- int xmit_fifo_size;
- int custom_divisor;
- int x_char; /* xon/xoff character */
- int close_delay;
- unsigned short closing_wait;
- unsigned short closing_wait2;
- int IER; /* Interrupt Enable Register */
- int MCR; /* Modem control register */
- int MCR_noint; /* MCR with interrupts off */
- unsigned long event;
- unsigned long last_active;
- int line;
- int count; /* # of fd on device */
- int blocked_open; /* # of blocked opens */
- long session; /* Session of opening process */
- long pgrp; /* pgrp of opening process */
- unsigned char *xmit_buf;
- int xmit_head;
- int xmit_tail;
- int xmit_cnt;
- struct tq_struct tqueue;
- struct termios normal_termios;
- struct termios callout_termios;
- struct wait_queue *open_wait;
- struct wait_queue *close_wait;
- struct wait_queue *delta_msr_wait;
- struct async_icount icount; /* kernel counters for the 4 input interrupts */
- struct m68k_async_struct *next_port; /* For the linked list */
- struct m68k_async_struct *prev_port;
- void *board_base; /* board-base address for use with
- boards carrying several UART's,
- like some Amiga boards. */
- unsigned short nr_uarts; /* UART-counter, that indicates
- how many UART's there are on
- the board. If the board has a
- IRQ-register, this can be used
- to check if any of the uarts,
- on the board has requested an
- interrupt, instead of checking
- IRQ-registers on all UART's */
- SERIALSWITCH *sw; /* functions to manage this port */
-#ifdef CONFIG_MAC
- struct m68k_async_private *private;
-#endif
-};
-
-#ifdef CONFIG_MAC
-struct m68k_async_private {
- struct m68k_async_info *zs_next; /* For IRQ servicing chain */
- struct mac_zschannel *zs_channel; /* Channel registers */
- struct mac_zschannel *zs_chan_a; /* A side registers */
- unsigned char read_reg_zero;
-
- char soft_carrier; /* Use soft carrier on this */
- char break_abort; /* console, process brk/abrt */
- char kgdb_channel; /* Kgdb running on this channel */
- char is_cons; /* Is this our console. */
- unsigned char tx_active; /* character being xmitted */
- unsigned char tx_stopped; /* output is suspended */
-
- /* We need to know the current clock divisor
- * to read the bps rate the chip has currently
- * loaded.
- */
- unsigned char clk_divisor; /* May be 1, 16, 32, or 64 */
- int zs_baud;
-
- /* Current write register values */
- unsigned char curregs[NUM_ZSREGS];
-
- /* Values we need to set next opportunity */
- unsigned char pendregs[NUM_ZSREGS];
-
- char change_needed;
-};
-#endif
-#define SERIAL_MAGIC 0x5301
-
-/*
- * The size of the serial xmit buffer is 1 page, or 4096 bytes
- */
-#define SERIAL_XMIT_SIZE 4096
-
-/*
- * Events are used to schedule things to happen at timer-interrupt
- * time, instead of at rs interrupt time.
- */
-#define RS_EVENT_WRITE_WAKEUP 0
-
-/* number of characters left in xmit buffer before we ask for more */
-#define WAKEUP_CHARS 256
-
-/* Export to allow PCMCIA to use this - Dave Hinds */
-extern int m68k_register_serial(struct serial_struct *req);
-extern void m68k_unregister_serial(int line);
-extern int register_serial(struct serial_struct *req);
-extern void unregister_serial(int line);
-extern struct m68k_async_struct rs_table[];
-extern task_queue tq_serial;
-
-
-/*
- * This routine is used by the interrupt handler to schedule
- * processing in the software interrupt portion of the driver.
- */
-static __inline__ void rs_sched_event(struct m68k_async_struct *info, int event)
-{
- info->event |= 1 << event;
- queue_task(&info->tqueue, &tq_serial);
- mark_bh(SERIAL_BH);
-}
-
-static __inline__ void rs_receive_char( struct m68k_async_struct *info,
- int ch, int err )
-{
- struct tty_struct *tty = info->tty;
-
- if (tty->flip.count >= TTY_FLIPBUF_SIZE)
- return;
- tty->flip.count++;
- switch(err) {
- case TTY_BREAK:
- info->icount.brk++;
- if (info->flags & ASYNC_SAK)
- do_SAK(tty);
- break;
- case TTY_PARITY:
- info->icount.parity++;
- break;
- case TTY_OVERRUN:
- info->icount.overrun++;
- break;
- case TTY_FRAME:
- info->icount.frame++;
- break;
- }
- *tty->flip.flag_buf_ptr++ = err;
- *tty->flip.char_buf_ptr++ = ch;
- info->icount.rx++;
- tty_flip_buffer_push(tty);
-}
-
-static __inline__ int rs_get_tx_char( struct m68k_async_struct *info )
-{
- unsigned char ch;
-
- if (info->x_char) {
- ch = info->x_char;
- info->icount.tx++;
- info->x_char = 0;
- return( ch );
- }
-
- if (info->xmit_cnt <= 0 || info->tty->stopped || info->tty->hw_stopped)
- return( -1 );
-
- ch = info->xmit_buf[info->xmit_tail++];
- info->xmit_tail &= SERIAL_XMIT_SIZE - 1;
- info->icount.tx++;
- if (--info->xmit_cnt < WAKEUP_CHARS)
- rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
- return( ch );
-}
-
-static __inline__ int rs_no_more_tx( struct m68k_async_struct *info )
-{
- return( info->xmit_cnt <= 0 ||
- info->tty->stopped ||
- info->tty->hw_stopped );
-}
-
-static __inline__ void rs_dcd_changed( struct m68k_async_struct *info, int dcd )
-
-{
- /* update input line counter */
- info->icount.dcd++;
- wake_up_interruptible(&info->delta_msr_wait);
-
- if (info->flags & ASYNC_CHECK_CD) {
-#if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
- printk("ttyS%d CD now %s...", info->line,
- dcd ? "on" : "off");
-#endif
- if (dcd) {
- wake_up_interruptible(&info->open_wait);
- } else if (!((info->flags & ASYNC_CALLOUT_ACTIVE) &&
- (info->flags & ASYNC_CALLOUT_NOHUP))) {
-#ifdef SERIAL_DEBUG_OPEN
- printk("scheduling hangup...");
-#endif
- if (info->tty)
- tty_hangup(info->tty);
- }
- }
-}
-
-
-void rs_stop( struct tty_struct *tty );
-void rs_start( struct tty_struct *tty );
-
-static __inline__ void rs_check_cts( struct m68k_async_struct *info, int cts )
-{
- /* update input line counter */
- info->icount.cts++;
- wake_up_interruptible(&info->delta_msr_wait);
-
- if ((info->flags & ASYNC_CTS_FLOW) && info->tty) {
- if (info->tty->hw_stopped) {
- if (cts) {
-#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
- printk("CTS tx start...");
-#endif
- info->tty->hw_stopped = 0;
- rs_start( info->tty );
- rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
- return;
- }
- } else {
- if (!cts) {
- info->tty->hw_stopped = 1;
- rs_stop( info->tty );
- }
- }
- }
-}
-
-
-#endif /* __KERNEL__ */
-
-#endif /* _M68K_SERIAL_H */
-
+++ /dev/null
-/*
- * I/O Processor (IOP) defines and structures, mostly snagged from A/UX
- * header files.
- *
- * The original header from which this was taken is copyrighted. I've done some
- * rewriting (in fact my changes make this a bit more readable, IMHO) but some
- * more should be done.
- */
-
-/*
- * This is the base address of the IOPs. Use this as the address of
- * a "struct iop" (see below) to see where the actual registers fall.
- */
-
-#define SCC_IOP_BASE_IIFX (0x50F04000)
-#define ISM_IOP_BASE_IIFX (0x50F12000)
-
-#define SCC_IOP_BASE_QUADRA (0x50F0C000)
-#define ISM_IOP_BASE_QUADRA (0x50F1E000)
-
-/* IOP status/control register bits: */
-
-#define IOP_BYPASS 0x01 /* bypass-mode hardware access */
-#define IOP_AUTOINC 0x02 /* allow autoincrement of ramhi/lo */
-#define IOP_RUN 0x04 /* set to 0 to reset IOP chip */
-#define IOP_IRQ 0x08 /* generate IRQ to IOP if 1 */
-#define IOP_INT0 0x10 /* intr priority from IOP to host */
-#define IOP_INT1 0x20 /* intr priority from IOP to host */
-#define IOP_HWINT 0x40 /* IRQ from hardware; bypass mode only */
-#define IOP_DMAINACTIVE 0x80 /* no DMA request active; bypass mode only */
-
-#define NUM_IOPS 2
-#define NUM_IOP_CHAN 7
-#define NUM_IOP_MSGS NUM_IOP_CHAN*8
-#define IOP_MSG_LEN 32
-
-/* IOP reference numbers, used by the globally-visible iop_xxx functions */
-
-#define IOP_NUM_SCC 0
-#define IOP_NUM_ISM 1
-
-/* IOP channel states */
-
-#define IOP_MSG_IDLE 0 /* idle */
-#define IOP_MSG_NEW 1 /* new message sent */
-#define IOP_MSG_RCVD 2 /* message received; processing */
-#define IOP_MSG_COMPLETE 3 /* message processing complete */
-
-/* IOP message status codes */
-
-#define IOP_MSGSTATUS_UNUSED 0 /* Unusued message structure */
-#define IOP_MSGSTATUS_WAITING 1 /* waiting for channel */
-#define IOP_MSGSTATUS_SENT 2 /* message sent, awaiting reply */
-#define IOP_MSGSTATUS_COMPLETE 3 /* message complete and reply rcvd */
-#define IOP_MSGSTATUS_UNSOL 6 /* message is unsolicited */
-
-/* IOP memory addresses of the members of the the mac_iop_kernel structure. */
-
-#define IOP_ADDR_MAX_SEND_CHAN 0x0200
-#define IOP_ADDR_SEND_STATE 0x0201
-#define IOP_ADDR_PATCH_CTRL 0x021F
-#define IOP_ADDR_SEND_MSG 0x0220
-#define IOP_ADDR_MAX_RECV_CHAN 0x0300
-#define IOP_ADDR_RECV_STATE 0x0301
-#define IOP_ADDR_ALIVE 0x031F
-#define IOP_ADDR_RECV_MSG 0x0320
-
-#ifndef __ASSEMBLY__
-
-/*
- * IOP Control registers, staggered because in usual Apple style they were
- * too lazy to decode the A0 bit. This structure is assumed to begin at
- * one of the xxx_IOP_BASE addresses given above.
- */
-
-struct mac_iop {
- __u8 ram_addr_hi; /* shared RAM address hi byte */
- __u8 pad0;
- __u8 ram_addr_lo; /* shared RAM address lo byte */
- __u8 pad1;
- __u8 status_ctrl; /* status/control register */
- __u8 pad2[3];
- __u8 ram_data; /* RAM data byte at ramhi/lo */
-
- __u8 pad3[23];
-
- /* Bypass-mode hardware access registers */
-
- union {
- struct { /* SCC registers */
- __u8 sccb_cmd; /* SCC B command reg */
- __u8 pad4;
- __u8 scca_cmd; /* SCC A command reg */
- __u8 pad5;
- __u8 sccb_data; /* SCC B data */
- __u8 pad6;
- __u8 scca_data; /* SCC A data */
- } scc_regs;
-
- struct { /* ISM registers */
- __u8 wdata; /* write a data byte */
- __u8 pad7;
- __u8 wmark; /* write a mark byte */
- __u8 pad8;
- __u8 wcrc; /* write 2-byte crc to disk */
- __u8 pad9;
- __u8 wparams; /* write the param regs */
- __u8 pad10;
- __u8 wphase; /* write the phase states & dirs */
- __u8 pad11;
- __u8 wsetup; /* write the setup register */
- __u8 pad12;
- __u8 wzeroes; /* mode reg: 1's clr bits, 0's are x */
- __u8 pad13;
- __u8 wones; /* mode reg: 1's set bits, 0's are x */
- __u8 pad14;
- __u8 rdata; /* read a data byte */
- __u8 pad15;
- __u8 rmark; /* read a mark byte */
- __u8 pad16;
- __u8 rerror; /* read the error register */
- __u8 pad17;
- __u8 rparams; /* read the param regs */
- __u8 pad18;
- __u8 rphase; /* read the phase states & dirs */
- __u8 pad19;
- __u8 rsetup; /* read the setup register */
- __u8 pad20;
- __u8 rmode; /* read the mode register */
- __u8 pad21;
- __u8 rhandshake; /* read the handshake register */
- } ism_regs;
- } b;
-};
-
-/* This structure is used to track IOP messages in the Linux kernel */
-
-struct iop_msg {
- struct iop_msg *next; /* next message in queue or NULL */
- uint iop_num; /* IOP number */
- uint channel; /* channel number */
- void *caller_priv; /* caller private data */
- int status; /* status of this message */
- __u8 message[IOP_MSG_LEN]; /* the message being sent/received */
- __u8 reply[IOP_MSG_LEN]; /* the reply to the message */
- void (*handler)(struct iop_msg *, struct pt_regs *);
- /* function to call when reply recvd */
-};
-
-extern int iop_scc_present,iop_ism_present;
-
-extern int iop_listen(uint, uint,
- void (*handler)(struct iop_msg *, struct pt_regs *),
- const char *);
-extern int iop_send_message(uint, uint, void *, uint, __u8 *,
- void (*)(struct iop_msg *, struct pt_regs *));
-extern void iop_complete_message(struct iop_msg *);
-extern void iop_upload_code(uint, __u8 *, uint, __u16);
-extern void iop_download_code(uint, __u8 *, uint, __u16);
-extern __u8 *iop_compare_code(uint, __u8 *, uint, __u16);
-
-#endif /* __ASSEMBLY__ */
+++ /dev/null
-/*
- * OSS
- *
- * This is used in place of VIA2 on the IIfx.
- */
-
-#define OSS_BASE (0x50f1a000)
-
-/*
- * Interrupt level offsets for mac_oss->irq_level
- */
-
-#define OSS_NUBUS0 0
-#define OSS_NUBUS1 1
-#define OSS_NUBUS2 2
-#define OSS_NUBUS3 3
-#define OSS_NUBUS4 4
-#define OSS_NUBUS5 5
-#define OSS_IOPISM 6
-#define OSS_IOPSCC 7
-#define OSS_SOUND 8
-#define OSS_SCSI 9
-#define OSS_60HZ 10
-#define OSS_VIA1 11
-#define OSS_UNUSED1 12
-#define OSS_UNUSED2 13
-#define OSS_PARITY 14
-#define OSS_UNUSED3 15
-
-#define OSS_NUM_SOURCES 16
-
-/*
- * Pending interrupt bits in mac_oss->irq_pending
- */
-
-#define OSS_IP_NUBUS0 0x0001
-#define OSS_IP_NUBUS1 0x0002
-#define OSS_IP_NUBUS2 0x0004
-#define OSS_IP_NUBUS3 0x0008
-#define OSS_IP_NUBUS4 0x0010
-#define OSS_IP_NUBUS5 0x0020
-#define OSS_IP_IOPISM 0x0040
-#define OSS_IP_IOPSCC 0x0080
-#define OSS_IP_SOUND 0x0100
-#define OSS_IP_SCSI 0x0200
-#define OSS_IP_60HZ 0x0400
-#define OSS_IP_VIA1 0x0800
-#define OSS_IP_UNUSED1 0x1000
-#define OSS_IP_UNUSED2 0x2000
-#define OSS_IP_PARITY 0x4000
-#define OSS_IP_UNUSED3 0x8000
-
-#define OSS_IP_NUBUS (OSS_IP_NUBUS0|OSS_IP_NUBUS1|OSS_IP_NUBUS2|OSS_IP_NUBUS3|OSS_IP_NUBUS4|OSS_IP_NUBUS5)
-
-/*
- * Rom Control Register
- */
-
-#define OSS_POWEROFF 0x80
-
-/*
- * OSS Interrupt levels for various sub-systems
- *
- * This mapping is layed out with two things in mind: first, we try to keep
- * things on their own levels to avoid having to do double-dispatches. Second,
- * the levels match as closely as possible the alternate IRQ mapping mode (aka
- * "A/UX mode") available on some VIA machines.
- */
-
-#define OSS_IRQLEV_DISABLED 0
-#define OSS_IRQLEV_IOPISM 1 /* ADB? */
-#define OSS_IRQLEV_SCSI 2
-#define OSS_IRQLEV_NUBUS 3 /* keep this on its own level */
-#define OSS_IRQLEV_IOPSCC 4 /* matches VIA alternate mapping */
-#define OSS_IRQLEV_SOUND 5 /* matches VIA alternate mapping */
-#define OSS_IRQLEV_60HZ 6 /* matches VIA alternate mapping */
-#define OSS_IRQLEV_VIA1 6 /* matches VIA alternate mapping */
-#define OSS_IRQLEV_PARITY 7 /* matches VIA alternate mapping */
-
-#ifndef __ASSEMBLY__
-
-struct mac_oss {
- __u8 irq_level[0x10]; /* [0x000-0x00f] Interrupt levels */
- __u8 padding0[0x1F2]; /* [0x010-0x201] IO space filler */
- __u16 irq_pending; /* [0x202-0x203] pending interrupts bits */
- __u8 rom_ctrl; /* [0x204-0x204] ROM cntl reg (for poweroff) */
- __u8 padding1[0x2]; /* [0x205-0x206] currently unused by A/UX */
- __u8 ack_60hz; /* [0x207-0x207] 60 Hz ack. */
-};
-
-extern volatile struct mac_oss *oss;
-extern int oss_present;
-
-#endif /* __ASSEMBLY__ */
+++ /dev/null
-/*
- * 6522 Versatile Interface Adapter (VIA)
- *
- * There are two of these on the Mac II. Some IRQ's are vectored
- * via them as are assorted bits and bobs - eg rtc, adb. The picture
- * is a bit incomplete as the Mac documentation doesnt cover this well
- */
-
-#ifndef _ASM_VIA6522_H_
-#define _ASM_VIA6522_H_
-
-/*
- * Base addresses for the VIAs. There are two in every machine,
- * although on some machines the second is an RBV or an OSS.
- * The OSS is different enough that it's handled separately.
- *
- * Do not use these values directly; use the via1 and via2 variables
- * instead (and don't forget to check rbv_present when using via2!)
- */
-
-#define VIA1_BASE (0x50F00000)
-#define VIA2_BASE (0x50F02000)
-#define RBV_BASE (0x50F26000)
-
-/*
- * Not all of these are true post MacII I think.
- * CSA: probably the ones CHRP marks as 'unused' change purposes
- * when the IWM becomes the SWIM.
- * http://www.rs6000.ibm.com/resource/technology/chrpio/via5.mak.html
- * ftp://ftp.austin.ibm.com/pub/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
- *
- * also, http://developer.apple.com/technotes/hw/hw_09.html claims the
- * following changes for IIfx:
- * VIA1A_vSccWrReq not available and that VIA1A_vSync has moved to an IOP.
- * Also, "All of the functionality of VIA2 has been moved to other chips".
- */
-
-#define VIA1A_vSccWrReq 0x80 /* SCC write. (input)
- * [CHRP] SCC WREQ: Reflects the state of the
- * Wait/Request pins from the SCC.
- * [Macintosh Family Hardware]
- * as CHRP on SE/30,II,IIx,IIcx,IIci.
- * on IIfx, "0 means an active request"
- */
-#define VIA1A_vRev8 0x40 /* Revision 8 board ???
- * [CHRP] En WaitReqB: Lets the WaitReq_L
- * signal from port B of the SCC appear on
- * the PA7 input pin. Output.
- * [Macintosh Family] On the SE/30, this
- * is the bit to flip screen buffers.
- * 0=alternate, 1=main.
- * on II,IIx,IIcx,IIci,IIfx this is a bit
- * for Rev ID. 0=II,IIx, 1=IIcx,IIci,IIfx
- */
-#define VIA1A_vHeadSel 0x20 /* Head select for IWM.
- * [CHRP] unused.
- * [Macintosh Family] "Floppy disk
- * state-control line SEL" on all but IIfx
- */
-#define VIA1A_vOverlay 0x10 /* [Macintosh Family] On SE/30,II,IIx,IIcx
- * this bit enables the "Overlay" address
- * map in the address decoders as it is on
- * reset for mapping the ROM over the reset
- * vector. 1=use overlay map.
- * On the IIci,IIfx it is another bit of the
- * CPU ID: 0=normal IIci, 1=IIci with parity
- * feature or IIfx.
- * [CHRP] En WaitReqA: Lets the WaitReq_L
- * signal from port A of the SCC appear
- * on the PA7 input pin (CHRP). Output.
- * [MkLinux] "Drive Select"
- * (with 0x20 being 'disk head select')
- */
-#define VIA1A_vSync 0x08 /* [CHRP] Sync Modem: modem clock select:
- * 1: select the external serial clock to
- * drive the SCC's /RTxCA pin.
- * 0: Select the 3.6864MHz clock to drive
- * the SCC cell.
- * [Macintosh Family] Correct on all but IIfx
- */
-
-/* Macintosh Family Hardware sez: bits 0-2 of VIA1A are volume control
- * on Macs which had the PWM sound hardware. Reserved on newer models.
- * On IIci,IIfx, bits 1-2 are the rest of the CPU ID:
- * bit 2: 1=IIci, 0=IIfx
- * bit 1: 1 on both IIci and IIfx.
- * MkLinux sez bit 0 is 'burnin flag' in this case.
- * CHRP sez: VIA1A bits 0-2 and 5 are 'unused': if programmed as
- * inputs, these bits will read 0.
- */
-#define VIA1A_vVolume 0x07 /* Audio volume mask for PWM */
-#define VIA1A_CPUID0 0x02 /* CPU id bit 0 on RBV, others */
-#define VIA1A_CPUID1 0x04 /* CPU id bit 0 on RBV, others */
-#define VIA1A_CPUID2 0x10 /* CPU id bit 0 on RBV, others */
-#define VIA1A_CPUID3 0x40 /* CPU id bit 0 on RBV, others */
-
-/* Info on VIA1B is from Macintosh Family Hardware & MkLinux.
- * CHRP offers no info. */
-#define VIA1B_vSound 0x80 /* Sound enable (for compatibility with
- * PWM hardware) 0=enabled.
- * Also, on IIci w/parity, shows parity error
- * 0=error, 1=OK. */
-#define VIA1B_vMystery 0x40 /* On IIci, parity enable. 0=enabled,1=disabled
- * On SE/30, vertical sync interrupt enable.
- * 0=enabled. This vSync interrupt shows up
- * as a slot $E interrupt. */
-#define VIA1B_vADBS2 0x20 /* ADB state input bit 1 (unused on IIfx) */
-#define VIA1B_vADBS1 0x10 /* ADB state input bit 0 (unused on IIfx) */
-#define VIA1B_vADBInt 0x08 /* ADB interrupt 0=interrupt (unused on IIfx)*/
-#define VIA1B_vRTCEnb 0x04 /* Enable Real time clock. 0=enabled. */
-#define VIA1B_vRTCClk 0x02 /* Real time clock serial-clock line. */
-#define VIA1B_vRTCData 0x01 /* Real time clock serial-data line. */
-
-/* MkLinux defines the following "VIA1 Register B contents where they
- * differ from standard VIA1". From the naming scheme, we assume they
- * correspond to a VIA work-alike named 'EVR'. */
-#define EVRB_XCVR 0x08 /* XCVR_SESSION* */
-#define EVRB_FULL 0x10 /* VIA_FULL */
-#define EVRB_SYSES 0x20 /* SYS_SESSION */
-#define EVRB_AUXIE 0x00 /* Enable A/UX Interrupt Scheme */
-#define EVRB_AUXID 0x40 /* Disable A/UX Interrupt Scheme */
-#define EVRB_SFTWRIE 0x00 /* Software Interrupt ReQuest */
-#define EVRB_SFTWRID 0x80 /* Software Interrupt ReQuest */
-
-/*
- * VIA2 A register is the interrupt lines raised off the nubus
- * slots.
- * The below info is from 'Macintosh Family Hardware.'
- * MkLinux calls the 'IIci internal video IRQ' below the 'RBV slot 0 irq.'
- * It also notes that the slot $9 IRQ is the 'Ethernet IRQ' and
- * defines the 'Video IRQ' as 0x40 for the 'EVR' VIA work-alike.
- * Perhaps OSS uses vRAM1 and vRAM2 for ADB.
- */
-
-#define VIA2A_vRAM1 0x80 /* RAM size bit 1 (IIci: reserved) */
-#define VIA2A_vRAM0 0x40 /* RAM size bit 0 (IIci: internal video IRQ) */
-#define VIA2A_vIRQE 0x20 /* IRQ from slot $E */
-#define VIA2A_vIRQD 0x10 /* IRQ from slot $D */
-#define VIA2A_vIRQC 0x08 /* IRQ from slot $C */
-#define VIA2A_vIRQB 0x04 /* IRQ from slot $B */
-#define VIA2A_vIRQA 0x02 /* IRQ from slot $A */
-#define VIA2A_vIRQ9 0x01 /* IRQ from slot $9 */
-
-/* RAM size bits decoded as follows:
- * bit1 bit0 size of ICs in bank A
- * 0 0 256 kbit
- * 0 1 1 Mbit
- * 1 0 4 Mbit
- * 1 1 16 Mbit
- */
-
-/*
- * Register B has the fun stuff in it
- */
-
-#define VIA2B_vVBL 0x80 /* VBL output to VIA1 (60.15Hz) driven by
- * timer T1.
- * on IIci, parity test: 0=test mode.
- * [MkLinux] RBV_PARODD: 1=odd,0=even. */
-#define VIA2B_vSndJck 0x40 /* External sound jack status.
- * 0=plug is inserted. On SE/30, always 0 */
-#define VIA2B_vTfr0 0x20 /* Transfer mode bit 0 ack from NuBus */
-#define VIA2B_vTfr1 0x10 /* Transfer mode bit 1 ack from NuBus */
-#define VIA2B_vMode32 0x08 /* 24/32bit switch - doubles as cache flush
- * on II, AMU/PMMU control.
- * if AMU, 0=24bit to 32bit translation
- * if PMMU, 1=PMMU is accessing page table.
- * on SE/30 tied low.
- * on IIx,IIcx,IIfx, unused.
- * on IIci/RBV, cache control. 0=flush cache.
- */
-#define VIA2B_vPower 0x04 /* Power off, 0=shut off power.
- * on SE/30 this signal sent to PDS card. */
-#define VIA2B_vBusLk 0x02 /* Lock NuBus transactions, 0=locked.
- * on SE/30 sent to PDS card. */
-#define VIA2B_vCDis 0x01 /* Cache control. On IIci, 1=disable cache card
- * on others, 0=disable processor's instruction
- * and data caches. */
-
-/* Apple sez: http://developer.apple.com/technotes/ov/ov_04.html
- * Another example of a valid function that has no ROM support is the use
- * of the alternate video page for page-flipping animation. Since there
- * is no ROM call to flip pages, it is necessary to go play with the
- * right bit in the VIA chip (6522 Versatile Interface Adapter).
- * [CSA: don't know which one this is, but it's one of 'em!]
- */
-
-/*
- * 6522 registers - see databook.
- * CSA: Assignments for VIA1 confirmed from CHRP spec.
- */
-
-/* partial address decode. 0xYYXX : XX part for RBV, YY part for VIA */
-/* Note: 15 VIA regs, 8 RBV regs */
-
-#define vBufB 0x0000 /* [VIA/RBV] Register B */
-#define vBufAH 0x0200 /* [VIA only] Buffer A, with handshake. DON'T USE! */
-#define vDirB 0x0400 /* [VIA only] Data Direction Register B. */
-#define vDirA 0x0600 /* [VIA only] Data Direction Register A. */
-#define vT1CL 0x0800 /* [VIA only] Timer one counter low. */
-#define vT1CH 0x0a00 /* [VIA only] Timer one counter high. */
-#define vT1LL 0x0c00 /* [VIA only] Timer one latches low. */
-#define vT1LH 0x0e00 /* [VIA only] Timer one latches high. */
-#define vT2CL 0x1000 /* [VIA only] Timer two counter low. */
-#define vT2CH 0x1200 /* [VIA only] Timer two counter high. */
-#define vSR 0x1400 /* [VIA only] Shift register. */
-#define vACR 0x1600 /* [VIA only] Auxilary control register. */
-#define vPCR 0x1800 /* [VIA only] Peripheral control register. */
- /* CHRP sez never ever to *write* this.
- * Mac family says never to *change* this.
- * In fact we need to initialize it once at start. */
-#define vIFR 0x1a00 /* [VIA/RBV] Interrupt flag register. */
-#define vIER 0x1c00 /* [VIA/RBV] Interrupt enable register. */
-#define vBufA 0x1e00 /* [VIA/RBV] register A (no handshake) */
-
-/* The RBV only decodes the bottom eight address lines; the VIA doesn't
- * decode the bottom eight -- so vBufB | rBufB will always get you BufB */
-/* CSA: in fact, only bits 0,1, and 4 seem to be decoded.
- * BUT note the values for rIER and rIFR, where the top 8 bits *do* seem
- * to matter. In fact *all* of the top 8 bits seem to matter;
- * setting rIER=0x1813 and rIFR=0x1803 doesn't work, either.
- * Perhaps some sort of 'compatibility mode' is built-in? [21-May-1999]
- */
-
-#define rBufB 0x0000 /* [VIA/RBV] Register B */
-#define rExp 0x0001 /* [RBV only] RBV future expansion (always 0) */
-#define rSIFR 0x0002 /* [RBV only] RBV slot interrupts register. */
-#define rIFR 0x1a03 /* [VIA/RBV] RBV interrupt flag register. */
-#define rMonP 0x0010 /* [RBV only] RBV video monitor type. */
-#define rChpT 0x0011 /* [RBV only] RBV test mode register (reads as 0). */
-#define rSIER 0x0012 /* [RBV only] RBV slot interrupt enables. */
-#define rIER 0x1c13 /* [VIA/RBV] RBV interrupt flag enable register. */
-#define rBufA rSIFR /* the 'slot interrupts register' is BufA on a VIA */
-
-/*
- * Video monitor parameters, for rMonP:
- */
-#define RBV_DEPTH 0x07 /* bits per pixel: 000=1,001=2,010=4,011=8 */
-#define RBV_MONID 0x38 /* monitor type, as below. */
-#define RBV_VIDOFF 0x40 /* 1 turns off onboard video */
-/* Supported monitor types: */
-#define MON_15BW (1<<3) /* 15" BW portrait. */
-#define MON_IIGS (2<<3) /* 12" color (modified IIGS monitor). */
-#define MON_15RGB (5<<3) /* 15" RGB portrait. */
-#define MON_12OR13 (6<<3) /* 12" BW or 13" RGB. */
-#define MON_NONE (7<<3) /* No monitor attached. */
-
-/* To clarify IER manipulations */
-#define IER_SET_BIT(b) (0x80 | (1<<(b)) )
-#define IER_CLR_BIT(b) (0x7F & (1<<(b)) )
-
-#ifndef __ASSEMBLY__
-
-extern volatile __u8 *via1,*via2;
-extern int rbv_present,via_alt_mapping;
-extern __u8 rbv_clear;
-
-#if 0
-/*
- * The 6522 via is a 2MHz part, and needs a delay. MacOS seems to
- * execute MOV (Ax),(Ax) for this... Oh and we can't use udelay
- * here... see we need the via to calibrate the udelay loop ...
- */
-
-/* NetBSD doesn't use this, and it doesn't seem to make a difference. */
-extern volatile long *via_memory_bogon;
-#endif
-
-extern __u8 *via_get_base_address(int);
-
-extern __inline__ void via_write(volatile __u8 *via,int reg, int v)
-{
-#if 0
- *via_memory_bogon;
- *via_memory_bogon;
- *via_memory_bogon;
-#endif
- via[reg]=v;
-}
-
-extern __inline__ int via_read(volatile __u8 *via,int reg)
-{
-#if 0
- *via_memory_bogon;
- *via_memory_bogon;
- *via_memory_bogon;
-#endif
- return (int)via[reg];
-}
-
-extern __inline__ int rbv_set_video_bpp(int bpp) {
- char val = (bpp==1)?0:(bpp==2)?1:(bpp==4)?2:(bpp==8)?3:-1;
- if (!rbv_present || val<0) return -1;
- via_write(via2, rMonP, val | (via_read(via2, rMonP)&(~RBV_DEPTH)));
- return 0;
-}
-
-#endif /* __ASSEMBLY__ */
-
-#endif /* _ASM_VIA6522_H_ */
+++ /dev/null
-/*
- * SWIM access through the IOP
- * Written by Joshua M. Thompson
- */
-
-/* IOP number and channel number for the SWIM */
-
-#define SWIM_IOP IOP_NUM_ISM
-#define SWIM_CHAN 1
-
-/* Command code: */
-
-#define CMD_INIT 0x01 /* Initialize */
-#define CMD_SHUTDOWN 0x02 /* Shutdown */
-#define CMD_START_POLL 0x03 /* Start insert/eject polling */
-#define CMD_STOP_POLL 0x04 /* Stop insert/eject polling */
-#define CMD_SETHFSTAG 0x05 /* Set HFS tag buffer address */
-#define CMD_STATUS 0x06 /* Status */
-#define CMD_EJECT 0x07 /* Eject */
-#define CMD_FORMAT 0x08 /* Format */
-#define CMD_FORMAT_VERIFY 0x09 /* Format and Verify */
-#define CMD_WRITE 0x0A /* Write */
-#define CMD_READ 0x0B /* Read */
-#define CMD_READ_VERIFY 0x0C /* Read and Verify */
-#define CMD_CACHE_CTRL 0x0D /* Cache control */
-#define CMD_TAGBUFF_CTRL 0x0E /* Tag buffer control */
-#define CMD_GET_ICON 0x0F /* Get Icon */
-
-/* Drive types: */
-
-/* note: apple sez DRV_FDHD is 4, but I get back a type */
-/* of 5 when I do a drive status check on my FDHD */
-
-#define DRV_NONE 0 /* No drive */
-#define DRV_UNKNOWN 1 /* Unspecified drive */
-#define DRV_400K 2 /* 400K */
-#define DRV_800K 3 /* 400K/800K */
-#define DRV_FDHD 5 /* 400K/800K/720K/1440K */
-#define DRV_HD20 7 /* Apple HD20 */
-
-/* Format types: */
-
-#define FMT_HD20 0x0001 /* Apple HD20 */
-#define FMT_400K 0x0002 /* 400K (GCR) */
-#define FMT_800K 0x0004 /* 800K (GCR) */
-#define FMT_720K 0x0008 /* 720K (MFM) */
-#define FMT_1440K 0x0010 /* 1.44M (MFM) */
-
-#define FMD_KIND_400K 1
-#define FMD_KIND_800K 2
-#define FMD_KIND_720K 3
-#define FMD_KIND_1440K 1
-
-/* Icon Flags: */
-
-#define ICON_MEDIA 0x01 /* Have IOP supply media icon */
-#define ICON_DRIVE 0x01 /* Have IOP supply drive icon */
-
-/* Error codes: */
-
-#define gcrOnMFMErr -400 /* GCR (400/800K) on HD media */
-#define verErr -84 /* verify failed */
-#define fmt2Err -83 /* cant get enough sync during format */
-#define fmt1Err -82 /* can't find sector 0 after track format */
-#define sectNFErr -81 /* can't find sector */
-#define seekErr -80 /* drive error during seek */
-#define spdAdjErr -79 /* can't set drive speed */
-#define twoSideErr -78 /* drive is single-sided */
-#define initIWMErr -77 /* error during initialization */
-#define tk0badErr -76 /* track zero is bad */
-#define cantStepErr -75 /* drive error during step */
-#define wrUnderrun -74 /* write underrun occurred */
-#define badDBtSlp -73 /* bad data bitslip marks */
-#define badDCksum -72 /* bad data checksum */
-#define noDtaMkErr -71 /* can't find data mark */
-#define badBtSlpErr -70 /* bad address bitslip marks */
-#define badCksmErr -69 /* bad address-mark checksum */
-#define dataVerErr -68 /* read-verify failed */
-#define noAdrMkErr -67 /* can't find an address mark */
-#define noNybErr -66 /* no nybbles? disk is probably degaussed */
-#define offLinErr -65 /* no disk in drive */
-#define noDriveErr -64 /* drive isn't connected */
-#define nsDrvErr -56 /* no such drive */
-#define paramErr -50 /* bad positioning information */
-#define wPrErr -44 /* write protected */
-#define openErr -23 /* already initialized */
-
-#ifndef __ASSEMBLY__
-
-struct swim_drvstatus {
- __u16 curr_track; /* Current track number */
- __u8 write_prot; /* 0x80 if disk is write protected */
- __u8 disk_in_drive; /* 0x01 or 0x02 if a disk is in the drive */
- __u8 installed; /* 0x01 if drive installed, 0xFF if not */
- __u8 num_sides; /* 0x80 if two-sided format supported */
- __u8 two_sided; /* 0xff if two-sided format diskette */
- __u8 new_interface; /* 0x00 if old 400K drive, 0xFF if newer */
- __u16 errors; /* Disk error count */
- struct { /* 32 bits */
- __u16 reserved;
- __u16 :4;
- __u16 external:1; /* Drive is external */
- __u16 scsi:1; /* Drive is a SCSI drive */
- __u16 fixed:1; /* Drive has fixed media */
- __u16 secondary:1; /* Drive is secondary drive */
- __u8 type; /* Drive type */
- } info;
- __u8 mfm_drive; /* 0xFF if this is an FDHD drive */
- __u8 mfm_disk; /* 0xFF if 720K/1440K (MFM) disk */
- __u8 mfm_format; /* 0x00 if 720K, 0xFF if 1440K */
- __u8 ctlr_type; /* 0x00 if IWM, 0xFF if SWIM */
- __u16 curr_format; /* Current format type */
- __u16 allowed_fmt; /* Allowed format types */
- __u32 num_blocks; /* Number of blocks on disk */
- __u8 icon_flags; /* Icon flags */
- __u8 unusued;
-};
-
-/* Commands issued from the host to the IOP: */
-
-struct swimcmd_init {
- __u8 code; /* CMD_INIT */
- __u8 unusued;
- __u16 error;
- __u8 drives[28]; /* drive type list */
-};
-
-struct swimcmd_startpoll {
- __u8 code; /* CMD_START_POLL */
- __u8 unusued;
- __u16 error;
-};
-
-struct swimcmd_sethfstag {
- __u8 code; /* CMD_SETHFSTAG */
- __u8 unusued;
- __u16 error;
- caddr_t tagbuf; /* HFS tag buffer address */
-};
-
-struct swimcmd_status {
- __u8 code; /* CMD_STATUS */
- __u8 drive_num;
- __u16 error;
- struct swim_drvstatus status;
-};
-
-struct swimcmd_eject {
- __u8 code; /* CMD_EJECT */
- __u8 drive_num;
- __u16 error;
- struct swim_drvstatus status;
-};
-
-struct swimcmd_format {
- __u8 code; /* CMD_FORMAT */
- __u8 drive_num;
- __u16 error;
- union {
- struct {
- __u16 fmt; /* format kind */
- __u8 hdrbyte; /* fmt byte for hdr (0=default) */
- __u8 interleave; /* interleave (0 = default) */
- caddr_t databuf; /* sector data buff (0=default */
- caddr_t tagbuf; /* tag data buffer (0=default) */
- } f;
- struct swim_drvstatus status;
- } p;
-};
-
-struct swimcmd_fmtverify {
- __u8 code; /* CMD_FORMAT_VERIFY */
- __u8 drive_num;
- __u16 error;
-};
-
-struct swimcmd_rw {
- __u8 code; /* CMD_READ, CMD_WRITE or CMD_READ_VERIFY */
- __u8 drive_num;
- __u16 error;
- caddr_t buffer; /* R/W buffer address */
- __u32 first_block; /* Starting block */
- __u32 num_blocks; /* Number of blocks */
- __u8 tag[12]; /* tag data */
-};
-
-struct swimcmd_cachectl {
- __u8 code; /* CMD_CACHE_CTRL */
- __u8 unused;
- __u16 error;
- __u8 enable; /* Nonzero to enable cache */
- __u8 install; /* +1 = install, -1 = remove, 0 = neither */
-};
-
-struct swimcmd_tagbufctl {
- __u8 code; /* CMD_TAGBUFF_CTRL */
- __u8 unused;
- __u16 error;
- caddr_t buf; /* buffer address or 0 to disable */
-};
-
-struct swimcmd_geticon {
- __u8 code; /* CMD_GET_ICON */
- __u8 drive_num;
- __u16 error;
- caddr_t buffer; /* Nuffer address */
- __u16 kind; /* 0 = media icon, 1 = drive icon */
- __u16 unused;
- __u16 max_bytes; /* maximum byte count */
-};
-
-/* Messages from the SWIM IOP to the host CPU: */
-
-struct swimmsg_status {
- __u8 code; /* 1 = insert, 2 = eject, 3 = status changed */
- __u8 drive_num;
- __u16 error;
- struct swim_drvstatus status;
-};
-
-#endif /* __ASSEMBLY__ */
--- /dev/null
+/*
+ * ADB through the IOP
+ * Written by Joshua M. Thompson
+ */
+
+/* IOP number and channel number for ADB */
+
+#define ADB_IOP IOP_NUM_ISM
+#define ADB_CHAN 2
+
+/* From the A/UX headers...maybe important, maybe not */
+
+#define ADB_IOP_LISTEN 0x01
+#define ADB_IOP_TALK 0x02
+#define ADB_IOP_EXISTS 0x04
+#define ADB_IOP_FLUSH 0x08
+#define ADB_IOP_RESET 0x10
+#define ADB_IOP_INT 0x20
+#define ADB_IOP_POLL 0x40
+#define ADB_IOP_UNINT 0x80
+
+#define AIF_RESET 0x00
+#define AIF_FLUSH 0x01
+#define AIF_LISTEN 0x08
+#define AIF_TALK 0x0C
+
+/* Flag bits in struct adb_iopmsg */
+
+#define ADB_IOP_EXPLICIT 0x80 /* nonzero if explicit command */
+#define ADB_IOP_AUTOPOLL 0x40 /* auto/SRQ polling enabled */
+#define ADB_IOP_SRQ 0x04 /* SRQ detected */
+#define ADB_IOP_TIMEOUT 0x02 /* nonzero if timeout */
+
+#ifndef __ASSEMBLY__
+
+struct adb_iopmsg {
+ __u8 flags; /* ADB flags */
+ __u8 count; /* no. of data bytes */
+ __u8 cmd; /* ADB command */
+ __u8 data[8]; /* ADB data */
+ __u8 spare[21]; /* spare */
+};
+
+#endif /* __ASSEMBLY__ */
--- /dev/null
+/*
+ * include/linux/m68kserial.h
+ *
+ * Copyright (C) 1992 by Theodore Ts'o.
+ *
+ * Redistribution of this file is permitted under the terms of the GNU
+ * Public License (GPL)
+ *
+ * 2/28/99 RZ: renamed to allow coexistence with serial.c driver
+ */
+
+
+#ifndef _M68K_SERIAL_H
+#define _M68K_SERIAL_H
+
+
+/* m68k serial port types are numbered from 100 to avoid interference
+ * with the PC types (1..4)
+ */
+#define PORT_UNKNOWN 0
+#define PORT_8250 1
+#define PORT_16450 2
+#define PORT_16550 3
+#define PORT_16550A 4
+#define PORT_CIRRUS 5
+#define PORT_16650V2 7
+#define PORT_16750 8
+
+#define SER_SCC_NORM 100 /* standard SCC channel */
+#define SER_SCC_DMA 101 /* SCC channel with DMA support */
+#define SER_MFP_CTRL 102 /* standard MFP port with modem control signals */
+#define SER_MFP_BARE 103 /* MFP port without modem controls */
+#define SER_MIDI 104 /* Atari MIDI */
+#define SER_AMIGA 105 /* Amiga built-in serial port */
+#define SER_IOEXT 106 /* Amiga GVP IO-Extender (16c552) */
+#define SER_MFC_III 107 /* Amiga BSC Multiface Card III (MC68681) */
+#define SER_WHIPPET 108 /* Amiga Hisoft Whippet PCMCIA (16c550B) */
+#define SER_SCC_MVME 109 /* MVME162/MVME172 ports */
+#define SER_SCC_MAC 110 /* Macintosh SCC channel */
+#define SER_HPDCA 111 /* HP DCA serial */
+#define SER_SCC_BVME 112 /* BVME6000 ports */
+
+struct serial_struct {
+ int type;
+ int line;
+ int port;
+ int irq;
+ int flags;
+ int xmit_fifo_size;
+ int custom_divisor;
+ int baud_base;
+ unsigned short close_delay;
+ char reserved_char[2];
+ int hub6;
+ unsigned short closing_wait; /* time to wait before closing */
+ unsigned short closing_wait2; /* no longer used... */
+ int reserved[4];
+};
+
+/*
+ * For the close wait times, 0 means wait forever for serial port to
+ * flush its output. 65535 means don't wait at all.
+ */
+#define ASYNC_CLOSING_WAIT_INF 0
+#define ASYNC_CLOSING_WAIT_NONE 65535
+
+/* This function tables does the abstraction from the underlying
+ * hardware:
+ *
+ * init(): Initialize the port as necessary, set RTS and DTR and
+ * enable interrupts. It does not need to set the speed and other
+ * parameters, because change_speed() is called, too.
+ * deinit(): Stop and shutdown the port (e.g. disable interrupts, ...)
+ * enab_tx_int(): Enable or disable the Tx Buffer Empty interrupt
+ * independently from other interrupt sources. If the int is
+ * enabled, the transmitter should also be restarted, i.e. if there
+ * are any chars to be sent, they should be put into the Tx
+ * register. The real en/disabling of the interrupt may be a no-op
+ * if there is no way to do this or it is too complex. This Tx ints
+ * are just disabled to save some interrupts if the transmitter is
+ * stopped anyway. But the restarting must be implemented!
+ * check_custom_divisor(): Check the given custom divisor for legality
+ * and return 0 if OK, non-zero otherwise.
+ * change_speed(): Set port speed, character size, number of stop
+ * bits and parity from the termios structure. If the user wants
+ * to set the speed with a custom divisor, he is required to
+ * check the baud_base first!
+ * throttle(): Set or clear the RTS line according to 'status'.
+ * set_break(): Set or clear the 'Send a Break' flag.
+ * get_serial_info(): Fill in the baud_base and custom_divisor
+ * fields of a serial_struct. It may also modify other fields, if
+ * needed.
+ * get_modem_info(): Return the status of RTS, DTR, DCD, RI, DSR and CTS.
+ * set_modem_info(): Set the status of RTS and DTR according to
+ * 'new_dtr' and 'new_rts', resp. 0 = clear, 1 = set, -1 = don't change
+ * ioctl(): Process any port-specific ioctl's. This pointer may be
+ * NULL, if the port has no own ioctl's.
+ * stop_receive(): Turn off the Rx part of the port, so no more characters
+ * will be received. This is called before shutting the port down.
+ * trans_empty(): Return !=0 if there are no more characters still to be
+ * sent out (Tx buffer register and FIFOs empty)
+ * check_open(): Is called before the port is opened. The driver can check
+ * if that's ok and return an error code, or keep track of the opening
+ * even before init() is called. Use deinit() for matching closing of the
+ * port.
+ *
+ */
+
+struct m68k_async_struct;
+
+typedef struct {
+ void (*init)( struct m68k_async_struct *info );
+ void (*deinit)( struct m68k_async_struct *info, int leave_dtr );
+ void (*enab_tx_int)( struct m68k_async_struct *info, int enab_flag );
+ int (*check_custom_divisor)( struct m68k_async_struct *info, int baud_base,
+ int divisor );
+ void (*change_speed)( struct m68k_async_struct *info );
+ void (*throttle)( struct m68k_async_struct *info, int status );
+ void (*set_break)( struct m68k_async_struct *info, int break_flag );
+ void (*get_serial_info)( struct m68k_async_struct *info,
+ struct serial_struct *retinfo );
+ unsigned int (*get_modem_info)( struct m68k_async_struct *info );
+ int (*set_modem_info)( struct m68k_async_struct *info, int new_dtr,
+ int new_rts );
+ int (*ioctl)( struct tty_struct *tty, struct file *file,
+ struct m68k_async_struct *info, unsigned int cmd,
+ unsigned long arg );
+ void (*stop_receive)( struct m68k_async_struct *info );
+ int (*trans_empty)( struct m68k_async_struct *info );
+ int (*check_open)( struct m68k_async_struct *info, struct tty_struct *tty,
+ struct file *file );
+} SERIALSWITCH;
+
+/*
+ * Definitions for m68k_async_struct (and serial_struct) flags field
+ */
+#define ASYNC_HUP_NOTIFY 0x0001 /* Notify getty on hangups and closes
+ on the callout port */
+#define ASYNC_FOURPORT 0x0002 /* Set OU1, OUT2 per AST Fourport settings */
+#define ASYNC_SAK 0x0004 /* Secure Attention Key (Orange book) */
+#define ASYNC_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
+
+#define ASYNC_SPD_MASK 0x1030
+#define ASYNC_SPD_HI 0x0010 /* Use 56000 instead of 38400 bps */
+
+#define ASYNC_SPD_VHI 0x0020 /* Use 115200 instead of 38400 bps */
+#define ASYNC_SPD_CUST 0x0030 /* Use user-specified divisor */
+
+#define ASYNC_SKIP_TEST 0x0040 /* Skip UART test during autoconfiguration */
+#define ASYNC_AUTO_IRQ 0x0080 /* Do automatic IRQ during autoconfiguration */
+#define ASYNC_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
+#define ASYNC_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */
+#define ASYNC_CALLOUT_NOHUP 0x0400 /* Don't do hangups for cua device */
+
+#define ASYNC_HARDPPS_CD 0x0800 /* Call hardpps when CD goes high */
+
+#define ASYNC_SPD_SHI 0x1000 /* Use 230400 instead of 38400 bps */
+#define ASYNC_SPD_WARP 0x1010 /* Use 460800 instead of 38400 bps */
+
+#define ASYNC_FLAGS 0x1FFF /* Possible legal async flags */
+#define ASYNC_USR_MASK 0x1430 /* Legal flags that non-privileged
+ * users can set or reset */
+
+/* Internal flags used only by drivers/char/m68kserial.c */
+#define ASYNC_INITIALIZED 0x80000000 /* Serial port was initialized */
+#define ASYNC_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
+#define ASYNC_NORMAL_ACTIVE 0x20000000 /* Normal device is active */
+#define ASYNC_BOOT_AUTOCONF 0x10000000 /* Autoconfigure port on bootup */
+#define ASYNC_CLOSING 0x08000000 /* Serial port is closing */
+#define ASYNC_CTS_FLOW 0x04000000 /* Do CTS flow control */
+#define ASYNC_CHECK_CD 0x02000000 /* i.e., CLOCAL */
+
+#define ASYNC_INTERNAL_FLAGS 0xFF000000 /* Internal flags */
+
+/*
+ * Serial input interrupt line counters -- external structure
+ * Four lines can interrupt: CTS, DSR, RI, DCD
+ */
+struct serial_icounter_struct {
+ int cts, dsr, rng, dcd;
+ int rx, tx;
+ int frame, overrun, parity, brk;
+ int buf_overrun;
+ int reserved[9];
+};
+
+
+#ifdef __KERNEL__
+/*
+ * This is our internal structure for each serial port's state.
+ *
+ * Many fields are paralleled by the structure used by the serial_struct
+ * structure.
+ *
+ * For definitions of the flags field, see tty.h
+ */
+
+#include <linux/termios.h>
+#include <linux/tqueue.h>
+
+#include <linux/config.h> /* for Mac SCC extensions */
+
+#ifdef CONFIG_MAC
+#define NUM_ZSREGS 16
+struct mac_zschannel {
+ volatile unsigned char *control;
+ volatile unsigned char *data;
+};
+struct m68k_async_private;
+#endif
+
+struct m68k_async_struct {
+ int magic;
+ int baud_base;
+ int port;
+ int irq;
+ int flags; /* defined in tty.h */
+ int hub6; /* HUB6 plus one */
+ int type;
+ struct tty_struct *tty;
+ int read_status_mask;
+ int ignore_status_mask;
+ int timeout;
+ int xmit_fifo_size;
+ int custom_divisor;
+ int x_char; /* xon/xoff character */
+ int close_delay;
+ unsigned short closing_wait;
+ unsigned short closing_wait2;
+ int IER; /* Interrupt Enable Register */
+ int MCR; /* Modem control register */
+ int MCR_noint; /* MCR with interrupts off */
+ unsigned long event;
+ unsigned long last_active;
+ int line;
+ int count; /* # of fd on device */
+ int blocked_open; /* # of blocked opens */
+ long session; /* Session of opening process */
+ long pgrp; /* pgrp of opening process */
+ unsigned char *xmit_buf;
+ int xmit_head;
+ int xmit_tail;
+ int xmit_cnt;
+ struct tq_struct tqueue;
+ struct termios normal_termios;
+ struct termios callout_termios;
+ struct wait_queue *open_wait;
+ struct wait_queue *close_wait;
+ struct wait_queue *delta_msr_wait;
+ struct async_icount icount; /* kernel counters for the 4 input interrupts */
+ struct m68k_async_struct *next_port; /* For the linked list */
+ struct m68k_async_struct *prev_port;
+ void *board_base; /* board-base address for use with
+ boards carrying several UART's,
+ like some Amiga boards. */
+ unsigned short nr_uarts; /* UART-counter, that indicates
+ how many UART's there are on
+ the board. If the board has a
+ IRQ-register, this can be used
+ to check if any of the uarts,
+ on the board has requested an
+ interrupt, instead of checking
+ IRQ-registers on all UART's */
+ SERIALSWITCH *sw; /* functions to manage this port */
+#ifdef CONFIG_MAC
+ struct m68k_async_private *private;
+#endif
+};
+
+#ifdef CONFIG_MAC
+struct m68k_async_private {
+ struct m68k_async_info *zs_next; /* For IRQ servicing chain */
+ struct mac_zschannel *zs_channel; /* Channel registers */
+ struct mac_zschannel *zs_chan_a; /* A side registers */
+ unsigned char read_reg_zero;
+
+ char soft_carrier; /* Use soft carrier on this */
+ char break_abort; /* console, process brk/abrt */
+ char kgdb_channel; /* Kgdb running on this channel */
+ char is_cons; /* Is this our console. */
+ unsigned char tx_active; /* character being xmitted */
+ unsigned char tx_stopped; /* output is suspended */
+
+ /* We need to know the current clock divisor
+ * to read the bps rate the chip has currently
+ * loaded.
+ */
+ unsigned char clk_divisor; /* May be 1, 16, 32, or 64 */
+ int zs_baud;
+
+ /* Current write register values */
+ unsigned char curregs[NUM_ZSREGS];
+
+ /* Values we need to set next opportunity */
+ unsigned char pendregs[NUM_ZSREGS];
+
+ char change_needed;
+};
+#endif
+#define SERIAL_MAGIC 0x5301
+
+/*
+ * The size of the serial xmit buffer is 1 page, or 4096 bytes
+ */
+#define SERIAL_XMIT_SIZE 4096
+
+/*
+ * Events are used to schedule things to happen at timer-interrupt
+ * time, instead of at rs interrupt time.
+ */
+#define RS_EVENT_WRITE_WAKEUP 0
+
+/* number of characters left in xmit buffer before we ask for more */
+#define WAKEUP_CHARS 256
+
+/* Export to allow PCMCIA to use this - Dave Hinds */
+extern int m68k_register_serial(struct serial_struct *req);
+extern void m68k_unregister_serial(int line);
+extern int register_serial(struct serial_struct *req);
+extern void unregister_serial(int line);
+extern struct m68k_async_struct rs_table[];
+extern task_queue tq_serial;
+
+
+/*
+ * This routine is used by the interrupt handler to schedule
+ * processing in the software interrupt portion of the driver.
+ */
+static __inline__ void rs_sched_event(struct m68k_async_struct *info, int event)
+{
+ info->event |= 1 << event;
+ queue_task(&info->tqueue, &tq_serial);
+ mark_bh(SERIAL_BH);
+}
+
+static __inline__ void rs_receive_char( struct m68k_async_struct *info,
+ int ch, int err )
+{
+ struct tty_struct *tty = info->tty;
+
+ if (tty->flip.count >= TTY_FLIPBUF_SIZE)
+ return;
+ tty->flip.count++;
+ switch(err) {
+ case TTY_BREAK:
+ info->icount.brk++;
+ if (info->flags & ASYNC_SAK)
+ do_SAK(tty);
+ break;
+ case TTY_PARITY:
+ info->icount.parity++;
+ break;
+ case TTY_OVERRUN:
+ info->icount.overrun++;
+ break;
+ case TTY_FRAME:
+ info->icount.frame++;
+ break;
+ }
+ *tty->flip.flag_buf_ptr++ = err;
+ *tty->flip.char_buf_ptr++ = ch;
+ info->icount.rx++;
+ tty_flip_buffer_push(tty);
+}
+
+static __inline__ int rs_get_tx_char( struct m68k_async_struct *info )
+{
+ unsigned char ch;
+
+ if (info->x_char) {
+ ch = info->x_char;
+ info->icount.tx++;
+ info->x_char = 0;
+ return( ch );
+ }
+
+ if (info->xmit_cnt <= 0 || info->tty->stopped || info->tty->hw_stopped)
+ return( -1 );
+
+ ch = info->xmit_buf[info->xmit_tail++];
+ info->xmit_tail &= SERIAL_XMIT_SIZE - 1;
+ info->icount.tx++;
+ if (--info->xmit_cnt < WAKEUP_CHARS)
+ rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
+ return( ch );
+}
+
+static __inline__ int rs_no_more_tx( struct m68k_async_struct *info )
+{
+ return( info->xmit_cnt <= 0 ||
+ info->tty->stopped ||
+ info->tty->hw_stopped );
+}
+
+static __inline__ void rs_dcd_changed( struct m68k_async_struct *info, int dcd )
+
+{
+ /* update input line counter */
+ info->icount.dcd++;
+ wake_up_interruptible(&info->delta_msr_wait);
+
+ if (info->flags & ASYNC_CHECK_CD) {
+#if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
+ printk("ttyS%d CD now %s...", info->line,
+ dcd ? "on" : "off");
+#endif
+ if (dcd) {
+ wake_up_interruptible(&info->open_wait);
+ } else if (!((info->flags & ASYNC_CALLOUT_ACTIVE) &&
+ (info->flags & ASYNC_CALLOUT_NOHUP))) {
+#ifdef SERIAL_DEBUG_OPEN
+ printk("scheduling hangup...");
+#endif
+ if (info->tty)
+ tty_hangup(info->tty);
+ }
+ }
+}
+
+
+void rs_stop( struct tty_struct *tty );
+void rs_start( struct tty_struct *tty );
+
+static __inline__ void rs_check_cts( struct m68k_async_struct *info, int cts )
+{
+ /* update input line counter */
+ info->icount.cts++;
+ wake_up_interruptible(&info->delta_msr_wait);
+
+ if ((info->flags & ASYNC_CTS_FLOW) && info->tty) {
+ if (info->tty->hw_stopped) {
+ if (cts) {
+#if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
+ printk("CTS tx start...");
+#endif
+ info->tty->hw_stopped = 0;
+ rs_start( info->tty );
+ rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
+ return;
+ }
+ } else {
+ if (!cts) {
+ info->tty->hw_stopped = 1;
+ rs_stop( info->tty );
+ }
+ }
+ }
+}
+
+
+#endif /* __KERNEL__ */
+
+#endif /* _M68K_SERIAL_H */
+
--- /dev/null
+/*
+ * I/O Processor (IOP) defines and structures, mostly snagged from A/UX
+ * header files.
+ *
+ * The original header from which this was taken is copyrighted. I've done some
+ * rewriting (in fact my changes make this a bit more readable, IMHO) but some
+ * more should be done.
+ */
+
+/*
+ * This is the base address of the IOPs. Use this as the address of
+ * a "struct iop" (see below) to see where the actual registers fall.
+ */
+
+#define SCC_IOP_BASE_IIFX (0x50F04000)
+#define ISM_IOP_BASE_IIFX (0x50F12000)
+
+#define SCC_IOP_BASE_QUADRA (0x50F0C000)
+#define ISM_IOP_BASE_QUADRA (0x50F1E000)
+
+/* IOP status/control register bits: */
+
+#define IOP_BYPASS 0x01 /* bypass-mode hardware access */
+#define IOP_AUTOINC 0x02 /* allow autoincrement of ramhi/lo */
+#define IOP_RUN 0x04 /* set to 0 to reset IOP chip */
+#define IOP_IRQ 0x08 /* generate IRQ to IOP if 1 */
+#define IOP_INT0 0x10 /* intr priority from IOP to host */
+#define IOP_INT1 0x20 /* intr priority from IOP to host */
+#define IOP_HWINT 0x40 /* IRQ from hardware; bypass mode only */
+#define IOP_DMAINACTIVE 0x80 /* no DMA request active; bypass mode only */
+
+#define NUM_IOPS 2
+#define NUM_IOP_CHAN 7
+#define NUM_IOP_MSGS NUM_IOP_CHAN*8
+#define IOP_MSG_LEN 32
+
+/* IOP reference numbers, used by the globally-visible iop_xxx functions */
+
+#define IOP_NUM_SCC 0
+#define IOP_NUM_ISM 1
+
+/* IOP channel states */
+
+#define IOP_MSG_IDLE 0 /* idle */
+#define IOP_MSG_NEW 1 /* new message sent */
+#define IOP_MSG_RCVD 2 /* message received; processing */
+#define IOP_MSG_COMPLETE 3 /* message processing complete */
+
+/* IOP message status codes */
+
+#define IOP_MSGSTATUS_UNUSED 0 /* Unusued message structure */
+#define IOP_MSGSTATUS_WAITING 1 /* waiting for channel */
+#define IOP_MSGSTATUS_SENT 2 /* message sent, awaiting reply */
+#define IOP_MSGSTATUS_COMPLETE 3 /* message complete and reply rcvd */
+#define IOP_MSGSTATUS_UNSOL 6 /* message is unsolicited */
+
+/* IOP memory addresses of the members of the the mac_iop_kernel structure. */
+
+#define IOP_ADDR_MAX_SEND_CHAN 0x0200
+#define IOP_ADDR_SEND_STATE 0x0201
+#define IOP_ADDR_PATCH_CTRL 0x021F
+#define IOP_ADDR_SEND_MSG 0x0220
+#define IOP_ADDR_MAX_RECV_CHAN 0x0300
+#define IOP_ADDR_RECV_STATE 0x0301
+#define IOP_ADDR_ALIVE 0x031F
+#define IOP_ADDR_RECV_MSG 0x0320
+
+#ifndef __ASSEMBLY__
+
+/*
+ * IOP Control registers, staggered because in usual Apple style they were
+ * too lazy to decode the A0 bit. This structure is assumed to begin at
+ * one of the xxx_IOP_BASE addresses given above.
+ */
+
+struct mac_iop {
+ __u8 ram_addr_hi; /* shared RAM address hi byte */
+ __u8 pad0;
+ __u8 ram_addr_lo; /* shared RAM address lo byte */
+ __u8 pad1;
+ __u8 status_ctrl; /* status/control register */
+ __u8 pad2[3];
+ __u8 ram_data; /* RAM data byte at ramhi/lo */
+
+ __u8 pad3[23];
+
+ /* Bypass-mode hardware access registers */
+
+ union {
+ struct { /* SCC registers */
+ __u8 sccb_cmd; /* SCC B command reg */
+ __u8 pad4;
+ __u8 scca_cmd; /* SCC A command reg */
+ __u8 pad5;
+ __u8 sccb_data; /* SCC B data */
+ __u8 pad6;
+ __u8 scca_data; /* SCC A data */
+ } scc_regs;
+
+ struct { /* ISM registers */
+ __u8 wdata; /* write a data byte */
+ __u8 pad7;
+ __u8 wmark; /* write a mark byte */
+ __u8 pad8;
+ __u8 wcrc; /* write 2-byte crc to disk */
+ __u8 pad9;
+ __u8 wparams; /* write the param regs */
+ __u8 pad10;
+ __u8 wphase; /* write the phase states & dirs */
+ __u8 pad11;
+ __u8 wsetup; /* write the setup register */
+ __u8 pad12;
+ __u8 wzeroes; /* mode reg: 1's clr bits, 0's are x */
+ __u8 pad13;
+ __u8 wones; /* mode reg: 1's set bits, 0's are x */
+ __u8 pad14;
+ __u8 rdata; /* read a data byte */
+ __u8 pad15;
+ __u8 rmark; /* read a mark byte */
+ __u8 pad16;
+ __u8 rerror; /* read the error register */
+ __u8 pad17;
+ __u8 rparams; /* read the param regs */
+ __u8 pad18;
+ __u8 rphase; /* read the phase states & dirs */
+ __u8 pad19;
+ __u8 rsetup; /* read the setup register */
+ __u8 pad20;
+ __u8 rmode; /* read the mode register */
+ __u8 pad21;
+ __u8 rhandshake; /* read the handshake register */
+ } ism_regs;
+ } b;
+};
+
+/* This structure is used to track IOP messages in the Linux kernel */
+
+struct iop_msg {
+ struct iop_msg *next; /* next message in queue or NULL */
+ uint iop_num; /* IOP number */
+ uint channel; /* channel number */
+ void *caller_priv; /* caller private data */
+ int status; /* status of this message */
+ __u8 message[IOP_MSG_LEN]; /* the message being sent/received */
+ __u8 reply[IOP_MSG_LEN]; /* the reply to the message */
+ void (*handler)(struct iop_msg *, struct pt_regs *);
+ /* function to call when reply recvd */
+};
+
+extern int iop_scc_present,iop_ism_present;
+
+extern int iop_listen(uint, uint,
+ void (*handler)(struct iop_msg *, struct pt_regs *),
+ const char *);
+extern int iop_send_message(uint, uint, void *, uint, __u8 *,
+ void (*)(struct iop_msg *, struct pt_regs *));
+extern void iop_complete_message(struct iop_msg *);
+extern void iop_upload_code(uint, __u8 *, uint, __u16);
+extern void iop_download_code(uint, __u8 *, uint, __u16);
+extern __u8 *iop_compare_code(uint, __u8 *, uint, __u16);
+
+#endif /* __ASSEMBLY__ */
--- /dev/null
+/*
+ * OSS
+ *
+ * This is used in place of VIA2 on the IIfx.
+ */
+
+#define OSS_BASE (0x50f1a000)
+
+/*
+ * Interrupt level offsets for mac_oss->irq_level
+ */
+
+#define OSS_NUBUS0 0
+#define OSS_NUBUS1 1
+#define OSS_NUBUS2 2
+#define OSS_NUBUS3 3
+#define OSS_NUBUS4 4
+#define OSS_NUBUS5 5
+#define OSS_IOPISM 6
+#define OSS_IOPSCC 7
+#define OSS_SOUND 8
+#define OSS_SCSI 9
+#define OSS_60HZ 10
+#define OSS_VIA1 11
+#define OSS_UNUSED1 12
+#define OSS_UNUSED2 13
+#define OSS_PARITY 14
+#define OSS_UNUSED3 15
+
+#define OSS_NUM_SOURCES 16
+
+/*
+ * Pending interrupt bits in mac_oss->irq_pending
+ */
+
+#define OSS_IP_NUBUS0 0x0001
+#define OSS_IP_NUBUS1 0x0002
+#define OSS_IP_NUBUS2 0x0004
+#define OSS_IP_NUBUS3 0x0008
+#define OSS_IP_NUBUS4 0x0010
+#define OSS_IP_NUBUS5 0x0020
+#define OSS_IP_IOPISM 0x0040
+#define OSS_IP_IOPSCC 0x0080
+#define OSS_IP_SOUND 0x0100
+#define OSS_IP_SCSI 0x0200
+#define OSS_IP_60HZ 0x0400
+#define OSS_IP_VIA1 0x0800
+#define OSS_IP_UNUSED1 0x1000
+#define OSS_IP_UNUSED2 0x2000
+#define OSS_IP_PARITY 0x4000
+#define OSS_IP_UNUSED3 0x8000
+
+#define OSS_IP_NUBUS (OSS_IP_NUBUS0|OSS_IP_NUBUS1|OSS_IP_NUBUS2|OSS_IP_NUBUS3|OSS_IP_NUBUS4|OSS_IP_NUBUS5)
+
+/*
+ * Rom Control Register
+ */
+
+#define OSS_POWEROFF 0x80
+
+/*
+ * OSS Interrupt levels for various sub-systems
+ *
+ * This mapping is layed out with two things in mind: first, we try to keep
+ * things on their own levels to avoid having to do double-dispatches. Second,
+ * the levels match as closely as possible the alternate IRQ mapping mode (aka
+ * "A/UX mode") available on some VIA machines.
+ */
+
+#define OSS_IRQLEV_DISABLED 0
+#define OSS_IRQLEV_IOPISM 1 /* ADB? */
+#define OSS_IRQLEV_SCSI 2
+#define OSS_IRQLEV_NUBUS 3 /* keep this on its own level */
+#define OSS_IRQLEV_IOPSCC 4 /* matches VIA alternate mapping */
+#define OSS_IRQLEV_SOUND 5 /* matches VIA alternate mapping */
+#define OSS_IRQLEV_60HZ 6 /* matches VIA alternate mapping */
+#define OSS_IRQLEV_VIA1 6 /* matches VIA alternate mapping */
+#define OSS_IRQLEV_PARITY 7 /* matches VIA alternate mapping */
+
+#ifndef __ASSEMBLY__
+
+struct mac_oss {
+ __u8 irq_level[0x10]; /* [0x000-0x00f] Interrupt levels */
+ __u8 padding0[0x1F2]; /* [0x010-0x201] IO space filler */
+ __u16 irq_pending; /* [0x202-0x203] pending interrupts bits */
+ __u8 rom_ctrl; /* [0x204-0x204] ROM cntl reg (for poweroff) */
+ __u8 padding1[0x2]; /* [0x205-0x206] currently unused by A/UX */
+ __u8 ack_60hz; /* [0x207-0x207] 60 Hz ack. */
+};
+
+extern volatile struct mac_oss *oss;
+extern int oss_present;
+
+#endif /* __ASSEMBLY__ */
--- /dev/null
+/*
+ * 6522 Versatile Interface Adapter (VIA)
+ *
+ * There are two of these on the Mac II. Some IRQ's are vectored
+ * via them as are assorted bits and bobs - eg rtc, adb. The picture
+ * is a bit incomplete as the Mac documentation doesnt cover this well
+ */
+
+#ifndef _ASM_VIA6522_H_
+#define _ASM_VIA6522_H_
+
+/*
+ * Base addresses for the VIAs. There are two in every machine,
+ * although on some machines the second is an RBV or an OSS.
+ * The OSS is different enough that it's handled separately.
+ *
+ * Do not use these values directly; use the via1 and via2 variables
+ * instead (and don't forget to check rbv_present when using via2!)
+ */
+
+#define VIA1_BASE (0x50F00000)
+#define VIA2_BASE (0x50F02000)
+#define RBV_BASE (0x50F26000)
+
+/*
+ * Not all of these are true post MacII I think.
+ * CSA: probably the ones CHRP marks as 'unused' change purposes
+ * when the IWM becomes the SWIM.
+ * http://www.rs6000.ibm.com/resource/technology/chrpio/via5.mak.html
+ * ftp://ftp.austin.ibm.com/pub/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
+ *
+ * also, http://developer.apple.com/technotes/hw/hw_09.html claims the
+ * following changes for IIfx:
+ * VIA1A_vSccWrReq not available and that VIA1A_vSync has moved to an IOP.
+ * Also, "All of the functionality of VIA2 has been moved to other chips".
+ */
+
+#define VIA1A_vSccWrReq 0x80 /* SCC write. (input)
+ * [CHRP] SCC WREQ: Reflects the state of the
+ * Wait/Request pins from the SCC.
+ * [Macintosh Family Hardware]
+ * as CHRP on SE/30,II,IIx,IIcx,IIci.
+ * on IIfx, "0 means an active request"
+ */
+#define VIA1A_vRev8 0x40 /* Revision 8 board ???
+ * [CHRP] En WaitReqB: Lets the WaitReq_L
+ * signal from port B of the SCC appear on
+ * the PA7 input pin. Output.
+ * [Macintosh Family] On the SE/30, this
+ * is the bit to flip screen buffers.
+ * 0=alternate, 1=main.
+ * on II,IIx,IIcx,IIci,IIfx this is a bit
+ * for Rev ID. 0=II,IIx, 1=IIcx,IIci,IIfx
+ */
+#define VIA1A_vHeadSel 0x20 /* Head select for IWM.
+ * [CHRP] unused.
+ * [Macintosh Family] "Floppy disk
+ * state-control line SEL" on all but IIfx
+ */
+#define VIA1A_vOverlay 0x10 /* [Macintosh Family] On SE/30,II,IIx,IIcx
+ * this bit enables the "Overlay" address
+ * map in the address decoders as it is on
+ * reset for mapping the ROM over the reset
+ * vector. 1=use overlay map.
+ * On the IIci,IIfx it is another bit of the
+ * CPU ID: 0=normal IIci, 1=IIci with parity
+ * feature or IIfx.
+ * [CHRP] En WaitReqA: Lets the WaitReq_L
+ * signal from port A of the SCC appear
+ * on the PA7 input pin (CHRP). Output.
+ * [MkLinux] "Drive Select"
+ * (with 0x20 being 'disk head select')
+ */
+#define VIA1A_vSync 0x08 /* [CHRP] Sync Modem: modem clock select:
+ * 1: select the external serial clock to
+ * drive the SCC's /RTxCA pin.
+ * 0: Select the 3.6864MHz clock to drive
+ * the SCC cell.
+ * [Macintosh Family] Correct on all but IIfx
+ */
+
+/* Macintosh Family Hardware sez: bits 0-2 of VIA1A are volume control
+ * on Macs which had the PWM sound hardware. Reserved on newer models.
+ * On IIci,IIfx, bits 1-2 are the rest of the CPU ID:
+ * bit 2: 1=IIci, 0=IIfx
+ * bit 1: 1 on both IIci and IIfx.
+ * MkLinux sez bit 0 is 'burnin flag' in this case.
+ * CHRP sez: VIA1A bits 0-2 and 5 are 'unused': if programmed as
+ * inputs, these bits will read 0.
+ */
+#define VIA1A_vVolume 0x07 /* Audio volume mask for PWM */
+#define VIA1A_CPUID0 0x02 /* CPU id bit 0 on RBV, others */
+#define VIA1A_CPUID1 0x04 /* CPU id bit 0 on RBV, others */
+#define VIA1A_CPUID2 0x10 /* CPU id bit 0 on RBV, others */
+#define VIA1A_CPUID3 0x40 /* CPU id bit 0 on RBV, others */
+
+/* Info on VIA1B is from Macintosh Family Hardware & MkLinux.
+ * CHRP offers no info. */
+#define VIA1B_vSound 0x80 /* Sound enable (for compatibility with
+ * PWM hardware) 0=enabled.
+ * Also, on IIci w/parity, shows parity error
+ * 0=error, 1=OK. */
+#define VIA1B_vMystery 0x40 /* On IIci, parity enable. 0=enabled,1=disabled
+ * On SE/30, vertical sync interrupt enable.
+ * 0=enabled. This vSync interrupt shows up
+ * as a slot $E interrupt. */
+#define VIA1B_vADBS2 0x20 /* ADB state input bit 1 (unused on IIfx) */
+#define VIA1B_vADBS1 0x10 /* ADB state input bit 0 (unused on IIfx) */
+#define VIA1B_vADBInt 0x08 /* ADB interrupt 0=interrupt (unused on IIfx)*/
+#define VIA1B_vRTCEnb 0x04 /* Enable Real time clock. 0=enabled. */
+#define VIA1B_vRTCClk 0x02 /* Real time clock serial-clock line. */
+#define VIA1B_vRTCData 0x01 /* Real time clock serial-data line. */
+
+/* MkLinux defines the following "VIA1 Register B contents where they
+ * differ from standard VIA1". From the naming scheme, we assume they
+ * correspond to a VIA work-alike named 'EVR'. */
+#define EVRB_XCVR 0x08 /* XCVR_SESSION* */
+#define EVRB_FULL 0x10 /* VIA_FULL */
+#define EVRB_SYSES 0x20 /* SYS_SESSION */
+#define EVRB_AUXIE 0x00 /* Enable A/UX Interrupt Scheme */
+#define EVRB_AUXID 0x40 /* Disable A/UX Interrupt Scheme */
+#define EVRB_SFTWRIE 0x00 /* Software Interrupt ReQuest */
+#define EVRB_SFTWRID 0x80 /* Software Interrupt ReQuest */
+
+/*
+ * VIA2 A register is the interrupt lines raised off the nubus
+ * slots.
+ * The below info is from 'Macintosh Family Hardware.'
+ * MkLinux calls the 'IIci internal video IRQ' below the 'RBV slot 0 irq.'
+ * It also notes that the slot $9 IRQ is the 'Ethernet IRQ' and
+ * defines the 'Video IRQ' as 0x40 for the 'EVR' VIA work-alike.
+ * Perhaps OSS uses vRAM1 and vRAM2 for ADB.
+ */
+
+#define VIA2A_vRAM1 0x80 /* RAM size bit 1 (IIci: reserved) */
+#define VIA2A_vRAM0 0x40 /* RAM size bit 0 (IIci: internal video IRQ) */
+#define VIA2A_vIRQE 0x20 /* IRQ from slot $E */
+#define VIA2A_vIRQD 0x10 /* IRQ from slot $D */
+#define VIA2A_vIRQC 0x08 /* IRQ from slot $C */
+#define VIA2A_vIRQB 0x04 /* IRQ from slot $B */
+#define VIA2A_vIRQA 0x02 /* IRQ from slot $A */
+#define VIA2A_vIRQ9 0x01 /* IRQ from slot $9 */
+
+/* RAM size bits decoded as follows:
+ * bit1 bit0 size of ICs in bank A
+ * 0 0 256 kbit
+ * 0 1 1 Mbit
+ * 1 0 4 Mbit
+ * 1 1 16 Mbit
+ */
+
+/*
+ * Register B has the fun stuff in it
+ */
+
+#define VIA2B_vVBL 0x80 /* VBL output to VIA1 (60.15Hz) driven by
+ * timer T1.
+ * on IIci, parity test: 0=test mode.
+ * [MkLinux] RBV_PARODD: 1=odd,0=even. */
+#define VIA2B_vSndJck 0x40 /* External sound jack status.
+ * 0=plug is inserted. On SE/30, always 0 */
+#define VIA2B_vTfr0 0x20 /* Transfer mode bit 0 ack from NuBus */
+#define VIA2B_vTfr1 0x10 /* Transfer mode bit 1 ack from NuBus */
+#define VIA2B_vMode32 0x08 /* 24/32bit switch - doubles as cache flush
+ * on II, AMU/PMMU control.
+ * if AMU, 0=24bit to 32bit translation
+ * if PMMU, 1=PMMU is accessing page table.
+ * on SE/30 tied low.
+ * on IIx,IIcx,IIfx, unused.
+ * on IIci/RBV, cache control. 0=flush cache.
+ */
+#define VIA2B_vPower 0x04 /* Power off, 0=shut off power.
+ * on SE/30 this signal sent to PDS card. */
+#define VIA2B_vBusLk 0x02 /* Lock NuBus transactions, 0=locked.
+ * on SE/30 sent to PDS card. */
+#define VIA2B_vCDis 0x01 /* Cache control. On IIci, 1=disable cache card
+ * on others, 0=disable processor's instruction
+ * and data caches. */
+
+/* Apple sez: http://developer.apple.com/technotes/ov/ov_04.html
+ * Another example of a valid function that has no ROM support is the use
+ * of the alternate video page for page-flipping animation. Since there
+ * is no ROM call to flip pages, it is necessary to go play with the
+ * right bit in the VIA chip (6522 Versatile Interface Adapter).
+ * [CSA: don't know which one this is, but it's one of 'em!]
+ */
+
+/*
+ * 6522 registers - see databook.
+ * CSA: Assignments for VIA1 confirmed from CHRP spec.
+ */
+
+/* partial address decode. 0xYYXX : XX part for RBV, YY part for VIA */
+/* Note: 15 VIA regs, 8 RBV regs */
+
+#define vBufB 0x0000 /* [VIA/RBV] Register B */
+#define vBufAH 0x0200 /* [VIA only] Buffer A, with handshake. DON'T USE! */
+#define vDirB 0x0400 /* [VIA only] Data Direction Register B. */
+#define vDirA 0x0600 /* [VIA only] Data Direction Register A. */
+#define vT1CL 0x0800 /* [VIA only] Timer one counter low. */
+#define vT1CH 0x0a00 /* [VIA only] Timer one counter high. */
+#define vT1LL 0x0c00 /* [VIA only] Timer one latches low. */
+#define vT1LH 0x0e00 /* [VIA only] Timer one latches high. */
+#define vT2CL 0x1000 /* [VIA only] Timer two counter low. */
+#define vT2CH 0x1200 /* [VIA only] Timer two counter high. */
+#define vSR 0x1400 /* [VIA only] Shift register. */
+#define vACR 0x1600 /* [VIA only] Auxilary control register. */
+#define vPCR 0x1800 /* [VIA only] Peripheral control register. */
+ /* CHRP sez never ever to *write* this.
+ * Mac family says never to *change* this.
+ * In fact we need to initialize it once at start. */
+#define vIFR 0x1a00 /* [VIA/RBV] Interrupt flag register. */
+#define vIER 0x1c00 /* [VIA/RBV] Interrupt enable register. */
+#define vBufA 0x1e00 /* [VIA/RBV] register A (no handshake) */
+
+/* The RBV only decodes the bottom eight address lines; the VIA doesn't
+ * decode the bottom eight -- so vBufB | rBufB will always get you BufB */
+/* CSA: in fact, only bits 0,1, and 4 seem to be decoded.
+ * BUT note the values for rIER and rIFR, where the top 8 bits *do* seem
+ * to matter. In fact *all* of the top 8 bits seem to matter;
+ * setting rIER=0x1813 and rIFR=0x1803 doesn't work, either.
+ * Perhaps some sort of 'compatibility mode' is built-in? [21-May-1999]
+ */
+
+#define rBufB 0x0000 /* [VIA/RBV] Register B */
+#define rExp 0x0001 /* [RBV only] RBV future expansion (always 0) */
+#define rSIFR 0x0002 /* [RBV only] RBV slot interrupts register. */
+#define rIFR 0x1a03 /* [VIA/RBV] RBV interrupt flag register. */
+#define rMonP 0x0010 /* [RBV only] RBV video monitor type. */
+#define rChpT 0x0011 /* [RBV only] RBV test mode register (reads as 0). */
+#define rSIER 0x0012 /* [RBV only] RBV slot interrupt enables. */
+#define rIER 0x1c13 /* [VIA/RBV] RBV interrupt flag enable register. */
+#define rBufA rSIFR /* the 'slot interrupts register' is BufA on a VIA */
+
+/*
+ * Video monitor parameters, for rMonP:
+ */
+#define RBV_DEPTH 0x07 /* bits per pixel: 000=1,001=2,010=4,011=8 */
+#define RBV_MONID 0x38 /* monitor type, as below. */
+#define RBV_VIDOFF 0x40 /* 1 turns off onboard video */
+/* Supported monitor types: */
+#define MON_15BW (1<<3) /* 15" BW portrait. */
+#define MON_IIGS (2<<3) /* 12" color (modified IIGS monitor). */
+#define MON_15RGB (5<<3) /* 15" RGB portrait. */
+#define MON_12OR13 (6<<3) /* 12" BW or 13" RGB. */
+#define MON_NONE (7<<3) /* No monitor attached. */
+
+/* To clarify IER manipulations */
+#define IER_SET_BIT(b) (0x80 | (1<<(b)) )
+#define IER_CLR_BIT(b) (0x7F & (1<<(b)) )
+
+#ifndef __ASSEMBLY__
+
+extern volatile __u8 *via1,*via2;
+extern int rbv_present,via_alt_mapping;
+extern __u8 rbv_clear;
+
+#if 0
+/*
+ * The 6522 via is a 2MHz part, and needs a delay. MacOS seems to
+ * execute MOV (Ax),(Ax) for this... Oh and we can't use udelay
+ * here... see we need the via to calibrate the udelay loop ...
+ */
+
+/* NetBSD doesn't use this, and it doesn't seem to make a difference. */
+extern volatile long *via_memory_bogon;
+#endif
+
+extern __u8 *via_get_base_address(int);
+
+extern __inline__ void via_write(volatile __u8 *via,int reg, int v)
+{
+#if 0
+ *via_memory_bogon;
+ *via_memory_bogon;
+ *via_memory_bogon;
+#endif
+ via[reg]=v;
+}
+
+extern __inline__ int via_read(volatile __u8 *via,int reg)
+{
+#if 0
+ *via_memory_bogon;
+ *via_memory_bogon;
+ *via_memory_bogon;
+#endif
+ return (int)via[reg];
+}
+
+extern __inline__ int rbv_set_video_bpp(int bpp) {
+ char val = (bpp==1)?0:(bpp==2)?1:(bpp==4)?2:(bpp==8)?3:-1;
+ if (!rbv_present || val<0) return -1;
+ via_write(via2, rMonP, val | (via_read(via2, rMonP)&(~RBV_DEPTH)));
+ return 0;
+}
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _ASM_VIA6522_H_ */
--- /dev/null
+/*
+ * SWIM access through the IOP
+ * Written by Joshua M. Thompson
+ */
+
+/* IOP number and channel number for the SWIM */
+
+#define SWIM_IOP IOP_NUM_ISM
+#define SWIM_CHAN 1
+
+/* Command code: */
+
+#define CMD_INIT 0x01 /* Initialize */
+#define CMD_SHUTDOWN 0x02 /* Shutdown */
+#define CMD_START_POLL 0x03 /* Start insert/eject polling */
+#define CMD_STOP_POLL 0x04 /* Stop insert/eject polling */
+#define CMD_SETHFSTAG 0x05 /* Set HFS tag buffer address */
+#define CMD_STATUS 0x06 /* Status */
+#define CMD_EJECT 0x07 /* Eject */
+#define CMD_FORMAT 0x08 /* Format */
+#define CMD_FORMAT_VERIFY 0x09 /* Format and Verify */
+#define CMD_WRITE 0x0A /* Write */
+#define CMD_READ 0x0B /* Read */
+#define CMD_READ_VERIFY 0x0C /* Read and Verify */
+#define CMD_CACHE_CTRL 0x0D /* Cache control */
+#define CMD_TAGBUFF_CTRL 0x0E /* Tag buffer control */
+#define CMD_GET_ICON 0x0F /* Get Icon */
+
+/* Drive types: */
+
+/* note: apple sez DRV_FDHD is 4, but I get back a type */
+/* of 5 when I do a drive status check on my FDHD */
+
+#define DRV_NONE 0 /* No drive */
+#define DRV_UNKNOWN 1 /* Unspecified drive */
+#define DRV_400K 2 /* 400K */
+#define DRV_800K 3 /* 400K/800K */
+#define DRV_FDHD 5 /* 400K/800K/720K/1440K */
+#define DRV_HD20 7 /* Apple HD20 */
+
+/* Format types: */
+
+#define FMT_HD20 0x0001 /* Apple HD20 */
+#define FMT_400K 0x0002 /* 400K (GCR) */
+#define FMT_800K 0x0004 /* 800K (GCR) */
+#define FMT_720K 0x0008 /* 720K (MFM) */
+#define FMT_1440K 0x0010 /* 1.44M (MFM) */
+
+#define FMD_KIND_400K 1
+#define FMD_KIND_800K 2
+#define FMD_KIND_720K 3
+#define FMD_KIND_1440K 1
+
+/* Icon Flags: */
+
+#define ICON_MEDIA 0x01 /* Have IOP supply media icon */
+#define ICON_DRIVE 0x01 /* Have IOP supply drive icon */
+
+/* Error codes: */
+
+#define gcrOnMFMErr -400 /* GCR (400/800K) on HD media */
+#define verErr -84 /* verify failed */
+#define fmt2Err -83 /* cant get enough sync during format */
+#define fmt1Err -82 /* can't find sector 0 after track format */
+#define sectNFErr -81 /* can't find sector */
+#define seekErr -80 /* drive error during seek */
+#define spdAdjErr -79 /* can't set drive speed */
+#define twoSideErr -78 /* drive is single-sided */
+#define initIWMErr -77 /* error during initialization */
+#define tk0badErr -76 /* track zero is bad */
+#define cantStepErr -75 /* drive error during step */
+#define wrUnderrun -74 /* write underrun occurred */
+#define badDBtSlp -73 /* bad data bitslip marks */
+#define badDCksum -72 /* bad data checksum */
+#define noDtaMkErr -71 /* can't find data mark */
+#define badBtSlpErr -70 /* bad address bitslip marks */
+#define badCksmErr -69 /* bad address-mark checksum */
+#define dataVerErr -68 /* read-verify failed */
+#define noAdrMkErr -67 /* can't find an address mark */
+#define noNybErr -66 /* no nybbles? disk is probably degaussed */
+#define offLinErr -65 /* no disk in drive */
+#define noDriveErr -64 /* drive isn't connected */
+#define nsDrvErr -56 /* no such drive */
+#define paramErr -50 /* bad positioning information */
+#define wPrErr -44 /* write protected */
+#define openErr -23 /* already initialized */
+
+#ifndef __ASSEMBLY__
+
+struct swim_drvstatus {
+ __u16 curr_track; /* Current track number */
+ __u8 write_prot; /* 0x80 if disk is write protected */
+ __u8 disk_in_drive; /* 0x01 or 0x02 if a disk is in the drive */
+ __u8 installed; /* 0x01 if drive installed, 0xFF if not */
+ __u8 num_sides; /* 0x80 if two-sided format supported */
+ __u8 two_sided; /* 0xff if two-sided format diskette */
+ __u8 new_interface; /* 0x00 if old 400K drive, 0xFF if newer */
+ __u16 errors; /* Disk error count */
+ struct { /* 32 bits */
+ __u16 reserved;
+ __u16 :4;
+ __u16 external:1; /* Drive is external */
+ __u16 scsi:1; /* Drive is a SCSI drive */
+ __u16 fixed:1; /* Drive has fixed media */
+ __u16 secondary:1; /* Drive is secondary drive */
+ __u8 type; /* Drive type */
+ } info;
+ __u8 mfm_drive; /* 0xFF if this is an FDHD drive */
+ __u8 mfm_disk; /* 0xFF if 720K/1440K (MFM) disk */
+ __u8 mfm_format; /* 0x00 if 720K, 0xFF if 1440K */
+ __u8 ctlr_type; /* 0x00 if IWM, 0xFF if SWIM */
+ __u16 curr_format; /* Current format type */
+ __u16 allowed_fmt; /* Allowed format types */
+ __u32 num_blocks; /* Number of blocks on disk */
+ __u8 icon_flags; /* Icon flags */
+ __u8 unusued;
+};
+
+/* Commands issued from the host to the IOP: */
+
+struct swimcmd_init {
+ __u8 code; /* CMD_INIT */
+ __u8 unusued;
+ __u16 error;
+ __u8 drives[28]; /* drive type list */
+};
+
+struct swimcmd_startpoll {
+ __u8 code; /* CMD_START_POLL */
+ __u8 unusued;
+ __u16 error;
+};
+
+struct swimcmd_sethfstag {
+ __u8 code; /* CMD_SETHFSTAG */
+ __u8 unusued;
+ __u16 error;
+ caddr_t tagbuf; /* HFS tag buffer address */
+};
+
+struct swimcmd_status {
+ __u8 code; /* CMD_STATUS */
+ __u8 drive_num;
+ __u16 error;
+ struct swim_drvstatus status;
+};
+
+struct swimcmd_eject {
+ __u8 code; /* CMD_EJECT */
+ __u8 drive_num;
+ __u16 error;
+ struct swim_drvstatus status;
+};
+
+struct swimcmd_format {
+ __u8 code; /* CMD_FORMAT */
+ __u8 drive_num;
+ __u16 error;
+ union {
+ struct {
+ __u16 fmt; /* format kind */
+ __u8 hdrbyte; /* fmt byte for hdr (0=default) */
+ __u8 interleave; /* interleave (0 = default) */
+ caddr_t databuf; /* sector data buff (0=default */
+ caddr_t tagbuf; /* tag data buffer (0=default) */
+ } f;
+ struct swim_drvstatus status;
+ } p;
+};
+
+struct swimcmd_fmtverify {
+ __u8 code; /* CMD_FORMAT_VERIFY */
+ __u8 drive_num;
+ __u16 error;
+};
+
+struct swimcmd_rw {
+ __u8 code; /* CMD_READ, CMD_WRITE or CMD_READ_VERIFY */
+ __u8 drive_num;
+ __u16 error;
+ caddr_t buffer; /* R/W buffer address */
+ __u32 first_block; /* Starting block */
+ __u32 num_blocks; /* Number of blocks */
+ __u8 tag[12]; /* tag data */
+};
+
+struct swimcmd_cachectl {
+ __u8 code; /* CMD_CACHE_CTRL */
+ __u8 unused;
+ __u16 error;
+ __u8 enable; /* Nonzero to enable cache */
+ __u8 install; /* +1 = install, -1 = remove, 0 = neither */
+};
+
+struct swimcmd_tagbufctl {
+ __u8 code; /* CMD_TAGBUFF_CTRL */
+ __u8 unused;
+ __u16 error;
+ caddr_t buf; /* buffer address or 0 to disable */
+};
+
+struct swimcmd_geticon {
+ __u8 code; /* CMD_GET_ICON */
+ __u8 drive_num;
+ __u16 error;
+ caddr_t buffer; /* Nuffer address */
+ __u16 kind; /* 0 = media icon, 1 = drive icon */
+ __u16 unused;
+ __u16 max_bytes; /* maximum byte count */
+};
+
+/* Messages from the SWIM IOP to the host CPU: */
+
+struct swimmsg_status {
+ __u8 code; /* 1 = insert, 2 = eject, 3 = status changed */
+ __u8 drive_num;
+ __u16 error;
+ struct swim_drvstatus status;
+};
+
+#endif /* __ASSEMBLY__ */
-/* $Id: spitfire.h,v 1.9 1998/04/28 08:23:33 davem Exp $
+/* $Id: spitfire.h,v 1.9.2.1 2000/10/06 13:14:35 anton Exp $
* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations.
*
* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
__asm__ __volatile__("stxa %0, [%1] %2"
: /* No outputs */
: "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG));
+ membar("#Sync");
}
/* The instruction cache lines are flushed with this, but note that
{
int read_latency;
int write_latency;
- int max_bomb_segments;
unsigned int queue_ID;
} elevator_t;
#define ELEVATOR_DEFAULTS \
((elevator_t) { \
- 128, /* read_latency */ \
- 8192, /* write_latency */ \
- 32, /* max_bomb_segments */ \
+ 256, /* read_latency */ \
+ 512, /* write_latency */ \
0 /* queue_ID */ \
})
typedef struct sock unix_socket;
extern void unix_gc(void);
-#define UNIX_HASH_SIZE 16
+#define UNIX_HASH_SIZE 256
extern unix_socket *unix_socket_table[UNIX_HASH_SIZE+1];
#ifndef _LINUX_DIVERT_H
#define _LINUX_DIVERT_H
+#include <asm/types.h>
+
#define MAX_DIVERT_PORTS 8 /* Max number of ports to divert (tcp, udp) */
/* Divertable protocols */
#define DIVERT_PROTO_TCP 0x0004
#define DIVERT_PROTO_UDP 0x0008
-#ifdef __KERNEL__
- #define S16 s16
- #define U16 u16
- #define S32 s32
- #define U32 u32
- #define S64 s64
- #define U64 u64
-#else
- #define S16 __s16
- #define U16 __u16
- #define S32 __s32
- #define U32 __u32
- #define S64 __s64
- #define U64 __u64
-#endif
-
/*
* This is an Ethernet Frame Diverter option block
*/
{
int divert; /* are we active */
unsigned int protos; /* protocols */
- U16 tcp_dst[MAX_DIVERT_PORTS]; /* specific tcp dst ports to divert */
- U16 tcp_src[MAX_DIVERT_PORTS]; /* specific tcp src ports to divert */
- U16 udp_dst[MAX_DIVERT_PORTS]; /* specific udp dst ports to divert */
- U16 udp_src[MAX_DIVERT_PORTS]; /* specific udp src ports to divert */
+ u16 tcp_dst[MAX_DIVERT_PORTS]; /* specific tcp dst ports to divert */
+ u16 tcp_src[MAX_DIVERT_PORTS]; /* specific tcp src ports to divert */
+ u16 udp_dst[MAX_DIVERT_PORTS]; /* specific udp dst ports to divert */
+ u16 udp_src[MAX_DIVERT_PORTS]; /* specific udp src ports to divert */
};
/*
typedef union _divert_cf_arg
{
- S16 int16;
- U16 uint16;
- S32 int32;
- U32 uint32;
- S64 int64;
- U64 uint64;
+ s16 int16;
+ u16 uint16;
+ s32 int32;
+ u32 uint32;
+ s64 int64;
+ u64 uint64;
void *ptr;
} divert_cf_arg;
#
# Amateur Radio protocols and AX.25 device configuration
-#
-# 19971130 Now in an own category to make correct compilation of the
-# AX.25 stuff easier...
-# Joerg Reuter DL1BKE <jreuter@poboxes.com>
-# 19980129 Moved to net/ax25/Config.in, sourcing device drivers.
mainmenu_option next_comment
comment 'Amateur Radio support'
ax25->sk->state_change(ax25->sk);
}
ax25_dama_on(ax25);
-
- /* according to DK4EG´s spec we are required to
- * send a RR RESPONSE FINAL NR=0. Please mail
- * <jreuter@poboxes.com> if this causes problems
- * with the TheNetNode DAMA Master implementation.
- */
-
ax25_std_enquiry_response(ax25);
break;
#include <net/divert.h>
#include <linux/sockios.h>
-const char sysctl_divert_version[32]="0.45"; /* Current version */
+const char sysctl_divert_version[32]="0.461"; /* Current version */
__initfunc(void dv_init(void))
{
*/
#define ETH_DIVERT_FRAME(skb) \
- memcpy(skb->mac.ethernet, skb->dev->dev_addr, ETH_ALEN)
+ memcpy(skb->mac.ethernet, skb->dev->dev_addr, ETH_ALEN); \
+ skb->pkt_type=PACKET_HOST
void divert_frame(struct sk_buff *skb)
{
unsigned char *skb_data_end=skb->data+skb->len;
/* Packet is already aimed at us, return */
- if (!memcmp(eth, skb->dev->dev_addr, ETH_ALEN))
+ if (skb->pkt_type==PACKET_HOST)
return;
/* proto is not IP, do nothing */
*
* IPv4 Forwarding Information Base: policy rules.
*
- * Version: $Id: fib_rules.c,v 1.9 1999/03/25 10:04:23 davem Exp $
+ * Version: $Id: fib_rules.c,v 1.9.2.1 2000/10/06 10:34:16 davem Exp $
*
* Authors: Alexey Kuznetsov, <kuznet@ms2.inr.ac.ru>
*
if (addrtype == RTN_NAT) {
/* Packet is from translated source; remember it */
- saddr = (saddr&~r->r_srcmask)|r->r_srcmap;
+ saddr = r->r_srcmask ? (saddr&~r->r_srcmask)|r->r_srcmap : r->r_srcmap;
*flags |= RTCF_SNAT;
} else if (addrtype == RTN_LOCAL || r->r_srcmap == 0) {
/* Packet is from masqueraded source; remember it */
*
* Implementation of the Transmission Control Protocol(TCP).
*
- * Version: $Id: tcp.c,v 1.140.2.14 2000/08/10 00:37:05 davem Exp $
+ * Version: $Id: tcp.c,v 1.140.2.15 2000/10/06 23:29:33 davem Exp $
*
* Authors: Ross Biro, <bir7@leland.Stanford.Edu>
* Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
tmp += copy;
queue_it = 0;
}
- skb = sock_wmalloc_err(sk, tmp, 0, GFP_KERNEL, &err);
+ skb = sock_wmalloc_err(sk, tmp, 0, sk->allocation, &err);
/* If we didn't get any memory, we need to sleep. */
if (skb == NULL) {
* PROC file system. This is very similar to the IPv4 version,
* except it reports the sockets in the INET6 address family.
*
- * Version: $Id: proc.c,v 1.9.2.1 2000/01/14 01:22:24 davem Exp $
+ * Version: $Id: proc.c,v 1.9.2.2 2000/10/18 17:55:00 davem Exp $
*
* Authors: David S. Miller (davem@caip.rutgers.edu)
*
int tw_bucket = 0;
pos += 149;
- if(pos < offset)
+ if(pos <= offset)
goto next;
tp = &(sp->tp_pinfo.af_tcp);
if((format == 0) && (sp->state == TCP_TIME_WAIT)) {
/* Ideally, we would want to reject connections from unauthorized
* hosts here, but we have no generic client tables. For now,
- * we just punt connects from unprivileged ports. */
- if (ntohs(sin.sin_port) >= 1024) {
- if (net_ratelimit())
- printk(KERN_WARNING
- "%s: connect from unprivileged port: %s:%d",
- serv->sv_name,
- in_ntoa(sin.sin_addr.s_addr), ntohs(sin.sin_port));
- goto failed;
- }
+ * we just punt connects from unprivileged ports.
+ * hosts here, but when we get encription, the IP of the host won't
+ * tell us anything. For now just warn about unpriv connections.
+ */
+ if (ntohs(sin.sin_port) >= 1024) {
+ if (net_ratelimit())
+ printk(KERN_WARNING
+ "%s: connect from unprivileged port: %u.%u.%u.%u:%d\n",
+ serv->sv_name,
+ NIPQUAD(sin.sin_addr.s_addr),
+ ntohs(sin.sin_port));
+ }
dprintk("%s: connect from %s:%04x\n", serv->sv_name,
in_ntoa(sin.sin_addr.s_addr), ntohs(sin.sin_port));
struct svc_sock *svsk = rqstp->rq_sock;
struct svc_serv *serv = svsk->sk_server;
struct svc_buf *bufp = &rqstp->rq_argbuf;
- int len, ready;
+ int len, ready, used;
dprintk("svc: tcp_recv %p data %d conn %d close %d\n",
svsk, svsk->sk_data, svsk->sk_conn, svsk->sk_close);
svsk->sk_reclen = ntohl(svsk->sk_reclen);
if (!(svsk->sk_reclen & 0x80000000)) {
- /* FIXME: shutdown socket */
- printk(KERN_NOTICE "RPC: bad TCP reclen %08lx",
- (unsigned long) svsk->sk_reclen);
- return -EIO;
+ if (net_ratelimit())
+ printk(KERN_NOTICE "RPC: bad TCP reclen %08lx",
+ (unsigned long) svsk->sk_reclen);
+ svc_delete_socket(svsk);
+ return 0;
}
svsk->sk_reclen &= 0x7fffffff;
dprintk("svc: TCP record, %d bytes\n", svsk->sk_reclen);
dprintk("svc: incomplete TCP record (%d of %d)\n",
len, svsk->sk_reclen);
svc_sock_received(svsk, ready);
- len = -EAGAIN; /* record not complete */
+ return -EAGAIN; /* record not complete */
}
+ /* if we think there is only one more record to read, but
+ * it is bigger than we expect, then two records must have arrived
+ * together, so pretend we aren't using the record.. */
+ if (len > svsk->sk_reclen && ready == 1){
+ used = 0;
+ dprintk("svc_recv: more data at hte socket len %d > svsk->sk_reclen %d",
+ len, svsk->sk_reclen);
+ }
+ else used = 1;
+
+
/* Frob argbuf */
bufp->iov[0].iov_base += 4;
bufp->iov[0].iov_len -= 4;
svsk->sk_reclen = 0;
svsk->sk_tcplen = 0;
- svc_sock_received(svsk, 1);
+ svc_sock_received(svsk, used);
if (serv->sv_stats)
serv->sv_stats->nettcpcnt++;
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*
- * Version: $Id: af_unix.c,v 1.76.2.4 2000/05/27 04:46:44 davem Exp $
+ * Version: $Id: af_unix.c,v 1.76.2.5 2000/10/17 09:08:37 davem Exp $
*
* Fixes:
* Linus Torvalds : Assorted bug cures.
#define min(a,b) (((a)<(b))?(a):(b))
+extern int unix_tot_inflight;
+
int sysctl_unix_delete_delay = HZ;
int sysctl_unix_destroy_delay = 10*HZ;
int sysctl_unix_max_dgram_qlen = 10;
{
hash ^= hash>>16;
hash ^= hash>>8;
- hash ^= hash>>4;
return hash;
}
{
unix_socket *s;
- for (s=unix_socket_table[(hash^type)&0xF]; s; s=s->next)
+ for (s=unix_socket_table[(hash^type)&(UNIX_HASH_SIZE-1)]; s; s=s->next)
{
if(s->protinfo.af_unix.addr->len==len &&
memcmp(s->protinfo.af_unix.addr->name, sunname, len) == 0 &&
{
unix_socket *s;
- for (s=unix_socket_table[i->i_ino & 0xF]; s; s=s->next)
+ for (s=unix_socket_table[i->i_ino & (UNIX_HASH_SIZE - 1)]; s; s=s->next)
{
struct dentry *dentry = s->protinfo.af_unix.dentry;
* What the above comment does talk about? --ANK(980817)
*/
- unix_gc(); /* Garbage collect fds */
+ if (unix_tot_inflight)
+ unix_gc(); /* Garbage collect fds */
return 0;
}
sk->protinfo.af_unix.addr = addr;
unix_remove_socket(sk);
- sk->protinfo.af_unix.list = &unix_socket_table[(addr->hash ^ sk->type)&0xF];
+ sk->protinfo.af_unix.list = &unix_socket_table[(addr->hash ^ sk->type)&(UNIX_HASH_SIZE - 1)];
unix_insert_socket(sk);
return 0;
}
}
unix_remove_socket(sk);
sk->protinfo.af_unix.addr = addr;
- sk->protinfo.af_unix.list = &unix_socket_table[(hash^sk->type)&0xF];
+ sk->protinfo.af_unix.list = &unix_socket_table[(hash^sk->type)&(UNIX_HASH_SIZE - 1)];
unix_insert_socket(sk);
return 0;
}
return err;
}
unix_remove_socket(sk);
- sk->protinfo.af_unix.list = &unix_socket_table[dentry->d_inode->i_ino & 0xF];
+ sk->protinfo.af_unix.list = &unix_socket_table[dentry->d_inode->i_ino & (UNIX_HASH_SIZE - 1)];
sk->protinfo.af_unix.dentry = dentry;
unix_insert_socket(sk);
return u_sock;
}
+int unix_tot_inflight;
+
/*
* Keep the number of times in flight count for the file
* descriptor if it is for an AF_UNIX socket.
void unix_inflight(struct file *fp)
{
unix_socket *s=unix_get_socket(fp);
- if(s)
+ if (s) {
s->protinfo.af_unix.inflight++;
+ unix_tot_inflight++;
+ }
}
void unix_notinflight(struct file *fp)
{
unix_socket *s=unix_get_socket(fp);
- if(s)
+ if (s) {
s->protinfo.af_unix.inflight--;
+ unix_tot_inflight--;
+ }
}
projects / history.git / commitdiff