ia64: Add IA64_ISR_CODE_* macros from Ken's patch.

diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h
index 8abb0d56e0dabda4e7775c3e36333f70196de33e..6d99f1200cf9bf99319a60a4a8c79dd9d32d1da8 100644 (file)
--- a/include/asm-ia64/processor.h
+++ b/include/asm-ia64/processor.h
@@ -154,6 +154,7 @@
 #define IA64_ISR_SP_BIT                36      /* speculative load exception */
 #define IA64_ISR_RS_BIT                37      /* mandatory register-stack exception */
 #define IA64_ISR_IR_BIT                38      /* invalid register frame exception */
+#define IA64_ISR_CODE_MASK     0xf
 
 #define IA64_ISR_X     (__IA64_UL(1) << IA64_ISR_X_BIT)
 #define IA64_ISR_W     (__IA64_UL(1) << IA64_ISR_W_BIT)
@@ -163,6 +164,14 @@
 #define IA64_ISR_RS    (__IA64_UL(1) << IA64_ISR_RS_BIT)
 #define IA64_ISR_IR    (__IA64_UL(1) << IA64_ISR_IR_BIT)
 
+/* ISR code field for non-access instructions */
+#define IA64_ISR_CODE_TPA      0
+#define IA64_ISR_CODE_FC       1
+#define IA64_ISR_CODE_PROBE    2
+#define IA64_ISR_CODE_TAK      3
+#define IA64_ISR_CODE_LFETCH   4
+#define IA64_ISR_CODE_PROBEF   5
+
 #define IA64_THREAD_FPH_VALID  (__IA64_UL(1) << 0)     /* floating-point high state valid? */
 #define IA64_THREAD_DBG_VALID  (__IA64_UL(1) << 1)     /* debug registers valid? */
 #define IA64_THREAD_PM_VALID   (__IA64_UL(1) << 2)     /* performance registers valid? */