TIGON3: Add missing udelay when clearing SRAM stats/status block.

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 1b82416420f2d7fa9b7fcb8e1cb50674b0aaaf96..bf08bba649eb407ffc0e21932d16ea260d735baa 100644 (file)
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -3337,8 +3337,10 @@ static int tg3_reset_hw(struct tg3 *tp)
        /* Clear statistics/status block in chip, and status block in ram. */
        for (i = NIC_SRAM_STATS_BLK;
             i < NIC_SRAM_STATUS_BLK + TG3_HW_STATUS_SIZE;
-            i += sizeof(u32))
+            i += sizeof(u32)) {
                tg3_write_mem(tp, i, 0);
+               udelay(40);
+       }
        memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
 
        /* This value is determined during the probe time DMA