From b04b564b8803e9ec7649468c2b31f8ea1159bbb5 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Sat, 7 Dec 2002 11:50:44 -0800 Subject: [PATCH] [ALPHA] Clean up Ivan's patch (ChangeSet 1.456.18.11) for the Alcor buggy window. --- arch/alpha/kernel/core_cia.c | 43 ++++++++++++++++-------------------- include/asm-alpha/core_cia.h | 4 ++++ 2 files changed, 23 insertions(+), 24 deletions(-) diff --git a/arch/alpha/kernel/core_cia.c b/arch/alpha/kernel/core_cia.c index 4663c75f00ca..283963f50ea5 100644 --- a/arch/alpha/kernel/core_cia.c +++ b/arch/alpha/kernel/core_cia.c @@ -336,7 +336,7 @@ cia_pci_tbi_try2(struct pci_controller *hose, } static inline void -cia_prepare_tbia_workaround(int cia_rev, int is_pyxis) +cia_prepare_tbia_workaround(int window) { unsigned long *ppte, pte; long i; @@ -348,20 +348,10 @@ cia_prepare_tbia_workaround(int cia_rev, int is_pyxis) for (i = 0; i < CIA_BROKEN_TBIA_SIZE / sizeof(unsigned long); ++i) ppte[i] = pte; - if (is_pyxis || cia_rev != 1) { - /* We can use W1 for SG on PYXIS/CIA rev 2. */ - *(vip)CIA_IOC_PCI_W1_BASE = CIA_BROKEN_TBIA_BASE | 3; - *(vip)CIA_IOC_PCI_W1_MASK = (CIA_BROKEN_TBIA_SIZE*1024 - 1) - & 0xfff00000; - *(vip)CIA_IOC_PCI_T1_BASE = virt_to_phys(ppte) >> 2; - } else { - /* CIA rev 1 can't use W1 or W2 for SG, apparently, - so use W3, which we made sure is not used for DAC. */ - *(vip)CIA_IOC_PCI_W3_BASE = CIA_BROKEN_TBIA_BASE | 3; - *(vip)CIA_IOC_PCI_W3_MASK = (CIA_BROKEN_TBIA_SIZE*1024 - 1) - & 0xfff00000; - *(vip)CIA_IOC_PCI_T3_BASE = virt_to_phys(ppte) >> 2; - } + *(vip)CIA_IOC_PCI_Wn_BASE(window) = CIA_BROKEN_TBIA_BASE | 3; + *(vip)CIA_IOC_PCI_Wn_MASK(window) + = (CIA_BROKEN_TBIA_SIZE*1024 - 1) & 0xfff00000; + *(vip)CIA_IOC_PCI_Tn_BASE(window) = virt_to_phys(ppte) >> 2; } static void __init @@ -581,8 +571,7 @@ static void __init do_init_arch(int is_pyxis) { struct pci_controller *hose; - int temp; - int cia_rev; + int temp, cia_rev, tbia_window; cia_rev = *(vip)CIA_IOC_CIA_REV & CIA_REV_MASK; printk("pci: cia revision %d%s\n", @@ -712,12 +701,18 @@ do_init_arch(int is_pyxis) elsewhere, we should not claim that we support DAC unless that 4GB covers all of physical memory. - Also, don't do DAC on CIA rev 1, it has other problems and is - unlikely to have more than 2GB of memory anyway, so direct is - fine. - */ - if (cia_rev == 1 || is_pyxis || - max_low_pfn > (0x100000000UL >> PAGE_SHIFT)) { + On CIA rev 1, apparently W1 and W2 can't be used for SG. + At least, there are reports that it doesn't work for Alcor. + In that case, we have no choice but to use W3 for the TBIA + workaround, which means we can't use DAC at all. */ + + tbia_window = 1; + if (is_pyxis) { + *(vip)CIA_IOC_PCI_W3_BASE = 0; + } else if (cia_rev == 1) { + *(vip)CIA_IOC_PCI_W1_BASE = 0; + tbia_window = 3; + } else if (max_low_pfn > (0x100000000UL >> PAGE_SHIFT)) { *(vip)CIA_IOC_PCI_W3_BASE = 0; } else { *(vip)CIA_IOC_PCI_W3_BASE = 0x00000000 | 1 | 8; @@ -729,7 +724,7 @@ do_init_arch(int is_pyxis) } /* Prepare workaround for apparently broken tbia. */ - cia_prepare_tbia_workaround(cia_rev, is_pyxis); + cia_prepare_tbia_workaround(tbia_window); } void __init diff --git a/include/asm-alpha/core_cia.h b/include/asm-alpha/core_cia.h index 827f9bbf0d3c..7898b037f73f 100644 --- a/include/asm-alpha/core_cia.h +++ b/include/asm-alpha/core_cia.h @@ -202,6 +202,10 @@ #define CIA_IOC_PCI_W3_MASK (IDENT_ADDR + 0x8760000740UL) #define CIA_IOC_PCI_T3_BASE (IDENT_ADDR + 0x8760000780UL) +#define CIA_IOC_PCI_Wn_BASE(N) (IDENT_ADDR + 0x8760000400UL + (N)*0x100) +#define CIA_IOC_PCI_Wn_MASK(N) (IDENT_ADDR + 0x8760000440UL + (N)*0x100) +#define CIA_IOC_PCI_Tn_BASE(N) (IDENT_ADDR + 0x8760000480UL + (N)*0x100) + #define CIA_IOC_PCI_W_DAC (IDENT_ADDR + 0x87600007C0UL) /* -- 2.39.5